[Qemu-devel] [PATCH v11 07/10] file-posix: support BDRV_REQ_ALLOCATE

Current write_zeroes implementation is good enough to satisfy this flag too Signed-off-by: Anton Nefedov --- block/file-posix.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/block/file-posix.c b/block/file-posix.c index a65e464cbc..c3fbf53853 100644 --- a/block/file-

[Qemu-devel] [PATCH v11 00/10] qcow2: cluster space preallocation

new in v11: - patch 4, 9: fixed commentary format - patch 4: removed one hunk with a dead check - patch 5: added commentary to BDRV_REQ_ALLOCATE definition - new auxiliary patch 6 for the following patch-7 change: - patch 7: reset BDRV_REQ_ALLOCATE from supported flag if CONFIG_

[Qemu-devel] [PATCH v11 03/10] quorum: set supported write flags

Signed-off-by: Anton Nefedov Reviewed-by: Alberto Garcia Reviewed-by: Vladimir Sementsov-Ogievskiy --- block/quorum.c | 19 ++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/block/quorum.c b/block/quorum.c index 16b3c8067c..d21a6a3b8e 100644 --- a/block/quorum.c

[Qemu-devel] [PATCH v11 01/10] mirror: inherit supported write/zero flags

Signed-off-by: Anton Nefedov Reviewed-by: Alberto Garcia Reviewed-by: Vladimir Sementsov-Ogievskiy --- block/mirror.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/block/mirror.c b/block/mirror.c index ab59ad77e8..be52c9be9c 100644 --- a/block/mirror.c +++ b/block/

Re: [Qemu-devel] [PATCH qemu v3] ppc/spapr: Receive and store device tree blob from SLOF

On 18/12/2018 15:30, Alexey Kardashevskiy wrote: > > > On 18/12/2018 14:49, David Gibson wrote: >> On Tue, Dec 18, 2018 at 02:04:54PM +1100, Alexey Kardashevskiy wrote: >>> >>> >>> On 18/12/2018 13:09, David Gibson wrote: On Mon, Dec 17, 2018 at 05:21:33PM +1100, David Gibson wrote: >

Re: [Qemu-devel] [PATCH] spapr: Add H-Call H_HOME_NODE_ASSOCIATIVITY

On 18/12/2018 05:29, David Gibson wrote: > On Mon, Dec 17, 2018 at 03:00:55PM +0100, Laurent Vivier wrote: >> H_HOME_NODE_ASSOCIATIVITY H-Call returns the associativity domain >> designation associated with the identifier input parameter. >> >> Remove the warning message from the kernel: >> VPHN

[Qemu-devel] [Bug 1808928] [NEW] Bitmap Extra data is not supported

Public bug reported: i am using dirty bitmaps and drive-backup. It works as aspected. Lately, i encounter a disastrous error. There is not any information about that situation. I cannot reach/open/attach/info or anything with a qcow2 file. virsh version Compiled against library: libvirt 4.10.0 U

Re: [Qemu-devel] [PATCH] qapi: fix flat union on uncovered branches conditionals

Marc-André Lureau writes: > Default branches variant should use the member conditional. > > This fixes compilation with --disable-replication. > > Fixes: 335d10cd8e2c3bb6067804b095aaf6371fc1983e > > Signed-off-by: Marc-André Lureau > --- > scripts/qapi/common.py | 2 +- > 1 file changed, 1 inse

Re: [Qemu-devel] [PATCH v3 2/2] hw: vmmouse: Use link instead of pointer property

Philippe Mathieu-Daudé writes: > On 12/17/18 8:01 PM, Markus Armbruster wrote: >> Philippe Mathieu-Daudé writes: >> >>> Hi Li, >>> >>> On 11/29/18 5:52 AM, Li Qiang wrote: According to qdev-properties.h, properties of pointer type should be avoided. Turn "ps2_mouse" into a link.

[Qemu-devel] [PATCH 20/34] target/ppc: convert vsplt[bhw] to use vector operations

Signed-off-by: Richard Henderson --- target/ppc/helper.h | 3 -- target/ppc/int_helper.c | 24 --- target/ppc/translate/vmx-impl.inc.c | 45 + 3 files changed, 26 insertions(+), 46 deletions(-) diff --git a/target/ppc/helper.h

[Qemu-devel] [PATCH 34/34] target/ppc: convert vmin* and vmax* to vector operations

Signed-off-by: Richard Henderson --- target/ppc/helper.h | 16 --- target/ppc/int_helper.c | 27 target/ppc/translate/vmx-impl.inc.c | 32 ++--- 3 files changed, 16 insertions(+), 59 deletions(-) diff --git

[Qemu-devel] [PATCH 24/34] target/ppc: convert xxspltw to vector operations

Signed-off-by: Richard Henderson --- target/ppc/translate/vsx-impl.inc.c | 36 + 1 file changed, 11 insertions(+), 25 deletions(-) diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c index d88d6bbd74..a040038ed4 100644 --- a/target/

[Qemu-devel] [PATCH 01/34] tcg: Add logical simplifications during gvec expand

We handle many of these during integer expansion, and the rest of them during integer optimization. Signed-off-by: Richard Henderson --- tcg/tcg-op-gvec.c | 35 ++- 1 file changed, 30 insertions(+), 5 deletions(-) diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.

Re: [Qemu-devel] [PULL 32/32] qapi: add conditions to REPLICATION type/commands on the schema

Marc-André Lureau writes: > Hi > > On Mon, Dec 17, 2018 at 8:01 PM Thomas Huth wrote: >> >> On 2018-12-13 19:43, Markus Armbruster wrote: >> > From: Marc-André Lureau >> > >> > Add #if defined(CONFIG_REPLICATION) in generated code, and adjust the >> > code accordingly. >> > >> > Made conditiona

[Qemu-devel] [PATCH 29/34] target/ppc: Add helper_mfvscr

This is required before changing the representation of the register. Signed-off-by: Richard Henderson --- target/ppc/helper.h | 1 + target/ppc/arch_dump.c | 3 ++- target/ppc/int_helper.c | 5 + target/ppc/translate/vmx-impl.inc.c | 2 +- target/ppc/

[Qemu-devel] [PATCH 27/34] target/ppc: Use helper_mtvscr for reset and gdb

Not setting flush_to_zero from gdb_set_avr_reg was a bug. Signed-off-by: Richard Henderson --- target/ppc/translate_init.inc.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c index b83097141c..292b1df700 1

[Qemu-devel] [PATCH 11/34] target/ppc: introduce get_fpr() and set_fpr() helpers for FP register access

From: Mark Cave-Ayland These helpers allow us to move FP register values to/from the specified TCGv_i64 argument in the VSR helpers to be introduced shortly. To prevent FP helpers accessing the cpu_fpr array directly, add extra TCG temporaries as required. Signed-off-by: Mark Cave-Ayland Messa

[Qemu-devel] [PATCH 14/34] target/ppc: switch FPR, VMX and VSX helpers to access data directly from cpu_env

From: Mark Cave-Ayland Instead of accessing the FPR, VMX and VSX registers through static arrays of TCGv_i64 globals, remove them and change the helpers to load/store data directly within cpu_env. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Message-Id: <20181217122405.18732-

[Qemu-devel] [PATCH 19/34] target/ppc: convert vspltis[bhw] to use vector operations

Signed-off-by: Richard Henderson --- target/ppc/helper.h | 3 --- target/ppc/int_helper.c | 15 target/ppc/translate/vmx-impl.inc.c | 36 +++-- 3 files changed, 8 insertions(+), 46 deletions(-) diff --git a/target/ppc/helper.h b/t

[Qemu-devel] [PATCH 32/34] target/ppc: Split out VSCR_SAT to a vector field

Change the representation of VSCR_SAT such that it is easy to set from vector code. Signed-off-by: Richard Henderson --- target/ppc/cpu.h| 4 +++- target/ppc/int_helper.c | 11 --- 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.

[Qemu-devel] [PATCH 07/34] tcg: Add opcodes for vector minmax arithmetic

Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime.h | 20 tcg/aarch64/tcg-target.h | 1 + tcg/i386/tcg-target.h| 1 + tcg/tcg-op-gvec.h| 10 ++ tcg/tcg-op.h | 4 + tcg/tcg-opc.h| 4 + tcg/tcg.h

[Qemu-devel] [PATCH 30/34] target/ppc: Use mtvscr/mfvscr for vmstate

This is required before changing the representation of the register. Signed-off-by: Richard Henderson --- target/ppc/machine.c | 44 +--- 1 file changed, 41 insertions(+), 3 deletions(-) diff --git a/target/ppc/machine.c b/target/ppc/machine.c index 451cf

[Qemu-devel] [PATCH 18/34] target/ppc: convert vaddu[b, h, w, d] and vsubu[b, h, w, d] over to use vector operations

From: Mark Cave-Ayland Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Message-Id: <20181217122405.18732-10-mark.cave-ayl...@ilande.co.uk> --- target/ppc/helper.h | 8 target/ppc/int_helper.c | 7 --- target/ppc/translate/vmx-impl.inc.c

[Qemu-devel] [PATCH 22/34] target/ppc: convert VSX logical operations to vector operations

Signed-off-by: Richard Henderson --- target/ppc/translate/vsx-impl.inc.c | 43 - 1 file changed, 17 insertions(+), 26 deletions(-) diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c index 1608ad48b1..8ab1290026 100644 --- a/target/

[Qemu-devel] [PATCH 02/34] target/arm: Rely on optimization within tcg_gen_gvec_or

Since we're now handling a == b generically, we no longer need to do it by hand within target/arm/. Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 6 +- target/arm/translate-sve.c | 6 +- target/arm/translate.c | 12 +++- 3 files changed, 5 insertions(+),

[Qemu-devel] [PATCH 13/34] target/ppc: introduce get_cpu_vsr{l, h}() and set_cpu_vsr{l, h}() helpers for VSR register access

From: Mark Cave-Ayland These helpers allow us to move VSR register values to/from the specified TCGv_i64 argument. To prevent VSX helpers accessing the cpu_vsr array directly, add extra TCG temporaries as required. Signed-off-by: Mark Cave-Ayland Message-Id: <20181217122405.18732-4-mark.cave-

[Qemu-devel] [PATCH 31/34] target/ppc: Add set_vscr_sat

This is required before changing the representation of the register. Signed-off-by: Richard Henderson --- target/ppc/int_helper.c | 29 + 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 75201bbba6

[Qemu-devel] [PATCH 21/34] target/ppc: nand, nor, eqv are now generic vector operations

Signed-off-by: Richard Henderson --- target/ppc/translate/vmx-impl.inc.c | 26 +++--- 1 file changed, 3 insertions(+), 23 deletions(-) diff --git a/target/ppc/translate/vmx-impl.inc.c b/target/ppc/translate/vmx-impl.inc.c index 529ae0e5f5..329131d30b 100644 --- a/target/ppc/

[Qemu-devel] [PATCH 16/34] target/ppc: move FP and VMX registers into aligned vsr register array

From: Mark Cave-Ayland The VSX register array is a block of 64 128-bit registers where the first 32 registers consist of the existing 64-bit FP registers extended to 128-bit using new VSR registers, and the last 32 registers are the VMX 128-bit registers as show below: 64-bit

[Qemu-devel] [PATCH 05/34] tcg: Add opcodes for vector saturated arithmetic

Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 1 + tcg/i386/tcg-target.h| 1 + tcg/tcg-op.h | 4 ++ tcg/tcg-opc.h| 4 ++ tcg/tcg.h| 1 + tcg/tcg-op-gvec.c| 84 ++-- tcg/tcg-op-vec.c

[Qemu-devel] [PATCH 10/34] target/arm: Use vector minmax expanders for aarch32

Signed-off-by: Richard Henderson --- target/arm/translate.c | 25 +++-- 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index 33b1860148..f3f172f384 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c

[Qemu-devel] [PATCH 23/34] target/ppc: convert xxspltib to vector operations

Signed-off-by: Richard Henderson --- target/ppc/translate/vsx-impl.inc.c | 12 +--- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c index 8ab1290026..d88d6bbd74 100644 --- a/target/ppc/translate/vsx-i

[Qemu-devel] [PATCH 00/34] tcg, target/ppc vector improvements

This implements some of the things that I talked about with Mark this morning / yesterday. In particular: (0) Implement expanders for nand, nor, eqv logical operations. (1) Implement saturating arithmetic for the tcg backend. While I had expanders for these, they always went to helpers.

[Qemu-devel] [PATCH 26/34] target/ppc: Pass integer to helper_mtvscr

We can re-use this helper elsewhere if we're not passing in an entire vector register. Signed-off-by: Richard Henderson --- target/ppc/helper.h | 2 +- target/ppc/int_helper.c | 10 +++--- target/ppc/translate/vmx-impl.inc.c | 17 + 3 files change

[Qemu-devel] [PATCH 12/34] target/ppc: introduce get_avr64() and set_avr64() helpers for VMX register access

From: Mark Cave-Ayland These helpers allow us to move AVR register values to/from the specified TCGv_i64 argument. To prevent VMX helpers accessing the cpu_avr{l,h} arrays directly, add extra TCG temporaries as required. Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Message-

[Qemu-devel] [PATCH 33/34] target/ppc: convert vadd*s and vsub*s to vector operations

Signed-off-by: Richard Henderson --- target/ppc/helper.h | 24 ++-- target/ppc/int_helper.c | 18 ++--- target/ppc/translate/vmx-impl.inc.c | 57 +++-- 3 files changed, 61 insertions(+), 38 deletions(-) diff --git a/target/ppc/helpe

[Qemu-devel] [PATCH 28/34] target/ppc: Remove vscr_nj and vscr_sat

These macros are no longer used. Signed-off-by: Richard Henderson --- target/ppc/cpu.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index c8f449081d..a2fe6058b1 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -700,8 +700,6 @@ enum { /* Vector

[Qemu-devel] [PATCH 06/34] tcg/i386: Implement vector saturating arithmetic

Only MO_8 and MO_16 are implemented, since that's all the instruction set provides. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.h | 2 +- tcg/i386/tcg-target.inc.c | 42 +++ 2 files changed, 43 insertions(+), 1 deletion(-) diff --git a/tcg/i

[Qemu-devel] [PATCH 15/34] target/ppc: merge ppc_vsr_t and ppc_avr_t union types

From: Mark Cave-Ayland Since the VSX registers are actually a superset of the VMX registers then they can be represented by the same type. Merge ppc_avr_t into ppc_vsr_t and change ppc_avr_t to be a simple typedef alias. Note that due to a difference in the naming of the float32 member between p

[Qemu-devel] [PATCH 08/34] tcg/i386: Implement vector minmax arithmetic

The instruction set does not directly provide MO_64. We can still implement signed 64-bit with comparison and vpblendvb. Since the ISA has no unsigned comparison, it would take 4 insns to implement unsigned 64-bit, which is probably quicker as integers. Signed-off-by: Richard Henderson --- tcg

[Qemu-devel] [PATCH 25/34] target/ppc: convert xxsel to vector operations

Signed-off-by: Richard Henderson --- target/ppc/translate/vsx-impl.inc.c | 55 ++--- 1 file changed, 27 insertions(+), 28 deletions(-) diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c index a040038ed4..dc32471cd7 100644 --- a/target/

[Qemu-devel] [PATCH 17/34] target/ppc: convert VMX logical instructions to use vector operations

From: Mark Cave-Ayland Signed-off-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Message-Id: <20181217122405.18732-9-mark.cave-ayl...@ilande.co.uk> --- target/ppc/translate.c | 1 + target/ppc/translate/vmx-impl.inc.c | 63 - 2 files changed, 37 i

[Qemu-devel] [PATCH 09/34] target/arm: Use vector minmax expanders for aarch64

Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 35 ++- 1 file changed, 14 insertions(+), 21 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 2d6f8c1b4f..bef21ada71 100644 --- a/target/arm/translate-a64.c ++

[Qemu-devel] [PATCH 03/34] tcg: Add gvec expanders for nand, nor, eqv

Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime.h | 3 +++ tcg/tcg-op-gvec.h| 6 + tcg/tcg-op.h | 3 +++ accel/tcg/tcg-runtime-gvec.c | 33 +++ tcg/tcg-op-gvec.c| 51 tcg/tcg-op

[Qemu-devel] [PATCH 04/34] tcg: Add write_aofs to GVecGen4

This allows writing 2 output, 3 input operations. Signed-off-by: Richard Henderson --- tcg/tcg-op-gvec.h | 2 ++ tcg/tcg-op-gvec.c | 27 +++ 2 files changed, 21 insertions(+), 8 deletions(-) diff --git a/tcg/tcg-op-gvec.h b/tcg/tcg-op-gvec.h index d65b9d9d4c..2cb447112e

Re: [Qemu-devel] [PATCH 2/3] mac_newworld: enable access to EDID data for the VGA device

Hi, > >> Otherwise a guest driver that assumes it is always present and tries > >> to read from that area of memory will crash. > > > > Oh, reading should work no matter what. You just don't find valid edid > > data there if it is turned off. > > Thanks for the info. My current use case for t

Re: [Qemu-devel] Monitor and serial output window broken with SDL2

Hi, > > > > > Doesn't reproduce too. It's also not clear why x86_64 should behave > > > > > different that ppc. There is no arch-specific code ui/, so there > > > > > should > > > > > be no difference, exept for hardware like paralle ports which are not > > > > > supported by all machine type

[Qemu-devel] [PULL 31/31] hw/i386: Remove deprecated machines pc-0.10 and pc-0.11

From: Thomas Huth They've been deprecated for two releases and nobody complained that they are still required anymore, so it's time to remove these now. And while we're at it, mark the other remaining old 0.x machine types as deprecated (since they can not properly be used for live-migration anyw

[Qemu-devel] [PULL 30/31] hw: acpi: Remove AcpiRsdpDescriptor and fix tests

From: Samuel Ortiz The only remaining AcpiRsdpDescriptor users are the ACPI utils for the BIOS table tests. We remove that dependency and can thus remove the structure itself. Signed-off-by: Samuel Ortiz Reviewed-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: Michael S. Tsirkin Sig

[Qemu-devel] [PULL 24/31] hw: arm: acpi: Fix incorrect checksums in RSDP

From: Igor Mammedov When RSDP table was introduced (d4bec5d87), we calculated only legacy checksum, and that was incorrect as it - specified rev=2 and forgot about extended checksum. - legacy checksum calculated on full table instead of the 1st 20 bytes Fix it by adding extended checksum calcu

[Qemu-devel] [PULL 25/31] hw: i386: Use correct RSDT length for checksum

From: Igor Mammedov AcpiRsdpDescriptor describes revision 2 RSDP table so using sizeof(*rsdp) for checksum calculation isn't correct since we are adding extra 16 bytes. But acpi_data_push() zeroes out table, so just by luck we are summing up exta zeros which still yelds correct checksum. Fix it

[Qemu-devel] [PULL 19/31] intel_iommu: convert invalid traces into error reports

From: Peter Xu Report more *_invalid() tracepoints to error_report_once() so that we can detect issues even without tracing enabled. Drop those tracepoints. Signed-off-by: Peter Xu Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/intel_iommu.c | 58 +

Re: [Qemu-devel] [PULL 00/31] pci, pc, virtio: fixes, features

On Mon, Dec 17, 2018 at 11:16:42PM -0500, Michael S. Tsirkin wrote: > The following changes since commit f163448536e5f7ae8905b14547eab37a41a75f6c: > > Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20181216' into > staging (2018-12-17 13:04:25 +) > > are available in the Git repos

[Qemu-devel] [PULL 18/31] intel_iommu: dump correct iova when failed

From: Peter Xu The iotlb.iova can be zero if failure really happened. Dump the addr instead. Signed-off-by: Peter Xu Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/intel_iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/i386/intel_

[Qemu-devel] [PULL 29/31] hw: acpi: Export and share the ARM RSDP build

From: Samuel Ortiz Now that build_rsdp() supports building both legacy and current RSDP tables, we can move it to a generic folder (hw/acpi) and have the i386 ACPI code reuse it in order to reduce code duplication. Signed-off-by: Samuel Ortiz Reviewed-by: Igor Mammedov Reviewed-by: Michael S.

Re: [Qemu-devel] [PATCH] spapr: Add H-Call H_HOME_NODE_ASSOCIATIVITY

On Mon, Dec 17, 2018 at 03:00:55PM +0100, Laurent Vivier wrote: > H_HOME_NODE_ASSOCIATIVITY H-Call returns the associativity domain > designation associated with the identifier input parameter. > > Remove the warning message from the kernel: > VPHN is not supported. Disabling polling.. > > Sign

Re: [Qemu-devel] [PATCH qemu v3] ppc/spapr: Receive and store device tree blob from SLOF

On 18/12/2018 14:49, David Gibson wrote: > On Tue, Dec 18, 2018 at 02:04:54PM +1100, Alexey Kardashevskiy wrote: >> >> >> On 18/12/2018 13:09, David Gibson wrote: >>> On Mon, Dec 17, 2018 at 05:21:33PM +1100, David Gibson wrote: On Fri, Dec 14, 2018 at 12:55:20PM +1100, Alexey Kardashevskiy

[Qemu-devel] [PULL 17/31] pcie: Fast PCIe root ports for new machines

From: Alex Williamson Change the default speed and width for new machine types to the fastest and widest currently supported. This should be compatible to the PCIe 4.0 spec. Pre-QEMU-4.0 machine types remain at 2.5GT/s, x1 width. Cc: Marcel Apfelbaum Reviewed-by: Eric Auger Signed-off-by: Al

[Qemu-devel] [PULL 20/31] intel_iommu: dma read/write draining support

From: Peter Xu Support DMA read/write draining should be easy for existing VT-d emulation since the emulation itself does not have any request queue there so we don't need to do anything to flush the un-commited queue. What we need to do is to declare the support. These capabilities are required

[Qemu-devel] [PULL 26/31] hw: arm: Carry RSDP specific data through AcpiRsdpData

From: Samuel Ortiz That will allow us to generalize the ARM build_rsdp() routine to support both legacy RSDP (The current i386 implementation) and extended RSDP (The ARM implementation). Signed-off-by: Samuel Ortiz Reviewed-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: Michael S. T

[Qemu-devel] [PULL 08/31] hw/smbios: Move to the hw/firmware/ subdirectory

From: Philippe Mathieu-Daudé SMBIOS is just another firmware interface used by some QEMU models. We will later introduce more firmware interfaces in this subdirectory. Reviewed-by: Laszlo Ersek Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsi

[Qemu-devel] [PULL 28/31] hw: arm: Support both legacy and current RSDP build

From: Samuel Ortiz We add the ability to build legacy or current RSDP tables, based on the AcpiRsdpData revision field passed to build_rsdp(). Although arm/virt only uses RSDP v2, adding that capability to build_rsdp will allow us to share the RSDP build code between ARM and x86. Signed-off-by:

[Qemu-devel] [PULL 13/31] pcie: Add link speed and width fields to PCIESlot

From: Alex Williamson Add fields allowing the PCIe link speed and width of a PCIESlot to be configured, with an instance_post_init callback on the root port parent class to set defaults. This allows child classes to set these via properties or via their own instance_init callback, without requir

[Qemu-devel] [PULL 23/31] hw: acpi: The RSDP build API can return void

From: Samuel Ortiz For both x86 and ARM architectures, the internal RSDP build API can return void as the current return value is unused. Signed-off-by: Samuel Ortiz Reviewed-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Rev

[Qemu-devel] [PULL 09/31] hw/pci-bridge: Fix invalid free()

From: Matthias Weckbecker When loadvm'ing a *running* snapshot qemu crashes due to an invalid free. It's fortunately caught early by glibc heap memory corruption protection and qemu gets killed with SIGABRT. Steps to reproduce: 1) Create VM (e.g w/ virsh define) 2) Start the VM and take a snaps

[Qemu-devel] [PULL 27/31] hw: arm: Convert the RSDP build to the buid_append_foo() API

From: Samuel Ortiz Instead of filling a mapped and packed C structure field in random order and being careful about endianness and sizes, build_rsdp() now uses build_append_int_noprefix() to compose RSDP table. This makes reviewing and maintaining code easier as this is almost matching 1:1 the A

[Qemu-devel] [PULL 03/31] virtio: Helper for registering virtio device types

From: Eduardo Habkost Introduce a helper for registering different flavours of virtio devices. Convert code to use the helper, but keep only the existing generic types. Transitional and non-transitional device types will be added by another patch. Acked-by: Andrea Bolognani Reviewed-by: Corne

[Qemu-devel] [PULL 07/31] hw/smbios: Remove "smbios_ipmi.h"

From: Philippe Mathieu-Daudé This header only declare a single function: smbios_build_type_38_table(). We already have a header that declares such functions: "smbios_build.h". Move the declaration and remove the header. Reviewed-by: Corey Minyard Reviewed-by: Laszlo Ersek Signed-off-by: Philip

[Qemu-devel] [PULL 22/31] intel_iommu: turn on IR by default

From: Peter Xu IR has been there for a long time and long time no bug reported. Let's turn it on by default to match general hardwares. Providing compatibility bit for QEMU<=3.1. Signed-off-by: Peter Xu Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/i386/pc

[Qemu-devel] [PULL 14/31] pcie: Fill PCIESlot link fields to support higher speeds and widths

From: Alex Williamson Make use of the PCIESlot speed and width fields to update link information beyond those configured in pcie_cap_v1_fill(). This is only called for devices supporting a version 2 capability and automatically skips any non-PCIESlot devices. Only devices with increased link va

Re: [Qemu-devel] sheepdog build warning

On Mon, Dec 17, 2018 at 11:03:11PM -0500, Michael S. Tsirkin wrote: > mingw32 build on fedora fails with this warning: > > /scm/qemu/block/sheepdog.c: In function 'find_vdi_name': > /scm/qemu/block/sheepdog.c:1239:5: error: 'strncpy' specified bound 256 > equals destination size [-Werror=stringop

[Qemu-devel] [PULL 06/31] hw/smbios: Restrict access to "hw/smbios/ipmi.h"

From: Philippe Mathieu-Daudé All the consumers of "hw/smbios/ipmi.h" are located in hw/smbios/. There is no need to have this include publicly exposed, reduce the visibility by moving it in hw/smbios/. Reviewed-by: Laszlo Ersek Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsir

[Qemu-devel] [PULL 21/31] intel_iommu: remove "x-" prefix for "aw-bits"

From: Peter Xu We're going to have 57bits aw-bits support sooner. It's possibly time to remove the "x-" prefix. Signed-off-by: Peter Xu Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/intel_iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --g

[Qemu-devel] [PULL 16/31] vfio/pci: Remove PCIe Link Status emulation

From: Alex Williamson Now that the downstream port will virtually negotiate itself to the link status of the downstream device, we can remove this emulation. It's not clear that it was every terribly useful anyway. Tested-by: Geoffrey McRae Reviewed-by: Eric Auger Signed-off-by: Alex Williamso

[Qemu-devel] [PULL 02/31] pc:piix4: Update smbus I/O space after a migration

From: Corey Minyard Otherwise it won't be set up correctly and won't work after miigration. Signed-off-by: Corey Minyard Cc: Igor Mammedov Cc: qemu-sta...@nongnu.org Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/acpi/piix4.c | 1 + 1 file changed, 1 insertion(+)

[Qemu-devel] [PULL 05/31] tests: Remove unused include

From: Philippe Mathieu-Daudé The "hw/smbios/smbios.h" include is not used, remove it. Reviewed-by: Laszlo Ersek Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/acpi-utils.c | 1 - 1 file changed, 1 deletion(-) diff --git a/t

[Qemu-devel] [PULL 12/31] qapi: Define PCIe link speed and width properties

From: Alex Williamson Create properties to be able to define speeds and widths for PCIe links. The only tricky bit here is that our get and set callbacks translate from the fixed QAPI automagic enums to those we define in PCI code to represent the actual register segment value. Cc: Eric Blake

[Qemu-devel] [PULL 15/31] pcie: Allow generic PCIe root port to specify link speed and width

From: Alex Williamson Allow users to experimentally specify speed and width values for the generic PCIe root port. Defaults remain at 2.5GT/s & x1 for compatiblity with the intent to only support changing defaults via machine types for now. Note for libvirt testing that pcie-root-port controlle

[Qemu-devel] [PULL 00/31] pci, pc, virtio: fixes, features

The following changes since commit f163448536e5f7ae8905b14547eab37a41a75f6c: Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20181216' into staging (2018-12-17 13:04:25 +) are available in the Git repository at: git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstrea

[Qemu-devel] [PULL 01/31] pcie: set link state inactive/active after hot unplug/plug

From: Zheng Xiang When VM boots from the latest version of linux kernel, after hot-unpluging virtio-blk disks which are hotplugged into pcie-root-port, the VM's dmesg log shows: [ 151.046242] pciehp :00:05.0:pcie004: pending interrupts 0x0001 from Slot Status [ 151.046365] pciehp :00:

[Qemu-devel] [PULL 10/31] pcie: Create enums for link speed and width

From: Alex Williamson In preparation for reporting higher virtual link speeds and widths, create enums and macros to help us manage them. Cc: Marcel Apfelbaum Tested-by: Geoffrey McRae Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Eric Auger Signed-off-by: Alex Williamson Reviewed-by: Mi

[Qemu-devel] [PULL 11/31] pci: Sync PCIe downstream port LNKSTA on read

From: Alex Williamson The PCIe link speed and width between a downstream device and its upstream port is negotiated on real hardware and susceptible to dynamic changes due to signal issues and power management. In the emulated device case there is no real hardware link, but we still might wish t

Re: [Qemu-devel] [PATCH qemu v3] ppc/spapr: Receive and store device tree blob from SLOF

On Tue, Dec 18, 2018 at 02:04:54PM +1100, Alexey Kardashevskiy wrote: > > > On 18/12/2018 13:09, David Gibson wrote: > > On Mon, Dec 17, 2018 at 05:21:33PM +1100, David Gibson wrote: > >> On Fri, Dec 14, 2018 at 12:55:20PM +1100, Alexey Kardashevskiy wrote: > >>> SLOF receives a device tree and u

[Qemu-devel] sheepdog build warning

mingw32 build on fedora fails with this warning: /scm/qemu/block/sheepdog.c: In function 'find_vdi_name': /scm/qemu/block/sheepdog.c:1239:5: error: 'strncpy' specified bound 256 equals destination size [-Werror=stringop-truncation] strncpy(buf + SD_MAX_VDI_LEN, tag, SD_MAX_VDI_TAG_LEN);

[Qemu-devel] [PULL 04/31] virtio: Provide version-specific variants of virtio PCI devices

From: Eduardo Habkost Many of the current virtio-*-pci device types actually represent 3 different types of devices: * virtio 1.0 non-transitional devices * virtio 1.0 transitional devices * virtio 0.9 ("legacy device" in virtio 1.0 terminology) That would be just an annoyance if it didn't break

Re: [Qemu-devel] [PATCH v9 6/7] spapr: change default CPU type to POWER9

On Mon, Dec 17, 2018 at 11:34:44PM +0100, Cédric Le Goater wrote: > Signed-off-by: Cédric Le Goater Fixed up for my removal of the update_dt patch, and applied. > --- > hw/ppc/spapr.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c > i

Re: [Qemu-devel] [PATCH v9 0/7] ppc: support for the XIVE interrupt controller (POWER9)

On Mon, Dec 17, 2018 at 11:34:38PM +0100, Cédric Le Goater wrote: > Hello, > > Here is the version 9 of the QEMU models adding support for the XIVE > interrupt controller to the sPAPR machine, under TCG only. > > The 'dual' machine, supporting both interrupt modes, is nearly complete, > only rem

Re: [Qemu-devel] [PATCH v9 3/7] spapr/xive: fix compilation breakage on windows

On Mon, Dec 17, 2018 at 11:34:41PM +0100, Cédric Le Goater wrote: > Signed-off-by: Cédric Le Goater Applied, and folded into "spapr: add hcalls support for the XIVE exploitation interrupt mode". > --- > hw/intc/spapr_xive.c | 46 +++- > 1 file changed, 2

Re: [Qemu-devel] [PATCH 5/5] intel_iommu: turn on IR by default

On Mon, Dec 17, 2018 at 03:31:14PM +0800, Peter Xu wrote: > IR has been there for a long time and long time no bug reported. > Let's turn it on by default to match general hardwares. Providing > compatibility bit for QEMU<=3.1. > > Signed-off-by: Peter Xu I forgot that IR will depend on split k

Re: [Qemu-devel] [PATCH qemu v3] ppc/spapr: Receive and store device tree blob from SLOF

On 18/12/2018 13:09, David Gibson wrote: > On Mon, Dec 17, 2018 at 05:21:33PM +1100, David Gibson wrote: >> On Fri, Dec 14, 2018 at 12:55:20PM +1100, Alexey Kardashevskiy wrote: >>> SLOF receives a device tree and updates it with various properties >>> before switching to the guest kernel and QE

Re: [Qemu-devel] [PATCH v5 6/8] pcie: Allow generic PCIe root port to specify link speed and width

On Mon, Dec 17, 2018 at 06:54:32PM -0700, Alex Williamson wrote: > On Mon, 17 Dec 2018 20:47:26 -0500 > "Michael S. Tsirkin" wrote: > > > On Mon, Dec 17, 2018 at 06:44:04PM -0700, Alex Williamson wrote: > > > On Mon, 17 Dec 2018 20:29:37 -0500 > > > "Michael S. Tsirkin" wrote: > > > > > > > O

Re: [Qemu-devel] [PATCH qemu v3] ppc/spapr: Receive and store device tree blob from SLOF

On Mon, Dec 17, 2018 at 05:21:33PM +1100, David Gibson wrote: > On Fri, Dec 14, 2018 at 12:55:20PM +1100, Alexey Kardashevskiy wrote: > > SLOF receives a device tree and updates it with various properties > > before switching to the guest kernel and QEMU is not aware of any changes > > made by SLOF

Re: [Qemu-devel] [PATCH v9 2/7] target/ppc: replace __builtin_ffssl() by the equivalent ctz routines

On Mon, Dec 17, 2018 at 11:34:40PM +0100, Cédric Le Goater wrote: > And remove the intermediate MASK_TO_LSH macro which does not add any value. > > This fixes a compile breakage on windows. > > Signed-off-by: Cédric Le Goater It's an improvement over what's there, but it still leaves macros who

Re: [Qemu-devel] [PATCH v8 09/12] spapr: set the interrupt presenter at reset

On Mon, Dec 17, 2018 at 11:41:34PM +0100, Cédric Le Goater wrote: > On 12/17/18 7:01 AM, David Gibson wrote: > > On Thu, Dec 13, 2018 at 01:52:14PM +0100, Cédric Le Goater wrote: > >> On 12/11/18 11:38 PM, Cédric Le Goater wrote: > >>> Currently, the interrupt presenter of the vCPU is set at realiz

Re: [Qemu-devel] [PATCH v9 1/7] target/ppc: fix the PPC_BIT definitions

On Mon, Dec 17, 2018 at 11:34:39PM +0100, Cédric Le Goater wrote: > Change the PPC_BIT macro to use ULL instead of UL and the PPC_BIT32 > and PPC_BIT8 not to use any suffix. > > This fixes a compile breakage on windows. > > Signed-off-by: Cédric Le Goater Applied (before the rest of the XIVE pa

Re: [Qemu-devel] [PATCH] pcie: set link state inactive/active after hot unplug/plug

On Wed, Dec 05, 2018 at 08:23:35AM +0200, Marcel Apfelbaum wrote: > > > On 12/3/18 9:05 AM, Zheng Xiang wrote: > > When VM boots from the latest version of linux kernel, after > > hot-unpluging virtio-blk disks which are hotplugged into > > pcie-root-port, the VM's dmesg log shows: > > > > [ 15

Re: [Qemu-devel] [PATCH V6 0/6] nvdimm: support MAP_SYNC for memory-backend-file

On 2018-12-17 at 10:27:50 -0500, Michael S. Tsirkin wrote: > On Mon, Dec 17, 2018 at 01:53:54PM +0800, Yi Zhang wrote: > > On 2018-12-12 at 10:06:13 -0500, Michael S. Tsirkin wrote: > > > On Wed, Dec 12, 2018 at 04:11:44PM +0800, Zhang Yi wrote: > > > > Linux 4.15 introduces a new mmap flag MAP_SYN

Re: [Qemu-devel] [PATCH v5 6/8] pcie: Allow generic PCIe root port to specify link speed and width

On Mon, 17 Dec 2018 20:47:26 -0500 "Michael S. Tsirkin" wrote: > On Mon, Dec 17, 2018 at 06:44:04PM -0700, Alex Williamson wrote: > > On Mon, 17 Dec 2018 20:29:37 -0500 > > "Michael S. Tsirkin" wrote: > > > > > On Wed, Dec 12, 2018 at 12:39:43PM -0700, Alex Williamson wrote: > > > > Allow u

Re: [Qemu-devel] [PATCH v5 6/8] pcie: Allow generic PCIe root port to specify link speed and width

On Mon, Dec 17, 2018 at 06:44:04PM -0700, Alex Williamson wrote: > On Mon, 17 Dec 2018 20:29:37 -0500 > "Michael S. Tsirkin" wrote: > > > On Wed, Dec 12, 2018 at 12:39:43PM -0700, Alex Williamson wrote: > > > Allow users to experimentally specify speed and width values for the > > > generic PCIe

Re: [Qemu-devel] [PULL v3 08/15] tests/fp: add fp-bench

On Mon, Dec 17, 2018 at 10:56:43 +, Alex Bennée wrote: > From: "Emilio G. Cota" > +static void update_random_ops(int n_ops, enum precision prec) > +{ > +int i; > + > +for (i = 0; i < n_ops; i++) { > +uint64_t r = random_ops[i]; > + > +if (prec == PREC_SINGLE || PREC_FLO

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