[Qemu-devel] Virtual IOMMU is working for Windows VM?

Hi, I wonder if vIOMMU is working for Windows VM? I tried it with v2.11.0, but it didn't seem to work. I assume that seaBIOS sets IOMMU on by default as is the case when I launched a Linux VM. But I might be missing something. Can somebody shed some light on it? Thanks, Jintack

Re: [Qemu-devel] [PATCH] vhost-scsi: prevent using uninitialized vqs

Ping? On 2018-10-12 17:07, yuchen...@synology.com wrote: From: yuchenlin There are 3 virtqueues (ctrl, event and cmd) for virtio scsi device, but seabios will only set the physical address for the 3rd one (cmd). Then in vhost_virtqueue_start(), virtio_queue_get_desc_addr() will be 0 for ctrl a

Re: [Qemu-devel] [PATCH 7/7] vfio: platform: destory mutex in error path

Hello Auger, Auger Eric 于2018年10月20日周六 上午12:41写道： > Hi Li, > > On 10/19/18 7:20 AM, Li Qiang wrote: > > Signed-off-by: Li Qiang > > --- > > hw/vfio/platform.c | 4 +++- > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c > > index ba1

Re: [Qemu-devel] [PATCH] hw/arm/virt: remove unused header files

On 19 October 2018 at 19:59, Peter Maydell wrote: > On 19 October 2018 at 11:18, Hongbo Zhang wrote: >> Remove the unused herder files, 'virt' can be compiled and run without >> including them. >> >> Signed-off-by: Hongbo Zhang >> --- >> hw/arm/virt.c | 8 >> 1 file changed, 8 deletion

Re: [Qemu-devel] [PATCH v3 3/4] hw/arm: versal: Add a model of Xilinx Versal SoC

On 21 October 2018 at 20:24, Edgar E. Iglesias wrote: > On Fri, Oct 19, 2018 at 03:18:24PM +0100, Peter Maydell wrote: >> On 17 October 2018 at 22:39, Edgar E. Iglesias >> wrote: >> > From: "Edgar E. Iglesias" >> > >> > Add a model of Xilinx Versal SoC. >> > >> > Signed-off-by: Edgar E. Iglesia

Re: [Qemu-devel] [PATCH v3 2/2] slirp: Implement RFC2132 TFTP server name

Hello, Fam Zheng, le ven. 14 sept. 2018 15:26:16 +0800, a ecrit: > This new usernet option can be used to add data for option 66 (tftp > server name) in the BOOTP reply, which is useful in PXE based automatic > OS install such as OpenBSD. Applied to my tree, thanks! Samuel

Re: [Qemu-devel] [PATCH v3 1/2] slirp: Add sanity check for str option length

Hello, Fam Zheng, le ven. 14 sept. 2018 15:26:15 +0800, a ecrit: > When user provides a long domainname or hostname that doesn't fit in the > DHCP packet, we mustn't overflow the response packet buffer. Instead, > report errors, following the g_warning() in the slirp->vdnssearch > branch. > > Als

[Qemu-devel] [PULL 0/2] slirp updates

The following changes since commit b312532fd03413d0e6ae6767ec793a3e30f487b8: Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2018-10-19 19:01:07 +0100) are available in the Git repository at: https://people.debian.org/~sthibault/qemu.git tags/samuel-thibault

Re: [Qemu-devel] [PATCH v3 3/4] hw/arm: versal: Add a model of Xilinx Versal SoC

On Fri, Oct 19, 2018 at 03:18:24PM +0100, Peter Maydell wrote: > On 17 October 2018 at 22:39, Edgar E. Iglesias > wrote: > > From: "Edgar E. Iglesias" > > > > Add a model of Xilinx Versal SoC. > > > > Signed-off-by: Edgar E. Iglesias > > --- > > default-configs/aarch64-softmmu.mak | 1 + > >

[Qemu-devel] [PULL 1/2] slirp: Add sanity check for str option length

From: Fam Zheng When user provides a long domainname or hostname that doesn't fit in the DHCP packet, we mustn't overflow the response packet buffer. Instead, report errors, following the g_warning() in the slirp->vdnssearch branch. Also check the strlen against 256 when initializing slirp, whic

[Qemu-devel] [PULL 2/2] slirp: Implement RFC2132 TFTP server name

From: Fam Zheng This new usernet option can be used to add data for option 66 (tftp server name) in the BOOTP reply, which is useful in PXE based automatic OS install such as OpenBSD. Signed-off-by: Fam Zheng Reviewed-by: Thomas Huth Tested-by: Gerd Hoffmann Signed-off-by: Samuel Thibault --

[Qemu-devel] [PATCH] ps2kbd: default to scan enabled after reset

A check for scan_enabled has been added to ps2_keyboard_event in commit 143c04c7e0639e53086519592ead15d2556bfbf2 to prevent stream corruption. This works well as long as operating system is resetting keyboard, or enabling it. This fixes IBM 40p firmware, which doesn't bother sending KBD_CMD_RESET

Re: [Qemu-devel] [PULL 02/45] vl.c deprecate incorrect CPUs topology

On Thu, Oct 18, 2018 at 05:03:39PM -0300, Eduardo Habkost wrote: > From: Igor Mammedov > > -smp [cpus],sockets/cores/threads[,maxcpus] should describe topology > so that total number of logical CPUs [sockets * cores * threads] > would be equal to [maxcpus], however historically we didn't have > s

Re: [Qemu-devel] [PULL 01/45] hostmem-file: fixed the memory leak while get pmem path.

On Thu, Oct 18, 2018 at 05:03:38PM -0300, Eduardo Habkost wrote: > From: Zhang Yi > > object_get_canonical_path_component() returns a string which > must be freed using g_free(). > > Reported-by: Peter Maydell > Signed-off-by: Michael S. Tsirkin > Signed-off-by: Zhang Yi > Message-Id: > <732

[Qemu-devel] [PATCH v1] bt: use size_t type for length parameters instead of int

From: Prasad J Pandit The length parameter values are not negative, thus use an unsigned type 'size_t' for them. Many routines pass 'len' values to memcpy(3) calls. If it was negative, it could lead to memory corruption issues. Add check to avoid it. Reported-by: Arash TC Signed-off-by: Prasad

[Qemu-devel] [PATCH v3] scripts/qemu-binfmt-conf.sh: add bFLT handler registration

bFLT format header doesn't have enough information to register a handler for a specific architecture. Add switch -f / --flat that registers one of the qemu binaries as a handler for bFLT executable images. Signed-off-by: Max Filippov --- Changes v2->v3: - fix bFLT in the patch subject Changes v1

[Qemu-devel] [PATCH v8 34/38] tests/tcg/mips: Test R5900 three-operand MADD1

Signed-off-by: Fredrik Noring --- tests/tcg/mips/mipsr5900/madd.c | 43 + 1 file changed, 38 insertions(+), 5 deletions(-) diff --git a/tests/tcg/mips/mipsr5900/madd.c b/tests/tcg/mips/mipsr5900/madd.c index 9ad2ea6dbb..f6f215e1c3 100644 --- a/tests/tcg/mips/mipsr

[Qemu-devel] [PATCH v8 32/38] tests/tcg/mips: Test R5900 DIVU1

Signed-off-by: Fredrik Noring --- tests/tcg/mips/mipsr5900/Makefile | 1 + tests/tcg/mips/mipsr5900/divu1.c | 48 +++ 2 files changed, 49 insertions(+) create mode 100644 tests/tcg/mips/mipsr5900/divu1.c diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/m

[Qemu-devel] [PATCH v8 37/38] target/mips: Define the R5900 CPU

The primary purpose of this change is to support programs compiled by GCC for the R5900 target and thereby run R5900 Linux distributions, for example Gentoo. GCC in version 7.3, by itself, by inspection of the GCC source code and inspection of the generated machine code, for the R5900 target, only

[Qemu-devel] [PATCH v8 29/38] tests/tcg/mips: Test R5900 MFLO1 and MFHI1

Signed-off-by: Fredrik Noring --- tests/tcg/mips/mipsr5900/Makefile | 3 ++- tests/tcg/mips/mipsr5900/mflohi1.c | 35 ++ 2 files changed, 37 insertions(+), 1 deletion(-) create mode 100644 tests/tcg/mips/mipsr5900/mflohi1.c diff --git a/tests/tcg/mips/mipsr5900/Mak

[Qemu-devel] [PATCH v8 36/38] tests/tcg/mips: Test R5900 three-operand MADDU1

Signed-off-by: Fredrik Noring --- tests/tcg/mips/mipsr5900/maddu.c | 37 ++-- 1 file changed, 35 insertions(+), 2 deletions(-) diff --git a/tests/tcg/mips/mipsr5900/maddu.c b/tests/tcg/mips/mipsr5900/maddu.c index e4e552102d..30936fb2b4 100644 --- a/tests/tcg/mips/mip

[Qemu-devel] [PATCH v8 26/38] tests/tcg/mips: Test R5900 three-operand MULTU

Signed-off-by: Fredrik Noring --- tests/tcg/mips/mipsr5900/Makefile | 1 + tests/tcg/mips/mipsr5900/multu.c | 39 +++ 2 files changed, 40 insertions(+) create mode 100644 tests/tcg/mips/mipsr5900/multu.c diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/m

[Qemu-devel] [PATCH v8 30/38] tests/tcg/mips: Test R5900 MTLO1 and MTHI1

Signed-off-by: Fredrik Noring --- tests/tcg/mips/mipsr5900/Makefile | 1 + tests/tcg/mips/mipsr5900/mtlohi1.c | 40 ++ 2 files changed, 41 insertions(+) create mode 100644 tests/tcg/mips/mipsr5900/mtlohi1.c diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tc

[Qemu-devel] [PATCH v8 35/38] tests/tcg/mips: Test R5900 three-operand MADDU

Signed-off-by: Fredrik Noring --- tests/tcg/mips/mipsr5900/Makefile | 1 + tests/tcg/mips/mipsr5900/maddu.c | 37 +++ 2 files changed, 38 insertions(+) create mode 100644 tests/tcg/mips/mipsr5900/maddu.c diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/m

[Qemu-devel] [PATCH v8 24/38] target/mips: R5900 DMULT[U], DDIV[U], LL[D] and SC[D] are user only

The Linux kernel traps certain reserved instruction exceptions to emulate the corresponding instructions. QEMU is the kernel in user mode, so those traps are emulated by accepting the instructions. This change adds the function check_insn_opc_user_only to signal a reserved instruction exception fo

[Qemu-devel] [PATCH v8 27/38] tests/tcg/mips: Test R5900 three-operand MULT1

Signed-off-by: Fredrik Noring --- tests/tcg/mips/mipsr5900/mult.c | 45 +++-- 1 file changed, 37 insertions(+), 8 deletions(-) diff --git a/tests/tcg/mips/mipsr5900/mult.c b/tests/tcg/mips/mipsr5900/mult.c index 2c0c16d232..5710b395e6 100644 --- a/tests/tcg/mips/mipsr

[Qemu-devel] [PATCH v8 31/38] tests/tcg/mips: Test R5900 DIV1

Signed-off-by: Fredrik Noring --- tests/tcg/mips/mipsr5900/Makefile | 3 +- tests/tcg/mips/mipsr5900/div1.c | 73 +++ 2 files changed, 75 insertions(+), 1 deletion(-) create mode 100644 tests/tcg/mips/mipsr5900/div1.c diff --git a/tests/tcg/mips/mipsr5900/Makefile

[Qemu-devel] [PATCH v8 23/38] target/mips: Support R5900 three-operand MADDU and MADDU1

Signed-off-by: Fredrik Noring --- disas/mips.c| 2 ++ target/mips/translate.c | 28 2 files changed, 26 insertions(+), 4 deletions(-) diff --git a/disas/mips.c b/disas/mips.c index 242bf68b9c..78c4fb6efa 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -2

[Qemu-devel] [PATCH v8 20/38] target/mips: Support R5900 DIV1 and DIVU1

Signed-off-by: Fredrik Noring --- disas/mips.c| 4 target/mips/translate.c | 12 +--- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/disas/mips.c b/disas/mips.c index e86a2b8764..79bd119c51 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -2323,6 +2323,8

[Qemu-devel] [PATCH v8 25/38] tests/tcg/mips: Test R5900 three-operand MULT

Signed-off-by: Fredrik Noring --- tests/tcg/mips/mipsr5900/Makefile | 25 tests/tcg/mips/mipsr5900/mult.c | 47 +++ 2 files changed, 72 insertions(+) create mode 100644 tests/tcg/mips/mipsr5900/Makefile create mode 100644 tests/tcg/mips/mipsr5900/m

[Qemu-devel] [PATCH v8 21/38] target/mips: Support R5900 MOVN, MOVZ and PREF from MIPS IV

The R5900 is taken to be MIPS III with certain modifications. From MIPS IV it implements the instructions MOVN, MOVZ and PREF. Signed-off-by: Fredrik Noring Reviewed-by: Philippe Mathieu-Daudé --- target/mips/translate.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/t

[Qemu-devel] [PATCH v8 38/38] linux-user/mips: Recognise the R5900 CPU model

This kind of ELF for the R5900 relies on an IEEE 754-1985 compliant FPU. The R5900 FPU hardware is noncompliant and it is therefore emulated in software by the Linux kernel. QEMU emulates a compliant FPU accordingly. Signed-off-by: Fredrik Noring Reviewed-by: Philippe Mathieu-Daudé --- linux-us

[Qemu-devel] [PATCH v8 15/38] target/mips: Placeholder for R5900 MMI2 instruction subclass

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 40 +++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 28137cdaf4..e5ac9f17e0 100644 --- a/target/mips/translate.c +++ b/target/m

[Qemu-devel] [PATCH v8 19/38] target/mips: Support R5900 MFLO1, MTLO1, MFHI1 and MTHI1

Signed-off-by: Fredrik Noring --- disas/mips.c| 4 target/mips/translate.c | 23 +-- 2 files changed, 21 insertions(+), 6 deletions(-) diff --git a/disas/mips.c b/disas/mips.c index ae72059c46..e86a2b8764 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -2594

[Qemu-devel] [PATCH v8 33/38] tests/tcg/mips: Test R5900 three-operand MADD

Signed-off-by: Fredrik Noring --- tests/tcg/mips/mipsr5900/Makefile | 1 + tests/tcg/mips/mipsr5900/madd.c | 45 +++ 2 files changed, 46 insertions(+) create mode 100644 tests/tcg/mips/mipsr5900/madd.c diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/mi

[Qemu-devel] [PATCH v8 12/38] target/mips: Placeholder for R5900 MMI instruction class

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 45 - 1 file changed, 44 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 2318116d31..3b100f2d17 100644 --- a/target/mips/translate.c +++ b/target/

[Qemu-devel] [PATCH v8 17/38] target/mips: Support R5900 three-operand MULT and MULTU

The three-operand MULT and MULTU are the only R5900-specific instructions emitted by GCC 7.3. The R5900 also implements the three- operand MADD and MADDU instructions, but they are omitted in QEMU for now since they are absent in programs compiled by current GCC versions. Likewise, the R5900-speci

[Qemu-devel] [PATCH v8 18/38] target/mips: Support R5900 three-operand MULT1 and MULTU1

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 17 ++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index eb7437cc09..df69fa0e9f 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -47

[Qemu-devel] [PATCH v8 11/38] target/mips: Placeholder for R5900 MMI LQ

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 19a8abad54..2318116d31 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24420,

[Qemu-devel] [PATCH v8 16/38] target/mips: Placeholder for R5900 MMI3 instruction subclass

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 31 ++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index e5ac9f17e0..6d837082a9 100644 --- a/target/mips/translate.c +++ b/target/mips/trans

[Qemu-devel] [PATCH v8 28/38] tests/tcg/mips: Test R5900 three-operand MULTU1

Signed-off-by: Fredrik Noring --- tests/tcg/mips/mipsr5900/multu.c | 43 ++-- 1 file changed, 36 insertions(+), 7 deletions(-) diff --git a/tests/tcg/mips/mipsr5900/multu.c b/tests/tcg/mips/mipsr5900/multu.c index 3a59675395..f043904d69 100644 --- a/tests/tcg/mips/mip

[Qemu-devel] [PATCH v8 14/38] target/mips: Placeholder for R5900 MMI1 instruction subclass

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 36 +++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index c8080844f1..28137cdaf4 100644 --- a/target/mips/translate.c +++ b/target/mips/

[Qemu-devel] [PATCH v8 08/38] target/mips: Define R5900 MMI2 opcode constants

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 48 + 1 file changed, 48 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index e233b87324..bd51443ac1 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.

[Qemu-devel] [PATCH v8 22/38] target/mips: Support R5900 three-operand MADD and MADD1

Signed-off-by: Fredrik Noring --- disas/mips.c| 2 ++ target/mips/translate.c | 38 +- 2 files changed, 35 insertions(+), 5 deletions(-) diff --git a/disas/mips.c b/disas/mips.c index 79bd119c51..242bf68b9c 100644 --- a/disas/mips.c +++ b/disas/mi

[Qemu-devel] [PATCH v8 13/38] target/mips: Placeholder for R5900 MMI0 instruction subclass

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 43 - 1 file changed, 42 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 3b100f2d17..c8080844f1 100644 --- a/target/mips/translate.c +++ b/target/

[Qemu-devel] [PATCH v8 10/38] target/mips: Placeholder for R5900 MMI SQ, handle user mode RDHWR

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 53 - 1 file changed, 52 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 3c6a2c99a6..19a8abad54 100644 --- a/target/mips/translate.c +++ b/target/

[Qemu-devel] [PATCH v8 06/38] target/mips: Define R5900 MMI0 opcode constants

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 51 + 1 file changed, 51 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index ae988177a1..242f2df2e2 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.

[Qemu-devel] [PATCH v8 09/38] target/mips: Define R5900 MMI3 opcode constants

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 39 +++ 1 file changed, 39 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index bd51443ac1..3c6a2c99a6 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c

[Qemu-devel] [PATCH v8 03/38] target/mips: R5900 Multimedia Instruction overview note

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 161 1 file changed, 161 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index 3a0bdd55c8..32d1d2d83f 100644 --- a/target/mips/translate.c +++ b/target/mips/translate

[Qemu-devel] [PATCH v8 07/38] target/mips: Define R5900 MMI1 opcode constants

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 44 + 1 file changed, 44 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index 242f2df2e2..e233b87324 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.

[Qemu-devel] [PATCH v8 05/38] target/mips: Define R5900 MMI{0, 1, 2, 3} subclasses and MMI opcode constants

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 51 + 1 file changed, 51 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index e205c3eaef..ae988177a1 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.

[Qemu-devel] [PATCH v8 02/38] disas/mips: Define R5900 disassembly constants

Signed-off-by: Fredrik Noring --- disas/mips.c | 8 1 file changed, 8 insertions(+) diff --git a/disas/mips.c b/disas/mips.c index 97f661a37e..ae72059c46 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -611,6 +611,9 @@ struct mips_opcode /* ST Microelectronics Loongson 2F. */ #define

[Qemu-devel] [PATCH v8 04/38] target/mips: Define R5900 MMI class, and LQ and SQ opcode constants

Signed-off-by: Fredrik Noring --- target/mips/translate.c | 40 1 file changed, 40 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index 32d1d2d83f..e205c3eaef 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c

[Qemu-devel] [PATCH v8 01/38] target/mips: Define R5900 instructions and CPU preprocessor constants

The R5900 implements the 64-bit MIPS III instruction set except DMULT, DMULTU, DDIV, DDIVU, LL, SC, LLD and SCD. The MIPS IV instructions MOVN, MOVZ and PREF are implemented. It has the R5900-specific three-operand instructions MADD, MADDU, MULT and MULTU as well as pipeline 1 versions MULT1, MULTU

[Qemu-devel] [PATCH v8 00/38] target/mips: Limited support for the R5900

The primary purpose of these changes is to support programs compiled by GCC for the R5900 target and thereby run R5900 Linux distributions, for example Gentoo. GCC in version 7.3, by itself, by inspection of the GCC source code and inspection of the generated machine code, for the R5900 target, on

Re: [Qemu-devel] [PULL 00/21] tcg patch queue

On 21 October 2018 at 16:01, Peter Maydell wrote: > Any idea what's going on here? tcg/tcg.h has a comment saying > * The cmpxchg functions are only defined if HAVE_CMPXCHG128 > so presumably the issue is that the helper-a64 code is > trying to refer to them anyway. There certainly doesn't > seem

Re: [Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU

Hi Fredrik, > > The C790 is a follow-up to the R5900. The R5900 has an FPU that is not > > compliant to the IEEE 754 standard for floating-point arithmetic. It > > doesn't implement exceptions, infinities, NaNs or denormals. It doesn't > > implement the the double format either, but that is

Re: [Qemu-devel] qemu-trivial pull-request?

On 19/10/2018 20:30, Michael Tokarev wrote: > 19.10.2018 16:17, Laurent Vivier wrote: >> Hi Michael, >> >> some people asked me if there will be any qemu-trivial pull request in >> the near future. >> >> So you plan to do one? >> Do you need help? > > Hello! > > I haven't done anything qemu-relat

Re: [Qemu-devel] [PULL 00/21] tcg patch queue

On 19 October 2018 at 07:10, Richard Henderson wrote: > On 10/18/18 3:34 AM, Peter Maydell wrote: >> The win32 build fails with: >> >> target/arm/helper-a64.o: In function `helper_paired_cmpxchg64_le_parallel': >> /home/petmay01/qemu-for-merges/target/arm/helper-a64.c:573: undefined >> reference t

[Qemu-devel] [PATCH] icount: fix deadlock when all cpus are sleeping

When all cpus are sleeping (e.g in WFI), to avoid a deadlock in the main_loop, wake it up in order to start the warp timer. Signed-off-by: Clement Deschamps --- cpus.c | 8 1 file changed, 8 insertions(+) diff --git a/cpus.c b/cpus.c index bb2a511483..798d43623a 100644 --- a/cpus.c +++

Re: [Qemu-devel] [PATCH v7 0/7] target/mips: Limited support for the R5900

Hi Aleksandar, > Your series is getting better and better with each version, which is very > good. For a change, I don't have any objection about the title. :) Good! > Patch 7 will be integrated shortly in the MIPS queue, you don't need to > worry about it. Thanks! > With this series you are n

Re: [Qemu-devel] [PATCH v2 06/29] target/riscv: Convert RVXI fence insns to decodetree

On 10/20/18 8:14 AM, Bastian Koppelmann wrote: > Signed-off-by: Bastian Koppelmann > Signed-off-by: Peer Adelt > --- > v1 -> v2: > - simplified fence/fence_i as suggested by Richard > > target/riscv/insn32.decode | 6 ++ > target/riscv/insn_trans/trans_rvi.inc.c | 20 +

Re: [Qemu-devel] [RFC v3 48/56] ppc: acquire the BQL in cpu_has_work

On 10/20/18 5:31 PM, Emilio G. Cota wrote: > I like this. How does the appended look? > > Thanks, > > Emilio > ---8<--- > > [PATCH] cpu: introduce cpu_has_work_with_iothread_lock I might just inline cpu_has_work_bql into the one caller. You could even share has_cpu_lock with the c

Re: [Qemu-devel] [RFC v3 07/56] target/m68k: rename cpu_halted to cpu_halt

On 10/21/18 1:53 PM, Richard Henderson wrote: > On 10/19/18 2:05 AM, Emilio G. Cota wrote: >> To avoid a name clash with the soon-to-be-defined cpu_halted() helper. >> >> Cc: Laurent Vivier >> Signed-off-by: Emilio G. Cota >> --- >> target/m68k/translate.c | 6 +++--- >> 1 file changed, 3 insert

Re: [Qemu-devel] [RFC v3 44/56] unicore32: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > Cc: Guan Xuetao > Signed-off-by: Emilio G. Cota > --- > target/unicore32/cpu.c | 2 +- > target/unicore32/softmmu.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 43/56] openrisc: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > Cc: Stafford Horne > Signed-off-by: Emilio G. Cota > --- > hw/openrisc/cputimer.c | 2 +- > target/openrisc/cpu.c | 4 ++-- > 2 files changed, 3 insertions(+), 3 deletions(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 42/56] sparc: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > Cc: Mark Cave-Ayland > Cc: Artyom Tarasenko > Signed-off-by: Emilio G. Cota > --- > hw/sparc64/sparc64.c | 19 +-- > target/sparc/cpu.c | 2 +- > 2 files changed, 14 insertions(+), 7 deletions(-) Reviewed-by: Richard Henderson

Re: [Qemu-devel] [RFC v3 41/56] moxie: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > Cc: Anthony Green > Signed-off-by: Emilio G. Cota > --- > target/moxie/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 46/56] accel/tcg: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > @@ -540,16 +540,16 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, > */ > atomic_mb_set(&cpu->icount_decr.u16.high, 0); > > -if (unlikely(atomic_read(&cpu->interrupt_request))) { > +if (unlikely(cpu_interrupt_request(cpu)))

Re: [Qemu-devel] [RFC v3 40/56] alpha: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > Cc: Richard Henderson > Signed-off-by: Emilio G. Cota > --- > target/alpha/cpu.c | 8 > 1 file changed, 4 insertions(+), 4 deletions(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 37/56] mips: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > @@ -60,7 +60,7 @@ static bool mips_cpu_has_work(CPUState *cs) > /* Prior to MIPS Release 6 it is implementation dependent if non-enabled > interrupts wake-up the CPU, however most of the implementations only > check for interrupts th

Re: [Qemu-devel] [RFC v3 39/56] s390x: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > Cc: Cornelia Huck > Cc: Christian Borntraeger > Cc: Alexander Graf > Cc: Richard Henderson > Cc: David Hildenbrand > Cc: qemu-s3...@nongnu.org > Signed-off-by: Emilio G. Cota > --- > hw/intc/s390_flic.c | 2 +- > target/s390x/cpu.c | 2 +- > 2 fi

Re: [Qemu-devel] [RFC v3 45/56] microblaze: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > Cc: "Edgar E. Iglesias" > Signed-off-by: Emilio G. Cota > --- > target/microblaze/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 36/56] m68k: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > Cc: Laurent Vivier > Signed-off-by: Emilio G. Cota > --- > target/m68k/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 38/56] nios: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > Cc: Chris Wulff > Cc: Marek Vasut > Signed-off-by: Emilio G. Cota > --- > target/nios2/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 35/56] lm32: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > Cc: Michael Walle > Signed-off-by: Emilio G. Cota > --- > target/lm32/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 32/56] sh4: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > Cc: Aurelien Jarno > Signed-off-by: Emilio G. Cota > --- > target/sh4/cpu.c| 2 +- > target/sh4/helper.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 33/56] cris: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > Cc: "Edgar E. Iglesias" > Signed-off-by: Emilio G. Cota > --- > target/cris/cpu.c| 2 +- > target/cris/helper.c | 6 +++--- > 2 files changed, 4 insertions(+), 4 deletions(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 34/56] hppa: convert to cpu_interrupt_request

On 10/19/18 2:06 AM, Emilio G. Cota wrote: > Cc: Richard Henderson > Signed-off-by: Emilio G. Cota > --- > target/hppa/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 30/56] i386: convert to cpu_interrupt_request

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > @@ -713,9 +713,9 @@ int hvf_vcpu_exec(CPUState *cpu) > switch (exit_reason) { > case EXIT_REASON_HLT: { > macvm_set_rip(cpu, rip + ins_len); > -if (!((cpu->interrupt_request & CPU_INTERRUPT_HARD) && > +

Re: [Qemu-devel] [RFC v3 24/56] ppc: use cpu_reset_interrupt

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: David Gibson > Cc: Alexander Graf > Cc: qemu-...@nongnu.org > Acked-by: David Gibson > Reviewed-by: Philippe Mathieu-Daudé > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota > --- > target/ppc/excp_helper.

Re: [Qemu-devel] [RFC v3 27/56] s390x: use cpu_reset_interrupt

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Cornelia Huck > Cc: Richard Henderson > Cc: Alexander Graf > Cc: David Hildenbrand > Cc: qemu-s3...@nongnu.org > Reviewed-by: David Hildenbrand > Reviewed-by: Richard Henderson > Reviewed-by: Cornelia Huck > Signed-of

Re: [Qemu-devel] [RFC v3 29/56] arm: convert to cpu_interrupt_request

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > +++ b/target/arm/helper.c > @@ -1295,12 +1295,14 @@ static uint64_t isr_read(CPUARMState *env, const > ARMCPRegInfo *ri) > CPUState *cs = ENV_GET_CPU(env); > uint64_t ret = 0; > > -if (cs->interrupt_request & CPU_INTERRUPT_HARD) { > +

Re: [Qemu-devel] [RFC v3 26/56] i386: use cpu_reset_interrupt

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Richard Henderson > Cc: Eduardo Habkost > Reviewed-by: Richard Henderson > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota > --- > target/i386/hax-all.c| 4 ++-- > target/i386/hvf/x86hvf.c | 8 --

Re: [Qemu-devel] [RFC v3 23/56] cpu: define cpu_interrupt_request helpers

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > Signed-off-by: Emilio G. Cota > --- > include/qom/cpu.h | 35 +++ > 1 file changed, 35 insertions(+) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 28/56] openrisc: use cpu_reset_interrupt

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Stafford Horne > Reviewed-by: Philippe Mathieu-Daudé > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota > --- > target/openrisc/sys_helper.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-

Re: [Qemu-devel] [RFC v3 21/56] openrisc: convert to cpu_halted

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > Cc: Stafford Horne > Signed-off-by: Emilio G. Cota > --- > target/openrisc/sys_helper.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 25/56] exec: use cpu_reset_interrupt

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > -cpu->interrupt_request &= ~0x01; > +cpu_reset_interrupt(cpu, ~0x01); cpu_reset_interrupt(cpu, 1); Although this is during vmload, and I'm not sure what locks you really want to play with here. Perhaps it's ok... r~

Re: [Qemu-devel] [RFC v3 07/56] target/m68k: rename cpu_halted to cpu_halt

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > To avoid a name clash with the soon-to-be-defined cpu_halted() helper. > > Cc: Laurent Vivier > Signed-off-by: Emilio G. Cota > --- > target/m68k/translate.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) Although for this usage it's

Re: [Qemu-devel] [RFC v3 19/56] xtensa: convert to cpu_halted

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > Cc: Max Filippov > Signed-off-by: Emilio G. Cota > --- > target/xtensa/cpu.c | 2 +- > target/xtensa/helper.c| 2 +- > target/xtensa/op_helper.c | 2 +- > 3 files changed, 3 insertions(+), 3 deletions(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 20/56] gdbstub: convert to cpu_halted

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > Signed-off-by: Emilio G. Cota > --- > gdbstub.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 08/56] cpu: define cpu_halted helpers

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > cpu->halted will soon be protected by cpu->lock. > We will use these helpers to ease the transition, > since right now cpu->halted has many direct callers. > > Signed-off-by: Emilio G. Cota > --- > include/qom/cpu.h | 24 > 1

Re: [Qemu-devel] [RFC v3 12/56] i386: convert to cpu_halted

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > Cc: Eduardo Habkost > Signed-off-by: Emilio G. Cota > --- > target/i386/cpu.h | 2 +- > target/i386/cpu.c | 2 +- > target/i386/hax-all.c | 4 ++-- > target/i386/helper.c | 4 ++-- > target/i386/hvf/hvf.c | 8

Re: [Qemu-devel] [RFC v3 11/56] sh4: convert to cpu_halted

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > Cc: Aurelien Jarno > Signed-off-by: Emilio G. Cota > --- > target/sh4/op_helper.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [RFC v3 10/56] ppc: convert to cpu_halted

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > @@ -1088,11 +1088,13 @@ static target_ulong h_cede(PowerPCCPU *cpu, > sPAPRMachineState *spapr, > > env->msr |= (1ULL << MSR_EE); > hreg_compute_hflags(env); > +cpu_mutex_lock(cs); > if (!cpu_has_work(cs)) { > -cs->halted =

Re: [Qemu-devel] [RFC v3 09/56] arm: convert to cpu_halted

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > Cc: Andrzej Zaborowski > Cc: Peter Maydell > Cc: qemu-...@nongnu.org > Signed-off-by: Emilio G. Cota > --- > hw/arm/omap1.c| 4 ++-- > hw/arm/pxa2xx_gpio.c | 2 +- > hw/arm/pxa2xx_pic.c | 2 +- > target/arm/arm-powerctl.c | 4 +

Re: [Qemu-devel] [RFC v3 13/56] lm32: convert to cpu_halted

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > Cc: Michael Walle > Signed-off-by: Emilio G. Cota > --- > target/lm32/op_helper.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson +++ b/target/lm32/op_helper.c > @@ -31,7 +31,7 @@ void HELPER(hlt)(CPULM32S

Re: [Qemu-devel] [RFC v3 17/56] s390x: convert to cpu_halted

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > Cc: Cornelia Huck > Cc: Christian Borntraeger > Cc: Alexander Graf > Cc: David Hildenbrand > Cc: qemu-s3...@nongnu.org > Signed-off-by: Emilio G. Cota > --- > hw/intc/s390_flic.c| 2 +- > target/s390x/cpu.c | 18 +++---

Re: [Qemu-devel] [PULL v3 00/47] Miscellaneous patches for 2018-10-18

On 19 October 2018 at 12:49, Paolo Bonzini wrote: > The following changes since commit 77f7c747193662edfadeeb3118d63eed0eac51a6: > > Merge remote-tracking branch > 'remotes/huth-gitlab/tags/pull-request-2018-10-17' into staging (2018-10-18 > 13:40:19 +0100) > > are available in the git reposit

Re: [Qemu-devel] [RFC v3 14/56] m68k: convert to cpu_halted

On 10/19/18 2:05 AM, Emilio G. Cota wrote: > Cc: Laurent Vivier > Signed-off-by: Emilio G. Cota > --- > target/m68k/op_helper.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

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