The rom_ptr() function allows direct access to the ROM blobs that we
load during startup. However, there are currently no checks for the
size of the accesses, so it's currently possible to crash QEMU for
example with:
$ echo "Insane in the mainframe" > /tmp/test.txt
$ s390x-softmmu/qemu-system-s39
On Fri, 15 Jun 2018 10:08:29 +1000
David Gibson wrote:
> On Thu, Jun 14, 2018 at 11:51:11PM +0200, Greg Kurz wrote:
> > There's no real reason to create all CPUs in a first pass and to realize
> > them in a second pass. Merging these two loops makes the code simpler.
> >
> > Signed-off-by: Greg
This will be mainly useful for automated testing of virglrenderer on ES.
Signed-off-by: Tomeu Vizoso
---
include/ui/egl-helpers.h | 6 ++---
qemu-options.hx | 1 +
ui/egl-headless.c| 2 +-
ui/egl-helpers.c | 56 +---
ui/gtk-egl.c
On Fri, Jun 15, 2018 at 07:53:37AM +0200, Greg Kurz wrote:
> On Fri, 15 Jun 2018 10:02:25 +1000
> David Gibson wrote:
>
> > On Thu, Jun 14, 2018 at 11:50:42PM +0200, Greg Kurz wrote:
> > > The spapr_realize_vcpu() function doesn't rollback in case of error.
> > > This isn't a problem with coldplu
On Fri, Jun 15, 2018 at 07:58:05AM +0200, Greg Kurz wrote:
> On Fri, 15 Jun 2018 10:14:31 +1000
> David Gibson wrote:
>
> > On Fri, Jun 15, 2018 at 10:02:25AM +1000, David Gibson wrote:
> > > On Thu, Jun 14, 2018 at 11:50:42PM +0200, Greg Kurz wrote:
> > > > The spapr_realize_vcpu() function do
Also, assert that we don't overflow any of two different offsets into
the TB. Both unwind and goto_tb both record a uint16_t for later use.
Signed-off-by: Richard Henderson
---
This fixes an arm-softmmu test case forwarded to me by Michael Tsirkin.
There is a TB generated from that test case th
On Fri, 15 Jun 2018 10:14:31 +1000
David Gibson wrote:
> On Fri, Jun 15, 2018 at 10:02:25AM +1000, David Gibson wrote:
> > On Thu, Jun 14, 2018 at 11:50:42PM +0200, Greg Kurz wrote:
> > > The spapr_realize_vcpu() function doesn't rollback in case of error.
> > > This isn't a problem with coldpl
On Fri, 15 Jun 2018 10:02:25 +1000
David Gibson wrote:
> On Thu, Jun 14, 2018 at 11:50:42PM +0200, Greg Kurz wrote:
> > The spapr_realize_vcpu() function doesn't rollback in case of error.
> > This isn't a problem with coldplugged CPUs because the machine won't
> > start and QEMU will exit. Hotpl
On Thu, Jun 14, 2018 at 10:18:33AM +0200, BALATON Zoltan wrote:
> On Thu, 14 Jun 2018, David Gibson wrote:
> > On Thu, Jun 14, 2018 at 02:17:00AM +0200, BALATON Zoltan wrote:
> > > Signed-off-by: BALATON Zoltan
> >
> > But.. they are implemented. Albeit as an entirely software controlled
> > reg
On 05.04.2018 11:32, Thomas Huth wrote:
> The instance_init function of devices should always succeed to be able
> to introspect the device. However, the instance_init function of the
> "openprom" device can currently fail, for example like this:
>
> $ echo "{'execute':'qmp_capabilities'}"\
>
On 05.04.2018 12:43, Thomas Huth wrote:
> Several devices of the sun4m machines are using &error_fatal in
> their instance_init function and thus can cause QEMU to abort
> unexpectedly:
>
> $ echo "{'execute':'qmp_capabilities'}"\
>"{'execute':'device-list-properties',"\
>" 'argume
On 14.06.2018 22:11, John Snow wrote:
>
> On 06/14/2018 06:46 AM, Peter Maydell wrote:
[...]
>
> *cough* I hate the way it looks too, but C99 comments have a few things
> going for them:
>
> // A multi-line comment block like this has no extra lines and every
> // line in the comment is prefaced
This commit removes the PYTHON_UTF8 workaround. The problem with setting
LC_ALL= LANG=C LC_CTYPE=en_US.UTF-8
is that the en_US.UTF-8 locale might not be available. In this case
setting above locales results in build errors even though another UTF-8
locale was originally set [1]. The only stable
This is a different approach to fix the locale dependent encode/decode
problem in common.py utilizing the binary read/write mode [1,2] and
decode/encode with explicit UTF-8 encoding arguments [3].
This approach is preferred over the fix in commit d4e5ec877ca because it
is (a) locale independent, a
Hi,
This new version of the patch is now also fully python2 compatible...
Original message:
This patch series,
- removes the PYTHON_UTF8 workaround introduced in d4e5ec877ca
- adds a different workaround that avoids the locale problem altogether by
opening files in binary read/write
On Thu, Jun 14, 2018 at 09:54:41AM +0200, BALATON Zoltan wrote:
> On Thu, 14 Jun 2018, David Gibson wrote:
> > On Wed, Jun 13, 2018 at 04:13:57PM +0200, BALATON Zoltan wrote:
> > > I don't see the problem. The addr register selects the register to read or
> > > write. It is set by the first write w
On Thu, Jun 14, 2018 at 05:38:16PM -1000, Richard Henderson wrote:
> On 06/14/2018 03:45 PM, David Gibson wrote:
> >>> To wit, the instructions are recognized and transactions always fail.
> >>> Which is
> >>> not a bad way to test the required fallback paths that rarely fail on
> >>> hardware.
On 06/14/2018 01:39 PM, Philippe Mathieu-Daudé wrote:
> On the Alpha DP264 machine, the Cirrus VGA is I/O mapped
> in the 3C0H-3CFH range, thus I/O base used by the parallel
> device clashes, and since a4cb773928e the VGA is not
> working:
>
> (qemu) info mtree
> address-space: memory
>
On 06/14/2018 03:45 PM, David Gibson wrote:
>>> To wit, the instructions are recognized and transactions always fail.
>>> Which is
>>> not a bad way to test the required fallback paths that rarely fail on
>>> hardware.
>>> ;-)
>>
>> If TM instructions don't cause an exception, I guess its reaso
On Thu, Jun 14, 2018 at 04:00:43PM +0200, Cédric Le Goater wrote:
> This is a major reshuffle of the PowerNV machine and chip models to
> introduce a machine type per processor. It is quite noisy but it
> doesn't change much the code flow.
>
> It introduces a base PnvChip class from which the spec
On Thu, Jun 14, 2018 at 04:00:42PM +0200, Cédric Le Goater wrote:
> On Power9, the thread interrupt presenter has a different type and is
> linked to the chip owning the cores.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
(but not applied for now, since it depends on earlier p
On Thu, Jun 14, 2018 at 04:00:41PM +0200, Cédric Le Goater wrote:
> This extracts from the PvChip realize routine the part creating the
> cores. On Power9, we will need to create the cores after the Xive
> interrupt controller is created.
>
> Signed-off-by: Cédric Le Goater
Applied to ppc-for-3.
On 06/14/2018 10:22 AM, Markus Armbruster wrote:
> Signed-off-by: Markus Armbruster
Reviewed-by: Philippe Mathieu-Daudé
> ---
> scripts/coverity-model.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/scripts/coverity-model.c b/scripts/coverity-model.c
>
From: Jan Kiszka
The spec does not justify clearing of any E1000_ICR_OTHER_CAUSES when
E1000_ICR_OTHER is set in EIAC. In fact, removing this code fixes the
issue the Linux driver runs into since 4aea7a5c5e94 ("e1000e: Avoid
receiver overrun interrupt bursts") and was worked around by
745d0bd3af9
From: Lin Ma
If user forgets to provide any backend types for '-netdev' in qemu CLI,
It triggers seg fault.
e.g.
Expected:
$ qemu -netdev id=net0
qemu-system-x86_64: Parameter 'type' is missing
Actual:
$ qemu -netdev id=net0
Segmentation fault (core dumped)
Fixes: 547203ead4327 ("net: List av
From: linzhecheng
As qemu_new_net_client create new ncs but error happens later,
ncs will be left in global net_clients list and we can't use them any
more, so we need to cleanup them.
Cc: qemu-sta...@nongnu.org
Signed-off-by: linzhecheng
Signed-off-by: Jason Wang
---
net/vhost-user.c | 3 +++
The following changes since commit 409c241f887a38bb7a2ac12e34d3a8d73922a9a5:
Merge remote-tracking branch 'remotes/kraxel/tags/ui-20180614-pull-request'
into staging (2018-06-14 14:04:14 +0100)
are available in the git repository at:
https://github.com/jasowang/qemu.git tag
From: Brijesh Singh
A guest boot hangs while probing the network interface when
iommu_platform=on is used.
The following qemu cli hangs without this patch:
# $QEMU \
-netdev tap,fd=3,id=hostnet0,vhost=on,vhostfd=4 3<>/dev/tap67
4<>/dev/host-net \
-device
virtio-net-pci,netdev=hostnet0,id=
On 06/14/2018 05:11 PM, John Snow wrote:
> On 06/14/2018 06:46 AM, Peter Maydell wrote:
>> On 13 June 2018 at 17:55, John Snow wrote:
>>> The same reasoning could be used to justify
>>>
>>> /* two
>>> * lines */
>>>
>>> as it's ... actually just two lines. I think people don't seem to like
>>> th
On Thu, Jun 14, 2018 at 09:09:48AM +0100, Daniel P. Berrangé wrote:
> On Wed, Jun 13, 2018 at 03:05:08PM -0300, Eduardo Habkost wrote:
> > Getting back to this discussion:
> >
> > On Tue, Jun 05, 2018 at 09:43:00AM +0100, Daniel P. Berrangé wrote:
> > > On Tue, Jun 05, 2018 at 09:27:46AM +0200, Ge
On Thu, Jun 14, 2018 at 04:00:40PM +0200, Cédric Le Goater wrote:
> This is again a small cleanup to hide to the machine the details of
> the ISA bus. The ISA bus device tree nodename will be different on
> Power9.
>
> Signed-off-by: Cédric Le Goater
> ---
> include/hw/ppc/pnv_lpc.h | 1 +
>
On 06/14/2018 05:25 PM, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Remove the abort on a sequence of NOP/zero instructions.
> Always return early and avoid decoding NOP/zero instructions.
>
> This fixes Coverity CID 1391443.
>
> Signed-off-by: Edgar E. Iglesias
Reviewed-by: Phil
On 06/14/2018 05:25 PM, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Correct the masking of output addresses.
>
> This fixes Coverity CID 1391441.
>
> Fixes: commit 3924a9aa02
> Reported-by: Peter Maydell
> Signed-off-by: Edgar E. Iglesias
Reviewed-by: Philippe Mathieu-Daudé
>
On Thu, Jun 14, 2018 at 04:00:39PM +0200, Cédric Le Goater wrote:
> This is a small cleanup to hide to the machine the gory details of the
> creation of the ISA bus. When time comes, the 'qemu_irq_handler' should
> become a LPC controller class attribute.
>
> Signed-off-by: Cédric Le Goater
> ---
On Thu, Jun 14, 2018 at 04:00:38PM +0200, Cédric Le Goater wrote:
> When a PowerNV system is started, the firmware (skiboot) looks for a
> "primary" property to determine which LPC bus is the default on a
> multichip system. This property is currently populated in the main
> routine creating the de
On 2018年06月12日 10:24, linzhecheng wrote:
As qemu_new_net_client create new ncs but error happens later,
ncs will be left in global net_clients list and we can't use them any
more, so we need to cleanup them.
Signed-off-by: linzhecheng
diff --git a/net/vhost-user.c b/net/vhost-user.c
index 6
On Thu, Jun 14, 2018 at 12:02:31PM +0200, Cornelia Huck wrote:
> So, do you know from the outset that there will be such a coupled
> device? I.e., is it a property of the VM definition?
>
> Can there be a 'prepared' virtio-net device that presents the STANDBY
> feature even if there currently is n
CPUPPCState currently contains a number of fields containing the state of
the VPA. The VPA is a PAPR specific concept covering several guest/host
shared memory areas used to communicate some information with the
hypervisor.
As a PAPR concept this is really machine specific information, although i
On Thu, Jun 14, 2018 at 05:20:56PM +0200, Cédric Le Goater wrote:
> On 06/14/2018 06:41 AM, David Gibson wrote:
> > PowerPCCPU contains an (Object *)intc used to point to the cpu's interrupt
> > controller. Or more precisely to the "presentation" component of the
> > interrupt controller relevant
On Fri, Jun 15, 2018 at 12:00:20AM +0200, Greg Kurz wrote:
> On Thu, 14 Jun 2018 09:52:55 -1000
> Richard Henderson wrote:
>
> > On 06/12/2018 10:19 PM, Greg Kurz wrote:
> > > I'm confused... I don't see anything related to HTM in TCG. Also we have
> > > the following in cap_htm_apply():
> > >
>
On 2018年06月13日 10:29, Jason Wang wrote:
On 2018年06月13日 10:26, Philippe Mathieu-Daudé wrote:
Hi Jason,
On 06/12/2018 11:18 PM, Jason Wang wrote:
On 2018年06月13日 03:00, Philippe Mathieu-Daudé wrote:
Cc'ing Jason who is also listed as co-maintainer:
./scripts/get_maintainer.pl -f hw/net
Thank you for sharing your thoughts, Cornelia. With questions below, I
think you raised really good points, some of which I don't have answer
yet and would also like to explore here.
First off, I don't want to push the discussion to the extreme at this
point, or sell anything about having QEMU man
There was a regression reported by Eric Auger before with OOB:
http://lists.gnu.org/archive/html/qemu-devel/2018-03/msg06231.html
It is fixed in 951702f39c ("monitor: bind dispatch bh to iohandler
context", 2018-04-10).
For the bug, we turned Out-Of-Band feature of monitors off for 2.12
releas
Out-Of-Band handlers need to protect shared state if there is any.
Mention it in the document.
Suggested-by: Markus Armbruster
Signed-off-by: Peter Xu
---
docs/devel/qapi-code-gen.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/docs/devel/qapi-code-gen.txt b/docs/devel/qapi-code-gen.
This reverts commit ddee57e0176f6ab53b13c6c97605b62737a8fd7a.
Meanwhile, revert one line from fa198ad9bdef to make sure
qtest_init_without_qmp_handshake() will only pass in one parameter.
Signed-off-by: Peter Xu
---
tests/libqtest.h | 4 +---
tests/libqtest.c | 10 --
tests/qmp-test.c
In my Out-Of-Band test, "check -qcow2 060" fail with this:
060 5s ... - output mismatch (see 060.out.bad)
--- /home/peterx/git/qemu/tests/qemu-iotests/060.out2018-06-15
08:31:14.607411950 +0800
+++ /home/peterx/git/qemu/bin/tests/qemu-iotests/060.out.bad2018-06-15
08:33:09.679880113 +080
Previously we clean up the queues when we got CLOSED event. It was used
to make sure we won't send leftover replies/events of a old client to a
new client. Now this patch does an extra operation to flush the
response queue before cleaning up.
In most cases, a QMP session will be based on a bidir
Patches 1-3 are new. I am not sure about patch 3; I hope current hack
works for us.
v3:
- drop patch "tests: iotests: don't compare SHUTDOWN event", replace
it with "monitor: flush qmp responses when CLOSED" to fix up the
race. [Eric, Markus]
- tweak the oob revert patch to not break qmp-test
It was unclear before on what does the CLOSED event mean. Meanwhile we
add a TODO to fix up the CLOSED event in the future when the in/out
ports are different for a chardev.
CC: Paolo Bonzini
CC: "Marc-André Lureau"
CC: Stefan Hajnoczi
CC: Markus Armbruster
Signed-off-by: Peter Xu
---
inclu
> -Original Message-
> From: Daniel P. Berrangé [mailto:berra...@redhat.com]
> Sent: Thursday, June 14, 2018 11:11 PM
> To: Farhan Ali
> Cc: Halil Pasic ; qemu-devel@nongnu.org;
> fran...@linux.ibm.com; m...@redhat.com; borntrae...@de.ibm.com; Gonglei
> (Arei) ; longpeng ;
> Viktor Mihaj
On Thu, Jun 14, 2018 at 03:34:43PM +0200, Greg Kurz wrote:
> On Thu, 14 Jun 2018 14:41:28 +1000
> David Gibson wrote:
>
> > PowerPCCPU contains an (Object *)intc used to point to the cpu's interrupt
> > controller. Or more precisely to the "presentation" component of the
> > interrupt controller
On Fri, Jun 15, 2018 at 10:02:25AM +1000, David Gibson wrote:
> On Thu, Jun 14, 2018 at 11:50:42PM +0200, Greg Kurz wrote:
> > The spapr_realize_vcpu() function doesn't rollback in case of error.
> > This isn't a problem with coldplugged CPUs because the machine won't
> > start and QEMU will exit.
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180614232119.31669-1-naravamu...@digitalocean.com
Subject: [Qemu-devel] [PATCH] [RFC] aio: properly bubble up errors from
initialization
=== TEST SCRIPT BEGIN ===
#!/bin/b
On Thu, Jun 14, 2018 at 11:50:27PM +0200, Greg Kurz wrote:
> Commit 94ad93bd97684 (QEMU 2.12) switched to instantiate CPUs separately
> but it missed to adapt the error path accordingly. If something fails in
> the CPU creation loop, then the CPU object that was just created is leaked.
>
> The err
On Thu, Jun 14, 2018 at 11:51:11PM +0200, Greg Kurz wrote:
> There's no real reason to create all CPUs in a first pass and to realize
> them in a second pass. Merging these two loops makes the code simpler.
>
> Signed-off-by: Greg Kurz
I'm a bit uncertain about this one. It's correct at the mom
On Thu, Jun 14, 2018 at 11:50:57PM +0200, Greg Kurz wrote:
> This moves some code out from spapr_cpu_core_realize() for clarity. No
> functional change.
>
> Signed-off-by: Greg Kurz
Applied to ppc-for-3.0, thanks.
> ---
> hw/ppc/spapr_cpu_core.c | 73
> +-
On Thu, Jun 14, 2018 at 11:50:42PM +0200, Greg Kurz wrote:
> The spapr_realize_vcpu() function doesn't rollback in case of error.
> This isn't a problem with coldplugged CPUs because the machine won't
> start and QEMU will exit. Hotplug is a different story though: the
> CPU thread is started under
On Thu, Jun 14, 2018 at 11:50:11PM +0200, Greg Kurz wrote:
> Because this is the preferred practice in QEMU.
>
> Signed-off-by: Greg Kurz
Applied to ppc-for-3.0, thanks.
> ---
> hw/ppc/spapr_cpu_core.c |5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/hw/ppc/spa
On the Alpha DP264 machine, the Cirrus VGA is I/O mapped
in the 3C0H-3CFH range, thus I/O base used by the parallel
device clashes, and since a4cb773928e the VGA is not
working:
(qemu) info mtree
address-space: memory
- (prio 0, i/o): system
0801fc00-0
On Thu, Jun 14, 2018 at 10:03:41AM +0200, BALATON Zoltan wrote:
> On Thu, 14 Jun 2018, David Gibson wrote:
> > On Thu, Jun 14, 2018 at 02:17:00AM +0200, BALATON Zoltan wrote:
>
> Maybe amend commit message like this:
>
> According to PPC440 User Manual
On which page? Where can I get that manual
On Thu, Jun 14, 2018 at 10:00:50AM +0200, BALATON Zoltan wrote:
> On Thu, 14 Jun 2018, David Gibson wrote:
> > On Thu, Jun 14, 2018 at 02:17:00AM +0200, BALATON Zoltan wrote:
> > > From: Sebastian Bauer
> > >
> > > Signed-off-by: Sebastian Bauer
> > > Signed-off-by: BALATON Zoltan
> >
> > Comm
laio_init() can fail for a couple of reasons, which will lead to a NULL
pointer dereference in laio_attach_aio_context().
To solve this, add a aio_linux_aio_setup() path which is called where
aio_get_linux_aio() is called currently, but can propogate errors up.
virtio-block and virtio-scsi call t
> -Original Message-
> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org]
> On Behalf Of Moger, Babu
> Sent: Thursday, June 14, 2018 3:41 PM
> To: Eduardo Habkost
> Cc: m...@redhat.com; marcel.apfelb...@gmail.com; pbonz...@redhat.com;
> r...@twiddle.net; mtosa...@redhat.
> -Original Message-
> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org]
> On Behalf Of Moger, Babu
> Sent: Thursday, June 14, 2018 5:19 PM
> To: Eduardo Habkost
> Cc: m...@redhat.com; marcel.apfelb...@gmail.com; pbonz...@redhat.com;
> r...@twiddle.net; mtosa...@redhat.c
On 06/14/2018 12:28 PM, Mark Cave-Ayland wrote:
> @@ -5834,6 +5928,11 @@ static void sparc_tr_tb_stop(DisasContextBase *dcbase,
> CPUState *cs)
> save_npc(dc);
> tcg_gen_exit_tb(NULL, 0);
> }
> +} else if (dc->base.is_jmp == DISAS_EXIT) {
> +/* Exit T
On 06/14/2018 12:09 PM, Mark Cave-Ayland wrote:
> I still see the "WARNING: Time of Day clock error" messages on the console
> when
> booting Milax with icount enabled, although I'm inclined to merge this if
> you're happy with the patch as it is a definite improvement.
Yeah, let's fix whatever t
This is a patch I've had in an earlier form for a while but never really
developed
due to experiencing random hangs when writing to the SPARC64 CPU timers.
Fortunately it seems the recent icount timer fixes have resolved the underlying
issues and with this patch I am able to boot all my qemu-syst
This patch adds gen_io_start()/gen_io_end() to various instructions as required
in order to boot my OpenBIOS test images on qemu-system-sparc64 with icount
enabled.
Signed-off-by: Mark Cave-Ayland
---
target/sparc/translate.c | 99
1 file changed,
ping. Any comments or suggestions would be welcome whenever you have the
time. :)
Thank you,
Ari Sundholm
a...@tuxera.com
On 06/08/2018 03:32 PM, Ari Sundholm wrote:
This patch series adds a new block driver, blklogwrites, to QEMU. The
driver is given two block devices: a raw device backed by
> -Original Message-
> From: Eduardo Habkost [mailto:ehabk...@redhat.com]
> Sent: Thursday, June 14, 2018 2:13 PM
> To: Moger, Babu
> Cc: m...@redhat.com; marcel.apfelb...@gmail.com; pbonz...@redhat.com;
> r...@twiddle.net; mtosa...@redhat.com; qemu-devel@nongnu.org;
> k...@vger.kernel.
Raw image created by dd in steps 1 and 2.
** Attachment added: "image.img"
https://bugs.launchpad.net/qemu/+bug/1776920/+attachment/5152722/+files/image.img
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https://bugs.launchpad.n
Source file 1
** Attachment added: "lzloader.elf"
https://bugs.launchpad.net/qemu/+bug/1776920/+attachment/5152720/+files/lzloader.elf
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Title
Also if I use the same image.qemu file and convert to vmdk format I get
even smaller file which for sure is wrong as well:
qemu-img convert image.qemu -O vmdk image2.vbox
ll image*
-rw-r--r-- 1 *** *** 6684672 Jun 14 17:17 image.img
-rw-r--r-- 1 *** *** 7012352 Jun 14 17:40 image.qemu
-rw-r--
The corrupt qcow2 image created by converting image.qemu in step 4.
** Attachment added: "image2.qemu"
https://bugs.launchpad.net/qemu/+bug/1776920/+attachment/5152724/+files/image2.qemu
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Source file 2
** Attachment added: "boot.bin"
https://bugs.launchpad.net/qemu/+bug/1776920/+attachment/5152721/+files/boot.bin
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Title:
qemu
Original qcow2 image converted from raw image in step 3.
** Attachment added: "image.qemu"
https://bugs.launchpad.net/qemu/+bug/1776920/+attachment/5152723/+files/image.qemu
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https:/
I believe I have distilled entire process to few repeatable steps that
can be fully reproduced on my Mac. The binary source files - - boot.bin
and lzloader.elf - were created on my Linux VM running in VirtualBox on
same Mac but I do not think it matters as the execution completely
happens on Mac.
On 14/06/18 22:02, Richard Henderson wrote:
On 06/14/2018 12:53 AM, Mark Cave-Ayland wrote:
+if (dc->base.tb->cflags & CF_USE_ICOUNT) {
+gen_io_start();
+}
Need to use tb_cflags(dc->base.tb) for the atomic_read therei
On Thu, 14 Jun 2018 09:52:55 -1000
Richard Henderson wrote:
> On 06/12/2018 10:19 PM, Greg Kurz wrote:
> > I'm confused... I don't see anything related to HTM in TCG. Also we have
> > the following in cap_htm_apply():
> >
> > if (tcg_enabled()) {
> > error_setg(errp,
> >
There's no real reason to create all CPUs in a first pass and to realize
them in a second pass. Merging these two loops makes the code simpler.
Signed-off-by: Greg Kurz
---
hw/ppc/spapr_cpu_core.c | 25 -
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git a/h
The spapr_realize_vcpu() function doesn't rollback in case of error.
This isn't a problem with coldplugged CPUs because the machine won't
start and QEMU will exit. Hotplug is a different story though: the
CPU thread is started under object_property_set_bool() and it assumes
it can access the CPU ob
This moves some code out from spapr_cpu_core_realize() for clarity. No
functional change.
Signed-off-by: Greg Kurz
---
hw/ppc/spapr_cpu_core.c | 73 +--
1 file changed, 45 insertions(+), 28 deletions(-)
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/
Commit 94ad93bd97684 (QEMU 2.12) switched to instantiate CPUs separately
but it missed to adapt the error path accordingly. If something fails in
the CPU creation loop, then the CPU object that was just created is leaked.
The error paths in this function are a bit obfuscated, and adding
yet anothe
This series is a follow-up to David's "Better handling of machine specific
per-cpu information" v3 patchset. It addresses issues mentioned at:
https://lists.nongnu.org/archive/html/qemu-ppc/2018-06/msg00514.html
This series fixes potential crashes and leaks in case of error during
CPU hotplug. It
Because this is the preferred practice in QEMU.
Signed-off-by: Greg Kurz
---
hw/ppc/spapr_cpu_core.c |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 7e3a9e78d090..27602245fd55 100644
--- a/hw/ppc/spapr_cpu_core.c
On 14/06/2018 23:14, Richard Henderson wrote:
> On 06/14/2018 08:19 AM, Paolo Bonzini wrote:
>> But why isn't the parallel port at 0x378? That's the expected place on
>> PC (the second parallel port is at 0x278 and the third is at 0x3bc), and
>> I would expect other SuperIO chips to have it there
On 14/06/2018 18:53, Eduardo Habkost wrote:
>>
>> A separate issue is whether the same flag should control both
>> KVM_CAP_X86_DISABLE_EXITS and the monitor/mwait CPUID leaf. Eduardo,
>> what do you think?
> Making "-cpu host" be affected by a host-side option is
> acceptable to me. A "-cpu" opti
On 06/14/2018 08:19 AM, Paolo Bonzini wrote:
> But why isn't the parallel port at 0x378? That's the expected place on
> PC (the second parallel port is at 0x278 and the third is at 0x3bc), and
> I would expect other SuperIO chips to have it there too. That would be
> a one line fix.
Agreed.
r~
On 06/14/2018 12:53 AM, Mark Cave-Ayland wrote:
> +if (dc->base.tb->cflags & CF_USE_ICOUNT) {
> +gen_io_start();
> +}
Need to use tb_cflags(dc->base.tb) for the atomic_read therein.
> +
On 06/13/2018 02:56 AM, Alex Bennée wrote:
> @@ -147,12 +179,12 @@ void reginfo_init(struct reginfo *ri, ucontext_t *uc)
> }
>
> /* Finally the FFR */
> -memcpy(&ri->sve.ffr,(void *)sve + SVE_SIG_FFR_OFFSET(vq),
> +memcpy(&ri->sve.ffr, (void *)sve + SVE_SIG_FFR_O
> -Original Message-
> From: Eduardo Habkost [mailto:ehabk...@redhat.com]
> Sent: Thursday, June 14, 2018 1:41 PM
> To: Moger, Babu
> Cc: m...@redhat.com; marcel.apfelb...@gmail.com; pbonz...@redhat.com;
> r...@twiddle.net; mtosa...@redhat.com; qemu-devel@nongnu.org;
> k...@vger.kernel.o
On 06/13/2018 02:55 AM, Alex Bennée wrote:
> +static void sve_dump_preg_diff(FILE *f, int vq,
> + uint16_t const (*p1)[SVE_VQ_MAX],
> + uint16_t const (*p2)[SVE_VQ_MAX])
> +{
> +int q;
> +
> +for (q = 0; q < vq; q++) {
> + fp
> -Original Message-
> From: Eduardo Habkost [mailto:ehabk...@redhat.com]
> Sent: Thursday, June 14, 2018 1:40 PM
> To: Moger, Babu
> Cc: m...@redhat.com; marcel.apfelb...@gmail.com; pbonz...@redhat.com;
> r...@twiddle.net; mtosa...@redhat.com; qemu-devel@nongnu.org;
> k...@vger.kernel.
Hi Peter,
On 06/04/2018 05:29 PM, Peter Maydell wrote:
> The MPC is guest-configurable for whether blocked accesses:
> * should be RAZ/WI or cause a bus error
> * should generate an interrupt or not
>
> Implement this behaviour in the blocked-access handlers.
>
> Signed-off-by: Peter Maydell
>
Hi Peter,
On 06/04/2018 05:29 PM, Peter Maydell wrote:
> Implement the missing registers for the TZ MPC.
>
> Signed-off-by: Peter Maydell
> ---
> include/hw/misc/tz-mpc.h | 10 +++
> hw/misc/tz-mpc.c | 137 ++-
> 2 files changed, 144 insertions(+), 3
On 06/14/2018 04:17 PM, John Snow wrote:
> On 06/14/2018 12:44 PM, Stefan Hajnoczi wrote:
>> Determining the size of a field is useful when you don't have a struct
>> variable handy. Open-coding this is ugly.
>>
>> This patch adds the sizeof_field() macro, which is similar to
>> typeof_field(). E
On 06/13/2018 02:55 AM, Alex Bennée wrote:
> Add the ability to save SVE registers from the signal context. This is
> controlled with an optional flag --test-sve. The whole thing is
> conditionally compiled when SVE support is in the sigcontext headers.
>
> Signed-off-by: Alex Bennée
>
> ---
> v
On 14/06/2018 17:44, Daniel P. Berrangé wrote:
>> "-cpu" is certainly wrong for KVM_CAP_X86_DISABLE_EXITS. "-cpu" is a
>> device option, while this is about host behavior. "-realtime"'s name is
>> awful, but I still think it's the best place for this option. Maybe we
>> could call it "-realtime p
On Thu, Jun 14, 2018 at 1:25 PM, Edgar E. Iglesias
wrote:
> From: "Edgar E. Iglesias"
>
> Correct the masking of output addresses.
>
> This fixes Coverity CID 1391441.
>
> Fixes: commit 3924a9aa02
> Reported-by: Peter Maydell
> Signed-off-by: Edgar E. Iglesias
Reviewed-by: Alistair Francis
A
On 06/13/2018 02:55 AM, Alex Bennée wrote:
> Left justification is more pleasing to the eye than the default. We
> also drop the masking which isn't needed as we are casting to a
> smaller size anyway.
>
> This was split out of Richard's re-factoring work for SVE.
>
> Signed-off-by: Alex Bennée
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