When we add PCIe extended capabilities, we should be following the rule
that we add the head extended cap (at offset 0x100) first, then the rest
of them. Meanwhile, we are always adding new capability bits at the end
of the list. Here the "next" looks meaningless in all cases since it
should always
On Mon, 02/13 14:52, Paolo Bonzini wrote:
> --- /dev/null
> +++ b/util/aiocb.c
> @@ -0,0 +1,55 @@
> +/*
> + * BlockAIOCB allocation
> + *
> + * Copyright (c) 2003-2017 Fabrice Bellard and the QEMU team
Hmm, I'm not lawyer, just wondering if the QEMU team is a legal entity that can
hold copyright?
On Mon, Feb 13, 2017 at 7:02 PM, Ketan Nilangekar
wrote:
>
>
> On 2/13/17, 3:23 PM, "Jeff Cody" wrote:
>
> On Mon, Feb 13, 2017 at 10:36:53PM +, Ketan Nilangekar wrote:
> >
> >
> > On 2/13/17, 8:32 AM, "Jeff Cody" wrote:
> >
> > On Mon, Feb 13, 2017 at 01:37:25PM
On Thu, Feb 09, 2017 at 08:01:14AM -0500, Jintack Lim wrote:
> On Wed, Feb 8, 2017 at 10:52 PM, Peter Xu wrote:
> > (cc qemu-devel and Alex)
> >
> > On Wed, Feb 08, 2017 at 09:14:03PM -0500, Jintack Lim wrote:
> >> On Wed, Feb 8, 2017 at 10:49 AM, Jintack Lim
> >> wrote:
> >> > Hi Peter,
> >> >
On 2017/2/14 12:08, Jason Wang wrote:
On 2017年02月14日 10:32, Hailiang Zhang wrote:
Hi Jason,
I think the better way is notify the comparing thread and let it do the
releasing. You probably need similar mechanism to notify from comparing
thread to checkpoint thread.
It seems that there
>>> Paolo Bonzini 2017/2/13 星期一 下午 7:55 >>>
>
>
>On 13/02/2017 12:53, Lin Ma wrote:
>>
>> The content of qemu-version.h recorded the git head info of last build.
>> After 'git pull && make ', Because the content of qemu-version.h.tmp is
>> generated
>> based on the lastest git describe, Now thi
This patch changes resetting strategy of the audio polling timer.
It does not change expiration time if the timer is already set.
This patch is needed to make this timer deterministic and to use execution
record/replay for audio devices.
audio_reset_timer is used in the function audio_vm_change_st
On 02/14/2017 06:02 AM, David Gibson wrote:
> On Mon, Feb 13, 2017 at 03:09:16PM +0100, Cédric Le Goater wrote:
>> Today, the ICS (Interrupt Controller Source) object is created and
>> realized by the init and realize routines of the XICS object, but some
>> of the parameters are only known at the
On Mon, 02/13 18:22, Kevin Wolf wrote:
> Mow that blk_insert_bs() requests the BlockBackend permissions for the
Now? :)
> node it attaches to, it can fail. Instead of aborting, pass the errors
> to the callers.
>
[snip]
> @@ -332,11 +348,17 @@ int bdrv_commit(BlockDriverState *bs)
>
> /
From: Anton Nefedov
Windows reports BSOD parameters through Hyper-V crash MSRs. This
information is very useful for initial crash analysis and thus
it would be nice to have a way to fetch it.
Signed-off-by: Anton Nefedov
Signed-off-by: Denis V. Lunev
---
kvm-all.c | 1 +
qapi-schema.
From: Anton Nefedov
There is a suitable log mask for the purpose.
Signed-off-by: Anton Nefedov
Signed-off-by: Denis V. Lunev
---
vl.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/vl.c b/vl.c
index d68254b..903c46d 100644
--- a/vl.c
+++ b/vl.c
@@ -1709,6 +1709,8 @@ void qem
Windows reports BSOD parameters through Hyper-V crash MSRs. This
information is very useful for initial crash analysis and thus
it would be nice to see it in the QEMU log file. There is suitable
log mask for the purpose.
Linux guest does not provide this information, but still it would
be nice to
On 02/14/2017 02:58 AM, David Gibson wrote:
> On Mon, Feb 13, 2017 at 10:33:24AM +0100, Cédric Le Goater wrote:
>> XICSState inherits from SysBusDevice and so the object class should
>> inherit from SysBusDeviceClass.
>>
>> Signed-off-by: Cédric Le Goater
>
> That's definitely a bug, but I don't
From: Anton Nefedov
it's not very convenient to use the crash-information property interface,
so provide a CPU class callback to get the guest crash information, and pass
that information in the event
Signed-off-by: Anton Nefedov
Signed-off-by: Denis V. Lunev
---
hw/misc/pvpanic.c | 2
On 2/13/2017 9:22 PM, Jitendra Kolhe wrote:
> On 2/13/2017 5:34 PM, Igor Mammedov wrote:
>> On Mon, 13 Feb 2017 11:23:17 +
>> "Daniel P. Berrange" wrote:
>>
>>> On Mon, Feb 13, 2017 at 11:45:46AM +0100, Igor Mammedov wrote:
On Mon, 13 Feb 2017 14:30:56 +0530
Jitendra Kolhe wrote:
>>
+-- On Mon, 13 Feb 2017, Alistair Francis wrote --+
| > -MASKED_WRITE(s->trnmod, mask, value);
| > +MASKED_WRITE(s->trnmod, mask, value & 0x0037);
|
| This looks good.
|
| Can you use a macro for the value so then it is explained and easier
| to change in the future?
Done, sent
From: Prasad J Pandit
In SDHCI protocol, the transfer mode register is defined
to be of 6 bits. Mask its value with '0x0037' so that an
invalid value could not be assigned.
Signed-off-by: Prasad J Pandit
---
hw/sd/sdhci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Update per: use
On Mon, 02/13 18:22, Kevin Wolf wrote:
> Almost all format drivers have the same characteristics as far as
> permissions are concerned: They have one or more children for storing
> their own data and, more importantly, metadata (can be written to and
> grow even without external write requests, mus
On Mon, 02/13 18:22, Kevin Wolf wrote:
> +int bdrv_child_try_set_perm(BdrvChild *c, uint64_t perm, uint64_t shared,
> +Error **errp)
> +{
> +int ret;
> +
> +ret = bdrv_child_check_perm(c, perm, shared, errp);
> +if (ret < 0) {
> +return ret;
> +}
On Mon, Feb 13, 2017 at 03:09:16PM +0100, Cédric Le Goater wrote:
> Today, the ICS (Interrupt Controller Source) object is created and
> realized by the init and realize routines of the XICS object, but some
> of the parameters are only known at the machine level.
>
> These parameters are passed f
[Expired for QEMU because there has been no activity for 60 days.]
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Title:
Unexpected c
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** Changed in: qemu-kvm (Ubuntu)
Status: Incomplete => Expired
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Title:
Unable to in
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Title:
qemu crashes
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Title:
libvirt/kvm
[Expired for QEMU because there has been no activity for 60 days.]
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Title:
Error readin
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Title:
Slirp cannot
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Title:
Always mouse
On Mon, Feb 13, 2017 at 12:14:23PM +0200, Marcel Apfelbaum wrote:
> On 02/13/2017 06:33 AM, David Gibson wrote:
> > On Sun, Feb 12, 2017 at 09:05:46PM +0200, Marcel Apfelbaum wrote:
> > > On 02/10/2017 02:37 AM, David Gibson wrote:
> > > > On Thu, Feb 09, 2017 at 10:04:47AM +0100, Laszlo Ersek wrot
On 2017年02月14日 10:32, Hailiang Zhang wrote:
Hi Jason,
I think the better way is notify the comparing thread and let it do the
releasing. You probably need similar mechanism to notify from comparing
thread to checkpoint thread.
It seems that there is no available APIs in glib to notify
On Feb 13, 2017, at 10:25 PM, Richard Henderson wrote:
> On 02/10/2017 11:39 AM, Stafford Horne wrote:
>> On Thu, Feb 09, 2017 at 09:10:51AM -0500, G 3 wrote:
>>>
>>> On Feb 8, 2017, at 11:52 PM, qemu-devel-requ...@nongnu.org wrote:
>>>
Message: 6
Date: Wed, 8 Feb 2017 20:51:32 -0800
On Mon, Feb 13, 2017 at 08:36:45AM +0100, Thomas Huth wrote:
> On 13.02.2017 06:33, David Gibson wrote:
> > On Tue, Nov 22, 2016 at 10:19:38AM +1100, Sam Bobroff wrote:
> >> The spapr-vlan device in QEMU has always presented it's MAC address in
> >> the device tree as an 8 byte value, even though P
On 02/10/2017 11:39 AM, Stafford Horne wrote:
On Thu, Feb 09, 2017 at 09:10:51AM -0500, G 3 wrote:
On Feb 8, 2017, at 11:52 PM, qemu-devel-requ...@nongnu.org wrote:
Message: 6
Date: Wed, 8 Feb 2017 20:51:32 -0800
From: Richard Henderson
To: qemu-devel@nongnu.org
Cc: sho...@gmail.com
Subject
On 02/14/2017 02:05 PM, Nikunj A Dadhania wrote:
Yes, you are right. I had a discussion with Paul Mackerras yesterday, he
explained to me in detail about the bits. I am working on the revised
implementation. Will detail it in the commit message.
As you're working on this, consider changing the
David Gibson writes:
> [ Unknown signature status ]
> On Fri, Feb 10, 2017 at 09:49:17AM +0530, Nikunj A Dadhania wrote:
>> David Gibson writes:
>>
>> > [ Unknown signature status ]
>> > On Thu, Feb 09, 2017 at 04:04:04PM +0530, Nikunj A Dadhania wrote:
>> >> POWER ISA 3.0 adds CA32 and OV32 st
On 2/13/17, 3:23 PM, "Jeff Cody" wrote:
On Mon, Feb 13, 2017 at 10:36:53PM +, Ketan Nilangekar wrote:
>
>
> On 2/13/17, 8:32 AM, "Jeff Cody" wrote:
>
> On Mon, Feb 13, 2017 at 01:37:25PM +, Stefan Hajnoczi wrote:
> > On Tue, Feb 07, 2017 at 03:12:
On Fri, Feb 10, 2017 at 09:49:17AM +0530, Nikunj A Dadhania wrote:
> David Gibson writes:
>
> > [ Unknown signature status ]
> > On Thu, Feb 09, 2017 at 04:04:04PM +0530, Nikunj A Dadhania wrote:
> >> POWER ISA 3.0 adds CA32 and OV32 status in 64-bit mode. Add the flags
> >> and corresponding def
On 2017/2/7 17:21, Jason Wang wrote:
On 2017年02月07日 16:19, Hailiang Zhang wrote:
On 2017/2/7 15:57, Jason Wang wrote:
On 2017年02月07日 15:54, Hailiang Zhang wrote:
Hi Jason,
On 2017/2/6 20:53, Jason Wang wrote:
On 2017年02月06日 19:11, Hailiang Zhang wrote:
On 2017/2/6 17:35, Jason Wang wr
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T
On Mon, Feb 13, 2017 at 10:33:24AM +0100, Cédric Le Goater wrote:
> XICSState inherits from SysBusDevice and so the object class should
> inherit from SysBusDeviceClass.
>
> Signed-off-by: Cédric Le Goater
That's definitely a bug, but I don't think this is the right fix.
XICS was put on sysbus
On Fri, Feb 10, 2017 at 7:43 PM, Philippe Mathieu-Daudé wrote:
> The register_read() function expects a bitmask argument. To avoid duplicated
The register_read() and register_write() functions
> code, a new inlined function register_enabled_mask() is introduced.
>
> Signed-off-by: Philippe Mathi
On Mon, 02/13 14:28, Stefan Hajnoczi wrote:
> On Tue, Feb 07, 2017 at 02:52:38PM +0100, Laszlo Ersek wrote:
> > On 02/07/17 14:27, Fam Zheng wrote:
> > > These are used in each request handling, inline them.
> > >
> > > Signed-off-by: Fam Zheng
> > > ---
> > > hw/block/virtio-blk.c | 9 +
On 02/03/2017 04:40 AM, Vladimir Sementsov-Ogievskiy wrote:
> Realize block bitmap storing interface, to allow qcow2 images store
> persistent bitmaps.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> Reviewed-by: Max Reitz
> ---
> block/qcow2-bitmap.c | 489
> ++
On Mon, 2017-02-13 at 15:10 +1100, David Gibson wrote:
> On Mon, Feb 13, 2017 at 02:30:27PM +1100, Suraj Jitindar Singh wrote:
> >
> > The pvr-list passed in H_Client_Architecture_Support is used to
> > communicate the supported pvrs of the client program. When an
> > exact match is found you are
On Mon, Feb 13, 2017 at 10:36:53PM +, Ketan Nilangekar wrote:
>
>
> On 2/13/17, 8:32 AM, "Jeff Cody" wrote:
>
> On Mon, Feb 13, 2017 at 01:37:25PM +, Stefan Hajnoczi wrote:
> > On Tue, Feb 07, 2017 at 03:12:36PM -0800, ashish mittal wrote:
> > > On Tue, Nov 8, 2016 at 12:44
On 2/13/17, 8:32 AM, "Jeff Cody" wrote:
On Mon, Feb 13, 2017 at 01:37:25PM +, Stefan Hajnoczi wrote:
> On Tue, Feb 07, 2017 at 03:12:36PM -0800, ashish mittal wrote:
> > On Tue, Nov 8, 2016 at 12:44 PM, Jeff Cody wrote:
> > > On Mon, Nov 07, 2016 at 04:59:45PM -0800, Ashish
On 02/13/2017 10:13 PM, Jeff Cody wrote:
> On Mon, Feb 13, 2017 at 06:16:36PM +0100, Max Reitz wrote:
>> On 13.02.2017 08:10, Denis V. Lunev wrote:
>>> On 02/03/2017 06:08 PM, Denis V. Lunev wrote:
On 02/03/2017 06:06 PM, Denis V. Lunev wrote:
> From: Anton Nefedov
>
> If explicit
Add the neccessary sockopts for ping and traceroute on IPv6.
This fixes the following qemu warnings with IPv6:
Unsupported ancillary data: 0/2
Unsupported ancillary data: 0/11
Unsupported ancillary data: 41/25
Unsupported setsockopt level=0 optname=12
Unsupported setsockopt level=41 optname=16
Un
The HW does not special-case r0, but the ABI specifies that r0 should
contain 0. If we expose this fact to the optimizer, we can simplify
a lot of the generated code. We must of course verify that r0==0, but
that is trivial to do with a TB flag.
Signed-off-by: Richard Henderson
---
target/open
Reviewed-by: Bastian Koppelmann
Signed-off-by: Richard Henderson
---
target/openrisc/translate.c | 108
1 file changed, 108 insertions(+)
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
index 82b8bec..ce9672e 100644
--- a/targe
Significantly simplifies the implementation of the use of MAC.
Reviewed-by: Bastian Koppelmann
Signed-off-by: Richard Henderson
---
target/openrisc/cpu.h| 3 +-
target/openrisc/machine.c| 5 +-
target/openrisc/sys_helper.c | 13 +
target/openrisc/translate.c | 120
Reviewed-by: Bastian Koppelmann
Signed-off-by: Richard Henderson
---
target/openrisc/translate.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
index 6c745d3..f91ab6a 100644
--- a/target
Not documented as disabled for user mode.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Bastian Koppelmann
Signed-off-by: Richard Henderson
---
target/openrisc/translate.c | 32
1 file changed, 32 deletions(-)
diff --git a/target/openrisc/translate.c b/targ
This significantly streamlines carry and overflow production.
Signed-off-by: Richard Henderson
---
target/openrisc/cpu.h | 13 +++-
target/openrisc/exception_helper.c | 31 --
target/openrisc/helper.h | 4 +-
target/openrisc/translate.c| 119 +++
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Bastian Koppelmann
Signed-off-by: Richard Henderson
---
target/openrisc/helper.h | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/target/openrisc/helper.h b/target/openrisc/helper.h
index f4d97a2..78a
The NPC SPR is really only supposed to be used for FPGA debugging.
It contains the same contents as PC, unless one plays games. Follow
the or1ksim implementation in flushing delayed branch state when it
is changed.
The PPC SPR need not be updated every instruction, merely when we
exit the TB or a
This avoids having to keep merging and extracting the flag from SR.
Reviewed-by: Bastian Koppelmann
Signed-off-by: Richard Henderson
---
linux-user/elfload.c | 3 +-
linux-user/main.c | 3 +-
target/openrisc/cpu.h | 15 +-
target/openrisc/gdb
Signed-off-by: Richard Henderson
---
target/openrisc/cpu.h| 12 +---
target/openrisc/gdbstub.c| 2 +-
target/openrisc/interrupt.c | 4 ++--
target/openrisc/sys_helper.c | 2 +-
target/openrisc/translate.c | 40
5 files changed, 25
This allows the tcg optimizer to see, and fold, all of the
constants involved in a GOT base register load sequence.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/openrisc/translate.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/targe
Decoding the opcodes in the right order reduces by 100+ lines.
Also, it happens to put the opcodes in the same order as Chapter 17.
Reviewed-by: Bastian Koppelmann
Signed-off-by: Richard Henderson
---
target/openrisc/translate.c | 302 ++--
1 file changed
Avoids warnings from unused variables etc.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Bastian Koppelmann
Signed-off-by: Richard Henderson
---
target/openrisc/translate.c | 36
1 file changed, 12 insertions(+), 24 deletions(-)
diff --git a/target/open
Signed-off-by: Richard Henderson
---
target/openrisc/translate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
index 6c8f05c..dd4ba8c 100644
--- a/target/openrisc/translate.c
+++ b/target/openrisc/translate.c
@@ -1144,6 +1144,7 @@ st
Note that the specification for lf.madd.s is confused. It's
the only mention of supposed FPMADDHI/FPMADDLO special registers.
On the other hand, or1ksim implements a somewhat normal non-fused
multiply and add. Mirror that.
Reviewed-by: Bastian Koppelmann
Signed-off-by: Richard Henderson
---
t
Signed-off-by: Richard Henderson
---
target/openrisc/cpu.c | 1 +
target/openrisc/cpu.h | 3 ++
target/openrisc/interrupt.c| 1 +
target/openrisc/interrupt_helper.c | 1 +
target/openrisc/machine.c | 24 ++--
target/openrisc/mmu.c
This is in keeping with the toolchain and or1ksim.
Signed-off-by: Richard Henderson
---
configure | 6 +++---
default-configs/or1k-linux-user.mak | 1 +
default-configs/or1k-softmmu.mak| 4
default-configs/or32-linux-user.mak | 1 -
default-configs/or32-softmmu
Fix incorrect overflow calculation. Move overflow exception check
to a helper function, to eliminate inline branches. Remove some
incorrect special casing of R0. Implement multiply inline.
Reviewed-by: Bastian Koppelmann
Signed-off-by: Richard Henderson
---
target/openrisc/Makefile.objs
Removes a call at execution time for overflow exceptions.
Signed-off-by: Richard Henderson
---
target/openrisc/cpu.h | 4 ++--
target/openrisc/exception_helper.c | 2 +-
target/openrisc/translate.c| 24 +++-
3 files changed, 18 insertions(+), 12 deletio
From: Stafford Horne
I am working on testing instruction emulation patches for the linux
kernel. During testing I found these 2 issues:
- sets DSX (delay slot exception) but never clears it
- EEAR for illegal insns should point to the bad exception (as per
openrisc spec) but its not
This p
This is the v2 patch set that I posted last week.
It even acquired some new R-b. Whee!
r~
The following changes since commit 305e6c8a2ff7a6e3f4942b50e853230f18eeb5a9:
Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request'
into staging (2017-02-13 16:44:04 +)
are av
The architecture manual is consistent in using "I" for signed
fields and "K" for unsigned fields. Mirror that.
Reviewed-by: Bastian Koppelmann
Signed-off-by: Richard Henderson
---
target/openrisc/translate.c | 98 ++---
1 file changed, 40 insertions(+),
Threads work much better when you set the TLS register.
This was fixed in the upstream kernel for Linux 4.9.
Signed-off-by: Richard Henderson
---
linux-user/openrisc/target_cpu.h | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/linux-user/openrisc/target_cpu.h b/linux-user/
We need to handle EXCP_DEBUG and EXCP_INTERRUPT.
We need to send signals to the guest using queue_signal.
Signed-off-by: Richard Henderson
---
linux-user/main.c | 95 ---
1 file changed, 41 insertions(+), 54 deletions(-)
diff --git a/linux-use
Is it correct to assume that current 16.04.2 Xenial with the 2.5 QEMU
package, doesn't have this patch and can't generate MiB aligned Azure
images with qemu-img (no force_size support) ?
Any recommended PPA backport of QEMU from 16.10 (2.6+) ?
cheers.
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Looks like this is a duplicate of
https://bugs.launchpad.net/qemu/+bug/921208 ... so closing this ticket
here.
** Changed in: qemu
Status: New => Invalid
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Bug has also been reported here:
https://bugs.launchpad.net/qemu/+bug/1012023
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Title:
win7/x64 installer hangs on startup with 0x005d.
Statu
Looks like this should work nowadays (of course you need to start a
listening program first), so closing this bug ticket now.
** Changed in: qemu
Status: New => Fix Released
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Triaging old bug tickets ... Can you still reproduce this problem with
the latest version of QEMU?
** Changed in: qemu
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On Wed, 8 Feb 2017, Eric Blake wrote:
> On 02/07/2017 11:24 PM, Zhang Chen wrote:
> > We can call this qmp command to do checkpoint outside of qemu.
> > Xen colo will need this function.
> >
> > Signed-off-by: Zhang Chen
> > Signed-off-by: Wen Congyang
> > ---
> > migration/colo.c | 17
AFAIK an OHCI driver has been added to OpenBIOS in 2014, so marking this
bug as fixed now. If you still have issues with OpenBIOS, please report
them to the OpenBIOS project instead of the QEMU bug tracker, thanks!
** Changed in: qemu
Status: New => Fix Released
--
You received this bug n
Sounds like this was an Ubuntu- or libvirt-specific bug ... so closing
this in the upstream QEMU bug tracker.
** Changed in: qemu
Status: New => Invalid
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On 02/14/2017 06:33 AM, Pranith Kumar wrote:
On Mon, Feb 13, 2017 at 2:19 PM, Richard Henderson wrote:
On 02/13/2017 11:10 PM, Alex Bennée wrote:
@@ -239,9 +240,16 @@ static void cpu_exec_step(CPUState *cpu)
1 | CF_NOCACHE | CF_IGNORE_ICOUNT);
tb->orig_tb = NULL;
On Sat, Feb 11, 2017 at 7:06 AM, P J P wrote:
> From: Prasad J Pandit
>
> In the SDHCI protocol, the transfer mode register value
> is used during multi block transfer to check if block count
> register is enabled and should be updated. Transfer mode
> register could be set such that, block count
On Sat, Feb 11, 2017 at 7:07 AM, P J P wrote:
> From: Prasad J Pandit
>
> In sdhci_write invoke multi block transfer if it is enabled
> in the transfer mode register 's->trnmod'.
>
> Signed-off-by: Prasad J Pandit
Reviewed-by: Alistair Francis
Thanks,
Alistair
> ---
> hw/sd/sdhci.c | 6 +++
On Sat, Feb 11, 2017 at 7:06 AM, P J P wrote:
> From: Prasad J Pandit
>
> In SDHCI protocol, the transfer mode register is defined
> to be of 6 bits. Mask its value with '0x0037' so that an
> invalid value couldn't be assigned.
>
> Signed-off-by: Prasad J Pandit
> ---
> hw/sd/sdhci.c | 2 +-
>
Triaging old bug tickets ... Can you still reproduce this problem with
the latest version of QEMU?
** Changed in: qemu
Status: New => Incomplete
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Triaging old bug tickets ... Can you still reproduce this problem with
the latest version of QEMU?
** Changed in: qemu
Status: New => Incomplete
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On Mon, Feb 13, 2017 at 2:19 PM, Richard Henderson wrote:
> On 02/13/2017 11:10 PM, Alex Bennée wrote:
>>
>> @@ -239,9 +240,16 @@ static void cpu_exec_step(CPUState *cpu)
>> 1 | CF_NOCACHE | CF_IGNORE_ICOUNT);
>> tb->orig_tb = NULL;
>> tb_unlock();
>> -/* execut
Triaging old bug tickets ... Can you still reproduce this problem with
the latest version of QEMU?
** Changed in: qemu
Status: New => Incomplete
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Up
On Wed, Feb 01, 2017 at 09:43:57PM +0100, Laurent Vivier wrote:
> Le 31/01/2017 à 23:05, Jose Ricardo Ziviani a écrit :
> > A segfault is noticed when an emulated program uses any of ucontext
> > regs fields. Risu detected this issue in the following operation when
> > handling a signal:
> >
On 02/13/2017 11:10 PM, Alex Bennée wrote:
@@ -239,9 +240,16 @@ static void cpu_exec_step(CPUState *cpu)
1 | CF_NOCACHE | CF_IGNORE_ICOUNT);
tb->orig_tb = NULL;
tb_unlock();
-/* execute the generated code */
-trace_exec_tb_nocache(tb, pc);
-cpu_tb_exec(
* Alexey Perevalov (a.pereva...@samsung.com) wrote:
> Hello David!
Hi Alexey,
> I have checked you series with 1G hugepage, but only in 1 Gbit/sec network
> environment.
Can you show the qemu command line you're using? I'm just trying
to make sure I understand where your hugepages are; running
This uses the lock-free mutex described in the paper '"Blocking without
Locking", or LFTHREADS: A lock-free thread library' by Gidenstam and
Papatriantafilou. The same technique is used in OSv, and in fact
the code is essentially a conversion to C of OSv's code.
Signed-off-by: Paolo Bonzini
---
On Mon, Feb 13, 2017 at 06:16:36PM +0100, Max Reitz wrote:
> On 13.02.2017 08:10, Denis V. Lunev wrote:
> > On 02/03/2017 06:08 PM, Denis V. Lunev wrote:
> >> On 02/03/2017 06:06 PM, Denis V. Lunev wrote:
> >>> From: Anton Nefedov
> >>>
> >>> If explicit zeroing out before mirroring is required fo
Commit a3a3d8c7 introduced a segfault bug while checking for
'dc->vmsd->unmigratable' which caused QEMU to crash when trying to add
devices which do no set their 'dc->vmsd' yet while initialization.
Place a 'dc->vmsd' check prior to it so that we do not segfault for
such devices.
NOTE: This doesn'
From: "Dr. David Alan Gilbert"
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Michael S. Tsirkin
Message-Id: <20170203160651.19917-5-dgilb...@redhat.com>
Signed-off-by: Dr. David Alan Gilbert
Merge fix against Halil's removal of the '_start' field in
VMSTATE_VBUFFER_MULTIPLY
---
hw/
From: Halil Pasic
The member VMStateField.start is used for two things, partial data
migration for VBUFFER data (basically provide migration for a
sub-buffer) and for locating next in QTAILQ.
The implementation of the VBUFFER feature is broken when VMSTATE_ALLOC
is used. This however goes unnoti
From: Ashijeet Acharya
Migration of a "none" machine with no RAM crashes abruptly as
bitmap_new() fails and thus aborts. Instead place zero RAM checks at
appropriate places to skip migration of RAM in this case and complete
migration successfully for devices only.
Signed-off-by: Ashijeet Acharya
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