On 2017年02月07日 15:54, Hailiang Zhang wrote:
Hi Jason,
On 2017/2/6 20:53, Jason Wang wrote:
On 2017年02月06日 19:11, Hailiang Zhang wrote:
On 2017/2/6 17:35, Jason Wang wrote:
On 2017年02月06日 16:13, Hailiang Zhang wrote:
On 2017/2/3 11:47, Jason Wang wrote:
On 2017年01月24日 22:05, zhanghai
Hi Jason,
On 2017/2/6 20:53, Jason Wang wrote:
On 2017年02月06日 19:11, Hailiang Zhang wrote:
On 2017/2/6 17:35, Jason Wang wrote:
On 2017年02月06日 16:13, Hailiang Zhang wrote:
On 2017/2/3 11:47, Jason Wang wrote:
On 2017年01月24日 22:05, zhanghailiang wrote:
The original 'timer_check_lock' m
Peter Maydell wrote:
> On 6 February 2017 at 16:51, Juan Quintela wrote:
> I get a test failure on aarch64 host on one of the ppc guest tests:
>
> TEST: tests/prom-env-test... (pid=26435)
> /ppc64/prom-env/mac99: OK
> /ppc64/prom-env/g3beige:
On 1/30/2017 2:02 PM, Jitendra Kolhe wrote:
> On 1/27/2017 6:33 PM, Dr. David Alan Gilbert wrote:
>> * Jitendra Kolhe (jitendra.ko...@hpe.com) wrote:
>>> Using "-mem-prealloc" option for a very large guest leads to huge guest
>>> start-up and migration time. This is because with "-mem-prealloc" opt
On Thu, Feb 02, 2017 at 05:25:15PM +0300, Denis V. Lunev wrote:
> From: Anton Nefedov
>
> If explicit zeroing out before mirroring is required for the target image,
> it moves the block job offset counter to EOF, then offset and len counters
> count the image size twice. There is no harm but stat
Paolo Bonzini writes:
> On 06/02/2017 19:12, Markus Armbruster wrote:
>>> QOM now supports class properties. We can convert the wide majority of
>>> them, including qdev's "static" properties, to class properties.
>>
>> Won't help object-add as long as dynamic properties remain.
>
> Well, only
This patch removes unneeded assignment to cpu->exit_request.
cpu_exec_nocache executes all available instructions and therefore
icount becomes 0. Then other conditions will break the execution
loop, making assignment to cpu->exit_request useless.
This patch should be applied over Paolo's series:
h
This patch adds check to break cpu loop when icount expires without
setting the TB_EXIT_ICOUNT_EXPIRED flag. It happens when there is no
available translated blocks and all instructions were executed.
In icount replay mode unnecessary tb_find will be called (which may
cause an exception) and execut
On 2017年02月07日 14:25, Peter Xu wrote:
On Tue, Feb 07, 2017 at 01:40:39PM +0800, Jason Wang wrote:
On 2017年02月03日 16:22, Peter Xu wrote:
Another patch to convert the DPRINTF() stuffs. This patch focuses on the
address translation path and caching.
Signed-off-by: Peter Xu
---
hw/i386/intel_
On Tue, Feb 07, 2017 at 01:40:39PM +0800, Jason Wang wrote:
>
>
> On 2017年02月03日 16:22, Peter Xu wrote:
> >Another patch to convert the DPRINTF() stuffs. This patch focuses on the
> >address translation path and caching.
> >
> >Signed-off-by: Peter Xu
> >---
> > hw/i386/intel_iommu.c | 84
> > +
On 2017年02月07日 14:16, Peter Xu wrote:
On Tue, Feb 07, 2017 at 01:27:37PM +0800, Jason Wang wrote:
On 2017年02月03日 16:22, Peter Xu wrote:
There are lots of places in current intel_iommu.c codes that named
"iova" as "gpa". It is really confusing to use a name "gpa" in these
places (which is ver
On 2017年02月07日 14:08, Peter Xu wrote:
On Tue, Feb 07, 2017 at 01:38:30PM +0800, Jason Wang wrote:
On 2017年02月03日 16:22, Peter Xu wrote:
VT-d codes are still using static DEBUG_INTEL_IOMMU macro. That's not
good, and we should end the day when we need to recompile the code
before getting usef
On Mon, 02/06 13:36, Eric Blake wrote:
> On 02/03/2017 05:57 AM, Pradeep Jagadeesh wrote:
> > This patchset adds the throttle support for the 9p-local driver.
> > For now this functionality can be enabled only through qemu cli options.
> > QMP interface and support to other drivers need further ext
On 2017年02月03日 16:22, Peter Xu wrote:
This patch is based on Aviv Ben-David ()'s patch
upstream:
"IOMMU: enable intel_iommu map and unmap notifiers"
https://lists.gnu.org/archive/html/qemu-devel/2016-11/msg01453.html
However I removed/fixed some content, and added my own codes.
Instead
On Tue, Feb 07, 2017 at 01:27:37PM +0800, Jason Wang wrote:
>
>
> On 2017年02月03日 16:22, Peter Xu wrote:
> >There are lots of places in current intel_iommu.c codes that named
> >"iova" as "gpa". It is really confusing to use a name "gpa" in these
> >places (which is very easily to be understood as
On 2017年02月03日 16:22, Peter Xu wrote:
Before this one we only invalidate context cache when we receive context
entry invalidations. However it's possible that the invalidation also
contains a domain switch (only if cache-mode is enabled for vIOMMU). In
that case we need to notify all the regist
On 2017年02月03日 16:22, Peter Xu wrote:
This is preparation work to finally enabled dynamic switching ON/OFF for
VT-d protection. The old VT-d codes is using static IOMMU address space,
and that won't satisfy vfio-pci device listeners.
Let me explain.
vfio-pci devices depend on the memory regio
On 2017年02月03日 16:22, Peter Xu wrote:
+trace_vtd_replay_ce_valid(bus_n, PCI_SLOT(vtd_as->devfn),
+ PCI_FUNC(vtd_as->devfn),
+ VTD_CONTEXT_ENTRY_DID(ce.hi),
+ ce.hi, ce.lo);
+vtd_pa
On Tue, Feb 07, 2017 at 01:38:30PM +0800, Jason Wang wrote:
>
>
> On 2017年02月03日 16:22, Peter Xu wrote:
> >VT-d codes are still using static DEBUG_INTEL_IOMMU macro. That's not
> >good, and we should end the day when we need to recompile the code
> >before getting useful debugging information for
On 02/01/2017 02:04 AM, Stafford Horne wrote:
For kernel builds I have created toolchain binaries here:
http://shorne.noip.me/crosstool/files/bin/x86_64/5.4.0/
These should work.
This gdb crashes on the first "stepi" that I issue. To reproduce,
$ cat z.c
int main() { return 0; }
$ or1k-mu
On 2017年02月03日 16:22, Peter Xu wrote:
This helps in debugging incorrect level passed in.
Signed-off-by: Peter Xu
---
hw/i386/intel_iommu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index c672621..d74aa27 100644
--- a/hw/i386/intel_iom
On 2017年02月03日 16:22, Peter Xu wrote:
Another patch to convert the DPRINTF() stuffs. This patch focuses on the
address translation path and caching.
Signed-off-by: Peter Xu
---
hw/i386/intel_iommu.c | 84 ---
hw/i386/trace-events | 7 +
On 2017年02月03日 16:22, Peter Xu wrote:
VT-d codes are still using static DEBUG_INTEL_IOMMU macro. That's not
good, and we should end the day when we need to recompile the code
before getting useful debugging information for vt-d. Time to switch to
the trace system.
Looks like we end up with us
On 2017年02月03日 16:22, Peter Xu wrote:
There are lots of places in current intel_iommu.c codes that named
"iova" as "gpa". It is really confusing to use a name "gpa" in these
places (which is very easily to be understood as "Guest Physical
Address", while it's not). To make the codes (much) easi
On 2017年02月03日 16:22, Peter Xu wrote:
Now we have a standalone memory region for MSI, all the irq region
requests should be redirected there. Cleaning up the block with an
assertion instead.
Signed-off-by: Peter Xu
Reviewed-by: Jason Wang
---
hw/i386/intel_iommu.c | 28 ++--
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/613529
Title:
qemu does no
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/920772
Title:
Win98SE glit
** Description changed:
I have a base image file "base.qcow2" and a delta qcow2 image file
"delta.qcow2" whose backing file is "base.qcow2".
Now I use qemu-img to convert "delta.qcow2" and will get a new image
file "new.qcow2" which is entire and equivalent to combination of
"base.qco
Programs run under qemu-ppc64 on an x86_64 host currently segfault
if they use pthread_create() due to the adjustment made to the NIP in
commit bd6fefe71cec5a0c7d2be4ac96307f25db56abf9.
This patch changes cpu_loop() to set the NIP back to the
pre-incremented value before calling do_syscall(), whic
Both radix and hash modes require guests to use
h_register_process_table() to set up the MMU. Implement it using the
new KVM ioctl KVM_PPC_CONFIGURE_V3_MMU.
This hypercall is also necessary for fully emulated guests, so it will
need to be reworked to integrate with Suraj's TCG patchset.
---
hw/pp
The PPC MMU types are sometimes treated as if they were a bit field
and sometime as if they were an enum which causes maintenance
problems: flipping bits in the MMU type (which is done on both the 1TB
segment and 64K segment bits) currently produces new MMU type
values that are not handled in every
Set new option vector 5 bits to indicate KVM support for in-memory
radix or hash modes and related options. The existing logic will
propagate the results back to the guest in the device tree. This
allows guests to perform client architecture support negotiation on
the new radix and hash MMU modes a
This provides some new definitions needed by ISA 3.00 guests.
It is a large change because this is the first import since
some kernel header files have become autogenerated.
Note: update-linux-headers.sh currently generates a change that
(incorrectly) removes virtio_mmio.h and the change has been
Set the default ibm,pa_features bits for ISA 3.0.
Providing the radix MMU support bit in ibm,pa-features will cause some
recent (e.g. 4.9) kernels to attempt to initialize the MMU as if they
were a radix host, which will cause them to crash. So, if a guest
performs a client architecture support ca
Query and cache the value of two new KVM capabilities that indicate
KVM's support for new radix and hash modes of the MMU.
Signed-off-by: Sam Bobroff
---
target/ppc/kvm.c | 14 ++
target/ppc/kvm_ppc.h | 12
2 files changed, 26 insertions(+)
diff --git a/target/ppc/k
Because KVM will soon provide the necessary infrastructure for KVM guests to
run on POWER9 CPUs, we can now start exploiting this new functionality from
QEMU. See:
https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-January/153433.html
This work is not yet complete but it is functional and is pr
Because KVM cannot support radix and hash modes concurrently, QEMU can
avoid allocating a hash page table if KVM supports radix mode.
Signed-off-by: Sam Bobroff
---
hw/ppc/spapr.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
i
Use the new ioctl, KVM_PPC_GET_RMMU_INFO, to fetch radix MMU
information from KVM and present the page encodings in the device tree
under ibm,processor-radix-AP-encodings. This provides page size
information to the guest which is necessary for it to use radix mode.
Signed-off-by: Sam Bobroff
---
The last byte of the option vector was missing due to an off-by-one
error. Without this fix, client architecture support negotiation will
fail because the last byte of option vector 5, which contains the MMU
support, will be missed.
Signed-off-by: Sam Bobroff
---
hw/ppc/spapr_ovec.c | 2 +-
1 fi
@Eric Blake. Sorry, I didn't make it clear. In fact, I don't want to get
a complete image. I just want to convert qcow2 overlay and get a new
qcow2 overlay. Maybe you think my intention is meaningless， but this is
what I want.
** Changed in: qemu
Status: Invalid => Incomplete
** Descriptio
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PULL 0/5] target/hppa patch queue
Message-id: 20170207023229.29431-1-...@twiddle.net
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline
From: Laurent Vivier
As we have now a linux-user HPPA target, we can add it to the list of
supported targets in qemu-binfmt-conf.sh
Signed-off-by: Laurent Vivier
Reviewed-by: Richard Henderson
Message-Id: <20170126080449.28255-2-laur...@vivier.eu>
Signed-off-by: Richard Henderson
---
scripts
Add a missing break, detected by Coverity.
Reported-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/hppa/gdbstub.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/hppa/gdbstub.c b/target/hppa/gdbstub.c
index 413a5e1..c37a56f 100644
--- a/target/hppa/gdbstub.c
+++ b/targ
From: Laurent Vivier
the correct UTS machine name (as expected by systemd) is "parisc",
not "hppa".
Signed-off-by: Laurent Vivier
Message-Id: <20170126080449.28255-4-laur...@vivier.eu>
Signed-off-by: Richard Henderson
---
linux-user/hppa/target_syscall.h | 2 +-
1 file changed, 1 insertion(+)
On 02/03/2017 07:14 AM, Stafford Horne wrote:
I tried your tgt-or1k-2 branch with my latest kernel and have no issues.
Ok, excellent, thanks. I'll send a pull for that branch then.
r~
Nothing complicated here. Two bugs from Laurent, two noticed
by Coverity (through multiple channels).
r~
The following changes since commit 7d2c6c95511e42dffe2b263275e09957723d0ff4:
Merge remote-tracking branch 'remotes/kraxel/tags/pull-usb-20170206-1' into
staging (2017-02-0
From: Laurent Vivier
apt-get was hanging on linux-user hppa.
strace has shown the netlink data stream was not correctly byte swapped.
It appears the fd translator function is unregistered just after it
has been registered, so the translator function is not called.
This patch removes the fd_tra
Removes some dead code detected by Covarity.
Reported-by: Paolo Bonzini
Signed-off-by: Richard Henderson
---
target/hppa/translate.c | 17 +
1 file changed, 5 insertions(+), 12 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 4d243f7..5d571f0 10
On 2017年02月03日 16:22, Peter Xu wrote:
From: Aviv Ben-David
This capability asks the guest to invalidate cache before each map operation.
We can use this invalidation to trap map operations in the hypervisor.
Signed-off-by: Aviv Ben-David
[peterx: using "caching-mode" instead of "cache-mode"
On 01/30/2017 05:49 AM, Peter Maydell wrote:
+case 35:
+env->iaoq_b = val;
Is this a missing "break;" or a missing "/* fall through */" ?
Yep, thanks.
r~
Hi Alex,
I just spotted this:
On Mon, Feb 6, 2017 at 10:30 AM, Alex Bennée wrote:
> From: KONRAD Frederic
>
> We know there will be cases where MTTCG won't work until additional work
> is done in the front/back ends to support. It will however be useful to
> be able to turn it on.
>
> As a res
@Eric Blake, Thanks very much for your help. In your way, I have
verified that this feature already exists.
** Changed in: qemu
Status: New => Invalid
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/
Hi~ Eric.
If you have time, please give me some comments.
This series has been sent for a long time.
Thanks
Zhang Chen
On 02/06/2017 09:13 PM, Dr. David Alan Gilbert wrote:
* Jason Wang (jasow...@redhat.com) wrote:
On 2017年01月26日 11:04, Zhang Chen wrote:
Hi~
No news for a week.
We nee
Hi,
> From: Michael S. Tsirkin [mailto:m...@redhat.com]
> Sent: Tuesday, February 07, 2017 2:20 AM
> Subject: Re: [Qemu-devel] [PATCH v16 1/2] virtio-crypto: Add virtio crypto
> device specification
>
> On Mon, Feb 06, 2017 at 03:46:25PM +, Stefan Hajnoczi wrote:
> > On Mon, Feb 06, 2017 at 0
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH v3 00/16] target-m68k: implement 680x0 FPU
Message-id: 20170207005930.28327-1-laur...@vivier.eu
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(
Coldfire uses float64, but 680x0 use floatx80.
This patch introduces the use of floatx80 internally
and enables 680x0 80bits FPU.
Signed-off-by: Laurent Vivier
---
target/m68k/cpu.c| 13 +-
target/m68k/cpu.h| 10 +-
target/m68k/fpu_helper.c | 202 +---
target/m68k/h
Add fsinh, flognp1, ftanh, fatan, fasin, fatanh,
fsin, ftan, fetox, ftwotox, ftentox, flogn, flog10, facos,
fcos.
As softfloat library does not provide these functions,
we us the libm of the host.
Signed-off-by: Laurent Vivier
---
target/m68k/fpu_helper.c | 237 +
Signed-off-by: Laurent Vivier
---
target/m68k/cpu.h| 28 +
target/m68k/fpu_helper.c | 107 ++-
target/m68k/helper.h | 1 +
target/m68k/translate.c | 27
4 files changed, 162 insertions(+), 1 deletion(-)
diff --
Signed-off-by: Laurent Vivier
---
target/m68k/cpu.h| 1 +
target/m68k/fpu_helper.c | 56
target/m68k/helper.h | 4
target/m68k/translate.c | 14
4 files changed, 75 insertions(+)
diff --git a/target/m68k/cpu.h b/ta
use DisasCompare with FPU conditions in fscc and fbcc.
Signed-off-by: Laurent Vivier
---
target/m68k/translate.c | 228
1 file changed, 153 insertions(+), 75 deletions(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index ac60f1
Signed-off-by: Laurent Vivier
---
target/m68k/fpu_helper.c | 21 +
target/m68k/helper.h | 1 +
target/m68k/translate.c | 15 +++
3 files changed, 37 insertions(+)
diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c
index 95d5cc4..9b9d9aa 100644
Add fssqrt, fdsqrt, fsabs, fdabs, fsneg, fdneg, fsadd, fdadd,
fssub, fdsub, fsmul, fdmul, fsdiv, fddiv, fsmove and fdmove.
The precision is managed using set_floatx80_rounding_precision(),
except for fsmove, fdmove, fsneg, fdneg, fsabs and fdabs:
the value is converted manually to the given precis
fmovecr moves a floating point constant from the
FPU ROM to a floating point register.
Signed-off-by: Laurent Vivier
---
target/m68k/fpu_helper.c | 31 +++
target/m68k/helper.h | 1 +
target/m68k/translate.c | 12 +++-
3 files changed, 43 insertions(+),
Signed-off-by: Laurent Vivier
---
target/m68k/translate.c | 43 ---
1 file changed, 24 insertions(+), 19 deletions(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 9f60fbc..d9ba735 100644
--- a/target/m68k/translate.c
+++ b/target/m6
fsglmul and fsgldiv truncate data to single precision before computing
results.
Signed-off-by: Laurent Vivier
---
target/m68k/fpu_helper.c | 22 ++
target/m68k/helper.h | 2 ++
target/m68k/translate.c | 8
3 files changed, 32 insertions(+)
diff --git a/target
Signed-off-by: Laurent Vivier
---
target/m68k/cpu.c| 2 +-
target/m68k/cpu.h| 36 +-
target/m68k/fpu_helper.c | 116 +++---
target/m68k/helper.c | 20 ++-
target/m68k/helper.h | 3 +-
target/m68k/qregs.def| 1 +
target/m68k/translate.c | 311 ++
Signed-off-by: Laurent Vivier
---
target/m68k/fpu_helper.c | 6 +++
target/m68k/helper.h | 1 +
target/m68k/translate.c | 99 +++-
3 files changed, 80 insertions(+), 26 deletions(-)
diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.
Signed-off-by: Laurent Vivier
---
target/m68k/Makefile.objs | 2 +-
target/m68k/fpu_helper.c | 112 ++
target/m68k/helper.c | 88
3 files changed, 113 insertions(+), 89 deletions(-)
create mode 100644 targe
Signed-off-by: Laurent Vivier
---
configure| 2 +-
gdb-xml/m68k-fp.xml | 21 +
target/m68k/helper.c | 45 +
3 files changed, 67 insertions(+), 1 deletion(-)
create mode 100644 gdb-xml/m68k-fp.xml
diff --git a/configur
CC: Peter Maydell
Signed-off-by: Laurent Vivier
---
fpu/softfloat-specialize.h | 34 +++---
1 file changed, 31 insertions(+), 3 deletions(-)
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index 100c8a9..fb70d32 100644
--- a/fpu/softfloat-special
This series modifies the original ColdFire FPU implementation
to use floatx80 instead of float64 internally as this
is the native datatype for 680x0. I didn't keep the float64
type for ColdFire, but if someone thinks it's required I
can update this series in this way.
The series also adds the FPU
According to the comment, this definition of invalid encoding is given
by intel developer's manual, and doesn't work with the behavior
of 680x0 FPU.
CC: Andreas Schwab
Signed-off-by: Laurent Vivier
---
fpu/softfloat.c | 31 +++
include/fpu/softfloat.h | 15 --
On 02/06/17 17:44, Phil Dennis-Jordan wrote:
> On 31 January 2017 at 20:08, Laszlo Ersek wrote:
>> On 01/31/17 19:17, Michael S. Tsirkin wrote:
>>> On Tue, Jan 31, 2017 at 05:28:57PM +0100, Laszlo Ersek wrote:
The ACPI 6.1 spec says,
- DSDT: [...] If the X_DSDT field contains a non-
The register_read() function expects a bitmask argument.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/register.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/core/register.c b/hw/core/register.c
index 12f4c1e62d..482e3f827a 100644
--- a/hw/core/register.c
+++
Hi,
This serie fix a bug in register_read_memory(). To avoid duplicated code, a new
inlined function register_enabled_mask() is introduced in the first patch.
Philippe Mathieu-Daudé (2):
register: inline register_enabled_mask
register: fix incorrect read mask
hw/core/register.c | 21 +++
This patch prepares for the fix of register_read() incorrect mask.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/register.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/hw/core/register.c b/hw/core/register.c
index 4bfbc508de..12f4c1e62d 100644
--- a/h
On 02/03/2017 09:47 AM, Vladimir Sementsov-Ogievskiy wrote:
> Return 0 on success to simplify success checking.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> nbd/client.c | 35 +++
> 1 file changed, 19 insertions(+), 16 deletions(-)
I'm not sure that th
On 02/03/2017 09:47 AM, Vladimir Sementsov-Ogievskiy wrote:
> Comparison symbol is misused. It may lead to memory corruption.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> nbd/client.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Adding qemu-stable; this needs to be back-po
On Mon, 6 Feb 2017 13:36:43 -0600
Eric Blake wrote:
> On 02/03/2017 05:57 AM, Pradeep Jagadeesh wrote:
> > This patchset adds the throttle support for the 9p-local driver.
> > For now this functionality can be enabled only through qemu cli options.
> > QMP interface and support to other drivers n
On 02/01/2017 04:41 PM, Ladi Prosek wrote:
> On Wed, Feb 1, 2017 at 12:03 PM, Daniel P. Berrange
> wrote:
>> On Wed, Feb 01, 2017 at 11:50:43AM +0100, Ladi Prosek wrote:
>>> On Wed, Feb 1, 2017 at 11:20 AM, Daniel P. Berrange
>>> wrote:
On Wed, Feb 01, 2017 at 11:06:46AM +0100, Ladi Prosek
** No longer affects: qemu
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/785668
Title:
bonding inside a bridge does not update ARP correctly when bridged net
accessed from within a VM
Status in
The patch mentioned in comment #3 had been included in the kernel here:
http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=7734f6e6bcd7ba78b00e93e74a4ddafd9886cdea
So I guess we can close this bug nowadays? Or can you still reproduce this
issue with the current kernel and cu
On 02/03/2017 09:47 AM, Vladimir Sementsov-Ogievskiy wrote:
> Minimal implementation of structured read: one data chunk + finishing
> none chunk. No segmentation.
> Minimal structured error implementation: no text message.
> Support DF flag, but just ignore it, as there is no segmentation any
> way
On Mon, 6 Feb 2017 14:07:24 -0700
Rebecca Cran wrote:
> Building commit 7d2c6c95511e42dffe2b263275e09957723d0ff4 is causing
> pollution of the parent directory: e.g. ~/workspace/qemu/.. contains the
> following extra directories:
>
> audio backends block chardev crypto disas fsdev hw io linux-
On 6 February 2017 at 19:51, Eric Blake wrote:
> In fact, I seriously doubt ANYONE knows the entire code base. Rather,
> various people are experts in a subset of the code base; the MAINTAINERS
> file is a good mapping of where to direct questions about a particular
> file.
...which means "mail
Building commit 7d2c6c95511e42dffe2b263275e09957723d0ff4 is causing
pollution of the parent directory: e.g. ~/workspace/qemu/.. contains the
following extra directories:
audio backends block chardev crypto disas fsdev hw io linux-user
migration ndb net qapi qom replay slirp target ui util
I'
On 06/02/2017 20:04, Eric Blake wrote:
> This is not the right way to do things (it risks clearing any other FD_
> flags currently set on the fd, even though there aren't any such FD_
> flags in common use).
There aren't any such flags at all really, and because no one uses
F_GETFD, it's unlikel
This info is more about pvpanic patch, but may be relevant here also.
Consider that KeInitializeCrashDumpHeader is not enough to create dumps because
it copy only primary header
and doesn't copy KdDebuggerBlock. Look to combine info from
KeCapturePersistentThreadState.
Also whenever amount of
On 06/02/2017 19:12, Markus Armbruster wrote:
>> QOM now supports class properties. We can convert the wide majority of
>> them, including qdev's "static" properties, to class properties.
>
> Won't help object-add as long as dynamic properties remain.
Well, only as long as dynamic properties r
On 06/02/2017 20:38, Matwey V. Kornilov wrote:
>> OK, so that suggests the problem is that with PMU disabled in VMWare
>> config, it's not giving the right info to the guest to know it's
>> disabled.
> How should it provide info? Can we check it?
ver should have been 0 when PMU is disabled.
Can
On 6 February 2017 at 21:13, Rebecca Cran wrote:
> Building commit 7d2c6c95511e42dffe2b263275e09957723d0ff4 is causing
> pollution of the parent directory: e.g. ~/workspace/qemu/.. contains the
> following extra directories:
>
> audio backends block chardev crypto disas fsdev hw io linux-user migr
Building commit 7d2c6c95511e42dffe2b263275e09957723d0ff4 is causing
pollution of the parent directory: e.g. ~/workspace/qemu/.. contains the
following extra directories:
audio backends block chardev crypto disas fsdev hw io linux-user
migration ndb net qapi qom replay slirp target ui util
I'
On 02/03/2017 09:47 AM, Vladimir Sementsov-Ogievskiy wrote:
> Rename functions appropriately and also make a separate copy of NBDReply
> - NBDSimpleReply, to replace NBDReply for the server. NBDReply itself
> will be upgraded in future patches to handle both simple and structured
> replies in the c
On 02/05/2017 03:11 AM, b...@skyportsystems.com wrote:
> From: Ben Warren
>
> This patch is based off an earlier version by
> Gal Hammer (gham...@redhat.com)
>
> Requirements section, ASCII diagrams and overall help
> provided by Laszlo Ersek (ler...@redhat.com)
>
> Signed-off-by: Gal Hammer
>
On 02/06/2017 01:06 PM, Pranith Kumar wrote:
>> A version of the tree can be found at:
>>
>> https://github.com/stsquad/qemu/tree/mttcg/base-patches-v10
>>
>
> I've sent my Reviewed-by/tested-by for v9 but those seem to be lost.
> I've tested v10 too.
>
> So please add my tested and reviewed t
On 02/03/2017 09:47 AM, Vladimir Sementsov-Ogievskiy wrote:
> To be consistent when NBD_STRUCTURED_REPLY_MAGIC will be introduced.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> nbd/client.c | 4 ++--
> nbd/nbd-internal.h | 2 +-
> nbd/s
On 02/03/2017 09:24 AM, Stefan Hajnoczi wrote:
> On Fri, Feb 03, 2017 at 02:28:49AM +0530, Shubham Kumar wrote:
>> I'm having difficulty in understanding the codebase of QEMU .There seem to
>> have hundreds of code files and header files in the directory and I'm unable
>> to figure out the functi
2017-02-06 21:05 GMT+03:00 Dr. David Alan Gilbert :
>>> So you didn't mention this was running inside VMWare; it looks to me as if
>>> that's rejecting the PMU MSR accesses.
>>> For reference which version of VMWare are you using?
>
>>ESXi 6.0.0 Build 2494585
>
>>I also find that enabling perf cou
> On Feb 6, 2017, at 11:04 AM, Michael S. Tsirkin wrote:
>
> On Mon, Feb 06, 2017 at 10:48:05AM -0800, Ben Warren wrote:
>>
>>> On Feb 6, 2017, at 10:17 AM, Michael S. Tsirkin wrote:
>>>
>>> On Mon, Feb 06, 2017 at 09:59:55AM -0800, Ben Warren wrote:
+void vmgenid_add_fw_cfg
On 02/03/2017 05:57 AM, Pradeep Jagadeesh wrote:
> This patchset adds the throttle support for the 9p-local driver.
> For now this functionality can be enabled only through qemu cli options.
> QMP interface and support to other drivers need further extensions.
This part is a bit scary - if 2.9 is
1 - 100 of 284 matches
Mail list logo
