On 3 September 2015 at 06:27, Sergey Smolov wrote:
> I mean that in this example QEMU does not write to log "intermediate" SUBS
> instructions which appear in loop-unrolling process.
> For me it woulb be ok if QEMU generate the following in_asm log:
>
> [log]
> IN:
> 0x: 9401
On Thu, Sep 03, 2015 at 03:05:21PM +1000, David Gibson wrote:
[snip]
> Hm.. so why can't the hypervisor code do the retrying?
Aravinda replied to this earlier in the thread:
"Retrying cannot be done internally in h_report_mc_err hcall: only one
thread can succeed entering qemu upon parallel hca
Peter Maydell писал 2015-09-02 19:39:
On 2 September 2015 at 14:50, Sergey Smolov wrote:
02.09.2015 16:55, Sergey Smolov пишет:
It seems that QEMU skips some internal instructions when generates
"in_asm" log. How to eliminate this?
It might help if you said what you thought was missing.
--
Currently, __target_cmsg_nxthdr compares a pointer derived from
target_cmsg against the msg_control field of target_msgh (through
subtraction). This failed for me when emulating i386 code under x86_64,
because pointers in the host address space and pointers in the guest
address space were not the
On Thu, 2015-09-03 at 08:33 +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2015-09-02 at 10:12 -0600, Alex Williamson wrote:
>
> > There are very specific rules for translating requester IDs across
> > bridges. Bus numbers can change during enumeration, devfn cannot.
Thanks for clarifying that p
On Thu, Sep 03, 2015 at 01:24:21PM +1000, Sam Bobroff wrote:
> On Thu, Sep 03, 2015 at 09:53:20AM +1000, David Gibson wrote:
> > On Wed, Sep 02, 2015 at 04:34:01PM +1000, Sam Bobroff wrote:
> > > On Tue, Sep 01, 2015 at 04:37:51PM +0530, Aravinda Prasad wrote:
> > > >
> > > >
> > > > On Monday 10
BTW, can you please take a look at the following URL to see my
understanding is correct? Our engineers are saying that they are not
really sure if they understood your proposal (especially around
IOMMU), and I drew a figure, adding notes...
https://wiki.opnfv.org/vm2vm_mst
Thanks,
--
Jun
Intel O
sPAPRTCETable is handling 2 TCE tables already:
1) guest view of the TCE table - emulated devices use only this table;
2) hardware IOMMU table - VFIO PCI devices use it for actual work but
it does not replace 1) and it is not visible to the guest.
The initialization of this table is driven by vfi
From: Bharata B Rao
Till now memory hotplug used RTAS_LOG_V6_HP_ID_DRC_INDEX hotplug type
which meant that we generated one hotplug type of EPOW event for every
256MB (SPAPR_MEMORY_BLOCK_SIZE). This quickly overruns the kernel
rtas log buffer thus resulting in loss of memory hotplug events. Switc
From: Bharata B Rao
Currently when user specifies more slots than allowed max of
SPAPR_MAX_RAM_SLOTS (32), we error out like this:
qemu-system-ppc64: unsupported amount of memory slots: 64
Let the user know about the max allowed slots like this:
qemu-system-ppc64: Specified number of memory sl
So far there were 2 limitations enforced on an emulated PHB
regarding VFIO:
1) only one IOMMU group per IOMMU container was allowed and
the spapr-pci-vfio-host-bridge device has an IOMMU ID property for this;
2) only one IOMMU container per PHB was allowed as a group
can only be attached to one con
This allows sharing the same PHB for both emulated and VFIO devices.
This used to be a part of the Dynamic DMA window patchset. Since it was
moved out and reworked quite a lot, all reviewed-by's got outdated.
This is based on dgibson/spapr-next sha1 f91ffef.
Please comment. Thanks.
Changes:
v2:
From: Sam Bobroff
Improve the SPLPAR Characteristics information:
Add MaxPlatProcs: set to max_cpus, the maximum CPUs that could be
addded to the system.
Add DesMem: set to the initial memory of the system.
Add DesProcs: set to smp_cpus, the inital number of CPUs in the
syste
From: Bharata B Rao
Parse ibm,architecture.vec table obtained from the guest and enable
memory node configuration via ibm,dynamic-reconfiguration-memory if guest
supports it. This is in preparation to support memory hotplug for
sPAPR guests.
This changes the way memory node configuration is done
From: Bharata B Rao
Make use of pc-dimm infrastructure to support memory hotplug
for PowerPC.
Signed-off-by: Bharata B Rao
Reviewed-by: David Gibson
Signed-off-by: David Gibson
---
hw/ppc/spapr.c| 118 ++
hw/ppc/spapr_events.c | 8 ++-
From: Bharata B Rao
Don't represent non-hotluggable memory under drconf node. With this
we don't have to create DRC objects for them.
The effect of this patch is that we revert back to memory@ representation
for all the memory specified with -m option and represent the cold
plugged memory an
From: Gavin Shan
This introduces rtas_ldq() to load 64-bits parameter from continuous
two 4-bytes memory chunk of RTAS parameter buffer, to simplify the
code.
Signed-off-by: Gavin Shan
Reviewed-by: Thomas Huth
Reviewed-by: David Gibson
Signed-off-by: David Gibson
---
hw/ppc/spapr_pci.c
From: Alexey Kardashevskiy
sPAPR uses hard coded limit of maximum 255 supported CPUs which is
exactly the same as QEMU-wide limit which is MAX_CPUMASK_BITS and also
defined as 255.
This makes use of a global CPU number limit for the "pseries" machine.
In order to anticipate future increase of t
From: Sam Bobroff
QEMU has a notion of the guest name, so if it's present we might as
well put that into the device tree as /ibm,partition-name.
This is specificed by PAPR.
Signed-off-by: Sam Bobroff
Reviewed-by: David Gibson
Signed-off-by: David Gibson
---
hw/ppc/spapr.c | 5 +
1 file
From: Bharata B Rao
Support hotplug identifier type RTAS_LOG_V6_HP_ID_DRC_COUNT that allows
hotplugging of DRCs by specifying the DRC count.
While we are here, rename
spapr_hotplug_req_add_event() to spapr_hotplug_req_add_by_index()
spapr_hotplug_req_remove_event() to spapr_hotplug_req_remove_b
From: Bharata B Rao
If drmgr is used in the guest to hotplug a device before a device_add
has been issued via the QEMU monitor, QEMU segfaults in configure_connector
call. This occurs due to accessing of NULL FDT which otherwise would have
been created and associated with the DRC during device_ad
From: Sam Bobroff
QEMU is MSI-X capable and makes it available via ibm,change-msi, so
we should indicate this by adding /rtas/ibm,change-msix-capable to the
device tree.
This is specificed by PAPR.
Signed-off-by: Sam Bobroff
Reviewed-by: David Gibson
Signed-off-by: David Gibson
---
hw/ppc/s
From: Bharata B Rao
Currently PowerPC kernel doesn't allow hot-adding memory to memory-less
node, but instead will silently add the memory to the first node that has
some memory. This causes two unexpected behaviours for the user.
- Memory gets hotplugged to a different node than what the user s
From: Laurent Vivier
When a device is hotplugged, attach() sets "configured" to
false, waiting an action from the OS to configure it and then
to call ibm,configure-connector. On ibm,configure-connector,
the hypervisor sets "configured" to true.
In case of coldplugged device, attach() sets "confi
From: Thomas Huth
To see the output of the hcall_dprintf statements, you currently have
to enable the DEBUG_SPAPR_HCALLS macro in include/hw/ppc/spapr.h.
This is ugly because a) not every user who wants to debug guest
problems can or wants to recompile QEMU to be able to see such issues,
and b) s
The DRC_INDEX_ID_MASK macro does a left shift on ~0, which is a signed
quantity, and therefore undefined behaviour according to the C spec. In
particular this causes warnings from the clang sanitizer.
This fixes it by calculating the same mask without using ~0 (I think the
new method is a more co
From: Andrew Jones
dumpdtb (-machine dumpdtb=) allows one to inspect the generated
device tree of machine types that generate device trees. This is
useful for a) seeing what's there b) debugging/testing device tree
generator patches. It can be used as follows
$QEMU_CMDLINE -machine dumpdtb=dtb
d
Now that the qemu-2.5 tree has opened, I'm sending through my backlog
of patches for the "pseries" machine type. The big thing here is
memory hotplug, but there are also some other bugfixes and cleanups.
Alexey Kardashevskiy (2):
spapr: Use QEMU limit for maximum CPUs number
pseries: Update S
Add pseries-2.5 machine version.
Signed-off-by: Bharata B Rao
[Altered to merge before memory hotplug -- dwg]
Signed-off-by: David Gibson
---
hw/ppc/spapr.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index d6f1c84..c03
From: Bharata B Rao
Initialize a hotplug memory region under which all the hotplugged
memory is accommodated. Also enable memory hotplug by setting
CONFIG_MEM_HOTPLUG.
Modelled on i386 memory hotplug.
Signed-off-by: Bharata B Rao
Reviewed-by: David Gibson
Signed-off-by: David Gibson
---
def
From: Bharata B Rao
When NUMA isn't configured explicitly, assume node 0 is present for
the purpose of creating ibm,associativity-lookup-arrays property
under ibm,dynamic-reconfiguration-memory DT node. This ensures that
the associativity index property is correctly updated in ibm,dynamic-memory
From: Bharata B Rao
Include an error message when migration fails due to mismatch in
htab_shift values at source and target. This should provide a bit more
verbose message in addition to the current migration failure message
that reads like:
qemu-system-ppc64: error while loading state for insta
Enable memory hotplug for pseries 2.4 and add LMB DR connectors.
With memory hotplug, enforce RAM size, NUMA node memory size and maxmem
to be a multiple of SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the
granularity in which LMBs are represented and hot-added.
LMB DR connectors will be used by th
From: Sam Bobroff
Currently, rtas_ibm_change_msi() always returns four values even if
less are specified.
Correct this by only returning the fourth parameter if it was
requested.
This is specified by PAPR.
Signed-off-by: Sam Bobroff
Reviewed-by: David Gibson
Signed-off-by: David Gibson
---
From: Bharata B Rao
The hash table size is dependent on ram_size, but since with hotplug
the memory can grow till maxram_size. Hence make hash table size dependent
on maxram_size.
This allows to hotplug huge amounts of memory to the guest.
Signed-off-by: Bharata B Rao
Reviewed-by: David Gibson
On Thu, Sep 03, 2015 at 09:53:20AM +1000, David Gibson wrote:
> On Wed, Sep 02, 2015 at 04:34:01PM +1000, Sam Bobroff wrote:
> > On Tue, Sep 01, 2015 at 04:37:51PM +0530, Aravinda Prasad wrote:
> > >
> > >
> > > On Monday 10 August 2015 09:35 AM, Sam Bobroff wrote:
> > > > On Sun, Aug 09, 2015 at
On Thu, Sep 03, 2015 at 01:19:01PM +1000, Alexey Kardashevskiy wrote:
> On 09/03/2015 12:05 PM, David Gibson wrote:
> >On Wed, Sep 02, 2015 at 06:16:02PM +1000, Alexey Kardashevskiy wrote:
> >>sPAPRTCETable is handling 2 TCE tables already:
> >>
> >>1) guest view of the TCE table - emulated devices
On 09/03/2015 12:05 PM, David Gibson wrote:
On Wed, Sep 02, 2015 at 06:16:02PM +1000, Alexey Kardashevskiy wrote:
sPAPRTCETable is handling 2 TCE tables already:
1) guest view of the TCE table - emulated devices use only this table;
2) hardware IOMMU table - VFIO PCI devices use it for actual
On 09/03/2015 12:07 PM, David Gibson wrote:
On Wed, Sep 02, 2015 at 07:44:07PM +1000, Alexey Kardashevskiy wrote:
On 09/02/2015 06:16 PM, Alexey Kardashevskiy wrote:
sPAPRTCETable is handling 2 TCE tables already:
1) guest view of the TCE table - emulated devices use only this table;
2) hardw
On 09/03/2015 09:18 AM, David Gibson wrote:
On Wed, Sep 02, 2015 at 07:29:58PM +1000, Alexey Kardashevskiy wrote:
For setting debug watchpoints, sPAPR guests use H_SET_MODE hypercall.
The existing QEMU H_SET_MODE handler does not support this but
the KVM handler in HV KVM does. However it is not
On Wed, Sep 02, 2015 at 08:58:54AM +0530, Bharata B Rao wrote:
> On Mon, Aug 24, 2015 at 09:01:51AM +0530, Bharata B Rao wrote:
> > The hash table size allocated to guest depends on the maxmem size.
> > If the host isn't able to allocate the required hash table size but
> > instead allocates less t
On Wed, 2 Sep 2015 17:23:49 +0200
Pierre Morel wrote:
> Being working on dataplane I notice something strange:
>
> virtio_queue_get_avail_size() used a 64bit size index
> for the calculation of the available ring size.
>
> It is quite strange but it did work with the old calculation
> of the a
On Wed, Sep 02, 2015 at 06:16:02PM +1000, Alexey Kardashevskiy wrote:
> sPAPRTCETable is handling 2 TCE tables already:
>
> 1) guest view of the TCE table - emulated devices use only this table;
>
> 2) hardware IOMMU table - VFIO PCI devices use it for actual work but
> it does not replace 1) and
On Thu, Sep 03, 2015 at 11:21:24AM +1000, Michael Ellerman wrote:
> On Wed, 2015-09-02 at 17:48 +1000, David Gibson wrote:
> > On Wed, Sep 02, 2015 at 11:04:12AM +0530, Amit Shah wrote:
> > > On (Mon) 31 Aug 2015 [20:46:02], Thomas Huth wrote:
> > > > The PAPR interface provides a hypercall to pass
On Wed, Sep 02, 2015 at 07:44:07PM +1000, Alexey Kardashevskiy wrote:
> On 09/02/2015 06:16 PM, Alexey Kardashevskiy wrote:
> >sPAPRTCETable is handling 2 TCE tables already:
> >
> >1) guest view of the TCE table - emulated devices use only this table;
> >
> >2) hardware IOMMU table - VFIO PCI devi
Signed-off-by: Richard Henderson
---
target-tilegx/Makefile.objs | 2 +-
target-tilegx/helper.h | 4 +++
target-tilegx/simd_helper.c | 63 +
target-tilegx/translate.c | 17 +++-
4 files changed, 84 insertions(+), 2 deletions(-)
create
Signed-off-by: Richard Henderson
---
linux-user/main.c | 84 +++
target-tilegx/cpu.h | 4 ++-
target-tilegx/translate.c | 80 +++-
3 files changed, 94 insertions(+), 74 deletions(-)
diff --git a/li
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 8
1 file changed, 8 insertions(+)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 702289e..b70bc8d 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 76 +--
1 file changed, 73 insertions(+), 3 deletions(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 609592a..9418799 100644
--- a/target-tilegx/translate.c
+
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 1b2ec37..78b87bf 100644
--- a/target-tilegx/translate.c
+++ b/targ
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 74 +++
1 file changed, 74 insertions(+)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index cb21c14..9604320 100644
--- a/target-tilegx/t
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 112 ++
1 file changed, 112 insertions(+)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 1093e72..1b2ec37 100644
--- a/target-tilegx/
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index b70bc8d..4ad135d 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/tr
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 58 +--
1 file changed, 41 insertions(+), 17 deletions(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index bbea252..81033bb 100644
---
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 51 +++
1 file changed, 51 insertions(+)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 78b87bf..609592a 100644
--- a/target-tilegx/t
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 96 ++-
1 file changed, 87 insertions(+), 9 deletions(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 7d528a7..bbea252 100644
--- a
Most of which are either nops or exceptions.
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 77 +--
1 file changed, 54 insertions(+), 23 deletions(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 0fbd11b..c
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 1145 +
1 file changed, 1145 insertions(+)
create mode 100644 target-tilegx/translate.c
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
new
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 56 +--
1 file changed, 54 insertions(+), 2 deletions(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 9604320..c7208df 100644
--- a/target-tilegx/translate.c
+
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 51 +++
1 file changed, 38 insertions(+), 13 deletions(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 81033bb..5d7aefa 100644
---
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index c7208df..1093e72 100644
--- a/target-tilegx/translate.c
+++ b/target-t
From: Chen Gang
The related instructions are exception, cntlz, cnttz, shufflebytes.
Reviewed-by: Peter Maydell
Signed-off-by: Chen Gang
Message-Id:
[rth: Remove incorrect implementation of add_saturate.]
Signed-off-by: Richard Henderson
---
target-tilegx/helper.c | 70 ++
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 96 ---
1 file changed, 90 insertions(+), 6 deletions(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 066d351..c3f395f 100644
--- a
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 39 +--
1 file changed, 33 insertions(+), 6 deletions(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 5d7aefa..0fbd11b 100644
--- a/target-
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 130 --
1 file changed, 115 insertions(+), 15 deletions(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index d68ec13..7d528a7 100644
---
The crc instructions are omitted from this set.
Signed-off-by: Richard Henderson
---
target-tilegx/helper.c| 23
target-tilegx/helper.h| 2 ++
target-tilegx/translate.c | 68 ++-
3 files changed, 92 insertions(+), 1 deletion(-
From: Chen Gang
Add related configuration and make files for tilegx.
The target can now build, though not run anything.
Signed-off-by: Chen Gang
Reviewed-by: Peter Maydell
Message-Id:
Signed-off-by: Richard Henderson
---
configure | 2 ++
default-configs/tilegx-l
Signed-off-by: Richard Henderson
---
target-tilegx/translate.c | 99 +--
1 file changed, 96 insertions(+), 3 deletions(-)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index a2d597d..066d351 100644
--- a/target-tilegx/translate.c
+
From: Chen Gang
It implements minimized cpu features for linux-user.
Signed-off-by: Chen Gang
Reviewed-by: Peter Maydell
Message-Id:
Signed-off-by: Richard Henderson
---
target-tilegx/cpu.c | 170 ++
target-tilegx/cpu.h | 175 +
From: Chen Gang
It is copied from Linux kernel "arch/tile/include/uapi/arch/
opcode_tilegx.h".
Signed-off-by: Chen Gang
Reviewed-by: Peter Maydell
Message-Id:
Signed-off-by: Richard Henderson
---
target-tilegx/opcode_tilegx.h | 1406 +
1 file changed,
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
linux-user/main.c | 3 +++
target-tilegx/cpu.c | 5 -
target-tilegx/cpu.h | 2 ++
3 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index 11e1081..4fe18c0 100644
--- a/linux-us
On Thu, Aug 13, 2015 at 07:24:16PM +1000, Alexey Kardashevskiy wrote:
> The changes are:
> 1. GPT support;
> 2. Much faster VGA support.
>
> The full changelog is:
> > Add missing half word access case to _FASTRMOVE and _FASTMOVE
> > Remove unused RMOVE64 stub
> > fbuffer: Implement RFILL as
From: Chen Gang
They are based on Linux kernel tilegx architecture for 64 bit binary,
and also based on tilegx ABI reference document, and also reference from
other targets implementations.
Signed-off-by: Chen Gang
Reviewed-by: Peter Maydell
Message-Id:
Signed-off-by: Richard Henderson
---
From: Chen Gang
The related copy is from Linux kernel "arch/tile/include/uapi/arch/
spr_def_64.h".
Signed-off-by: Chen Gang
Reviewed-by: Peter Maydell
Message-Id:
Signed-off-by: Richard Henderson
---
target-tilegx/spr_def_64.h | 216 +
1 file chan
An obvious typo in the mnemonic here.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/opcode_tilegx.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-tilegx/opcode_tilegx.h b/target-tilegx/opcode_tilegx.h
index 3b8bf4f..989436d 100644
---
From: Chen Gang
Use 'inline' instead of '__inline', and also use 'uint64_t' instead of
"unsigned long long"
Signed-off-by: Chen Gang
Reviewed-by: Peter Maydell
Message-Id:
Signed-off-by: Richard Henderson
---
target-tilegx/opcode_tilegx.h | 220 +-
1
Both ADDX_SPECIAL_0_OPCODE_Y1 and ADD_SPECIAL_0_OPCODE_Y1
do not appear to be "special" in any way, except that they
don't follow the normal naming convention using _RRR_.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target-tilegx/opcode_tilegx.h | 4 ++--
1 file changed, 2 i
Incorporating review from v14. Lots of little changes, plus
a reorg of how exceptions implementing the atomic insns for
userland are generated.
r~
Chen Gang (9):
linux-user: tilegx: Firstly add architecture related features
linux-user: Support tilegx architecture in linux-user
linux-user
From: Chen Gang
Some of architectures (e.g. tilegx), several syscall macros are not
supported, so switch them.
Signed-off-by: Chen Gang
Reviewed-by: Peter Maydell
Message-Id:
Signed-off-by: Richard Henderson
---
linux-user/syscall.c | 50 +-
1
From: Chen Gang
Add main working flow feature, system call processing feature, and elf64
tilegx binary loading feature, based on Linux kernel tilegx 64-bit
implementation.
Signed-off-by: Chen Gang
Reviewed-by: Peter Maydell
Message-Id:
Signed-off-by: Richard Henderson
---
include/elf.h
On Wed, 2015-09-02 at 17:48 +1000, David Gibson wrote:
> On Wed, Sep 02, 2015 at 11:04:12AM +0530, Amit Shah wrote:
> > On (Mon) 31 Aug 2015 [20:46:02], Thomas Huth wrote:
> > > The PAPR interface provides a hypercall to pass high-quality
> > > hardware generated random numbers to guests. So let's
Signed-off-by: Richard Henderson
---
target-openrisc/translate.c | 106
1 file changed, 106 insertions(+)
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 6b96c53..cd684c7 100644
--- a/target-openrisc/translate.c
+++ b/targ
Note that the specification for lf.madd.s is confused. It's
the only mention of supposed FPMADDHI/FPMADDLO special registers.
On the other hand, or1ksim implements a somewhat normal non-fused
multiply and add. Mirror that.
Signed-off-by: Richard Henderson
---
target-openrisc/cpu.h| 3
The architecture manual doesn't say these opcodes are user only.
Leaving them disabled excludes user mode from accessing interesting
SPRs like MACLO/MACHI.
Signed-off-by: Richard Henderson
---
target-openrisc/helper.h | 4 +--
target-openrisc/sys_helper.c | 77 +-
The architecture manual is consistent in using "I" for signed
fields and "K" for unsigned fields. Mirror that.
Signed-off-by: Richard Henderson
---
target-openrisc/translate.c | 200 +---
1 file changed, 75 insertions(+), 125 deletions(-)
diff --git a/ta
The architecture manual is unclear about this, but the or1ksim
does writeback before the exception. This requires splitting
the helpers in half, with the exception raised by the second.
Signed-off-by: Richard Henderson
---
target-openrisc/fpu_helper.c | 252 +
Significantly simplifies the implementation of the use of MAC.
Signed-off-by: Richard Henderson
---
target-openrisc/cpu.h| 3 +-
target-openrisc/sys_helper.c | 13 +
target-openrisc/translate.c | 120 +++
3 files changed, 78 insertions(+),
Not documented as disabled for user mode.
Signed-off-by: Richard Henderson
---
target-openrisc/translate.c | 32
1 file changed, 32 deletions(-)
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 09c7af6..6b96c53 100644
--- a/target-ope
This significantly streamlines carry and overflow production.
Signed-off-by: Richard Henderson
---
target-openrisc/cpu.h | 13 +++-
target-openrisc/exception_helper.c | 33 ---
target-openrisc/helper.h | 5 +-
target-openrisc/int_helper.c | 36 --
True, this is unused so far, but commented out is worse than
actually implemented properly.
Signed-off-by: Richard Henderson
---
target-openrisc/int_helper.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/target-openrisc/int_helper.c b/target-openri
Signed-off-by: Richard Henderson
---
linux-user/main.c | 45
target-openrisc/cpu.c | 1 +
target-openrisc/cpu.h | 9 +
target-openrisc/interrupt.c| 1 +
target-openrisc/interrupt_helper.c | 1 +
target-openrisc/mm
Removes a call at execution time for overflow exceptions.
Signed-off-by: Richard Henderson
---
target-openrisc/cpu.h | 4 ++--
target-openrisc/exception_helper.c | 2 +-
target-openrisc/translate.c| 24 +++-
3 files changed, 18 insertions(+), 12 deletio
Avoids warnings from unused variables etc.
Signed-off-by: Richard Henderson
---
target-openrisc/translate.c | 20
1 file changed, 4 insertions(+), 16 deletions(-)
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index aca1242..9d04753 100644
--- a/targ
This avoids having to keep merging and extracting the flag from SR.
Signed-off-by: Richard Henderson
---
target-openrisc/cpu.h | 15 +-
target-openrisc/gdbstub.c | 4 +-
target-openrisc/interrupt.c| 2 +-
target-openrisc/interrupt_helper.c | 2 +-
target-open
Signed-off-by: Richard Henderson
---
target-openrisc/helper.h | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/target-openrisc/helper.h b/target-openrisc/helper.h
index 136ec39..4b0a935 100644
--- a/target-openrisc/helper.h
+++ b/target-openrisc/h
Simplify overflow calculation. Move overflow exception check
to a helper function, to eliminate inline branches.
Signed-off-by: Richard Henderson
---
target-openrisc/exception_helper.c | 12 ++
target-openrisc/helper.h | 1 +
target-openrisc/translate.c| 426 +++
This is a refresh of a branch I worked on in February, but I don't
believe was ever posted. I'm doing so now in order to flush my set
of uncommitted branches.
The openrisc target is in terrible shape and, as far as I can tell
from the opencores mailing list, no one uses it. The fact that it's
mi
Decoding the opcodes in the right order reduces by 100+ lines.
Also, it happens to put the opcodes in the same order as Chapter 17.
Signed-off-by: Richard Henderson
---
target-openrisc/translate.c | 300 ++--
1 file changed, 94 insertions(+), 206 deletions
Signed-off-by: Richard Henderson
---
target-openrisc/translate.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 6520896..1aa6bbf 100644
--- a/target-openrisc/translate.c
+++ b/targe
This patch introduces a system very similar to the one used in the kernel
to attach specific functions to a given file descriptor.
In this case, we attach a specific "host_to_target()" translator to the fd
returned by signalfd() to be able to byte-swap the signalfd_siginfo
structure provided by re
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