From: Linhaifeng
Every messages need reply.
This path just update the vhost-user.txt to version 0x6.
Signed-off-by: Linhaifeng
---
docs/specs/vhost-user.txt | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/docs/specs/vhost-user.txt b/docs/specs/vhost-u
From: Linhaifeng
If slave's version bigger than 0x5 we will wait for reply.
Signed-off-by: Linhaifeng
---
hw/virtio/vhost-user.c | 42 +-
1 file changed, 41 insertions(+), 1 deletion(-)
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index
From: Linhaifeng
Mostly the same as ioctl master need the return value to
decided going on or not.So we add these patches for more
safe communication.
change log:
v1->v2: modify the annotate about slave's version.
v2->v3: update the description of version in vhost-user.txt.
Linhaifeng (3):
vh
From: Linhaifeng
We not need the VHOST_USER_REPLY_MASK so the base version now is 0x5.
- update the version to 0x6.
- change the name form flag to version.
Signed-off-by: Linhaifeng
---
hw/virtio/vhost-user.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
On Sat, Feb 14, 2015 at 02:19:43PM +0100, Paolo Bonzini wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA1
>
>
>
> On 13/02/2015 23:54, David Gibson wrote:
> > So AFAICT, CONFIG_PCI_HOTPLUG_OLD is still defined for x86
> > targets:
> >
> > $ git grep PCI_HOTPLUG_OLD
> > default-configs/i
It's not safe to call blk_set_aio_context from outside BQL because of
the bdrv_drain_all there. Let's put it in the hotplug callback which
will be called by qdev device realization for each scsi device attached
to the bus.
Signed-off-by: Fam Zheng
---
hw/scsi/virtio-scsi.c | 15 +++
Even if the caller has both the old and the new AioContext's, there can
be a deadlock, due to the leading bdrv_drain_all.
Suppose there are four io threads (A, B, A0, B0) with A and B owning a
BDS for each (bs_a, bs_b); Now A wants to move bs_a to iothread A0, and
B wants to move bs_b to B0, at th
This is the simplified fix of:
[PATCH 0/3] virtio-scsi: Fix unsafe bdrv_set_aio_context calls
I included the original patch 1 - the function header comment update for
bdrv_set_aio_context and added Paolo's rev-by.
Fam Zheng (2):
block: Forbid bdrv_set_aio_context outside BQL
virtio-scsi-data
On Sun, 02/15 10:40, Fam Zheng wrote:
> Even if the caller has the old #AioContext, there can be a deadlock, due
> to the leading bdrv_drain_all:
>
> Suppose there are three io threads (a, b, c) with each owning a BDS
> (bds_a, bds_b, bds_c), and a and b want to move their own BDS to c at
> the sa
On Thu, Feb 12, 2015 at 11:41 PM, Pankaj Gupta
wrote:
> On Thu, Feb 12, 2015 at 11:50:05AM +0530, Pankaj Gupta wrote:
> > vhostforce was added to enable use of vhost when
> > guest don't have MSI-X support.
> > Now, we have scenarios which dont use interrupts
> > like DPDK and s
Even if the caller has the old #AioContext, there can be a deadlock, due
to the leading bdrv_drain_all:
Suppose there are three io threads (a, b, c) with each owning a BDS
(bds_a, bds_b, bds_c), and a and b want to move their own BDS to c at
the same time:
iothread a i
It's not safe to call blk_set_aio_context from outside BQL because of
the bdrv_drain_all there. Let's put it in the hotplug callback which
will be called by qdev device realization for each scsi device attached
to the bus.
Signed-off-by: Fam Zheng
---
hw/scsi/virtio-scsi.c | 15 +++
This is the simplified fix of:
[PATCH 0/3] virtio-scsi: Fix unsafe bdrv_set_aio_context calls
I included the original patch 1 - the function header comment update for
bdrv_set_aio_context and added Paolo's rev-by.
Fam Zheng (2):
block: Forbid bdrv_set_aio_context outside BQL
virtio-scsi-da
On Fri, 02/13 19:33, John Snow wrote:
> Just a stupid question: We don't have a macro facility in the current
> codebase that generates both an enum and string table / lookup function
> simultaneously, do we?
>
> Some things really do just wind up looking grossly inelegant in C, and this
> is one
On Sat, Feb 14, 2015 at 4:50 AM, Paolo Bonzini
wrote:
On 12/02/2015 04:05, Jason Wang wrote:
We don't validate the existence of handle_output which may let a
buggy
guest to trigger a SIGSEV easily. Fix this by validate its existence
before.
Cc: qemu-sta...@nongnu.org
Cc: Anthony L
On Sat, Feb 14, 2015 at 4:18 AM, Don Koch wrote:
On Thu, 12 Feb 2015 11:05:17 +0800
Jason Wang wrote:
We don't validate the existence of handle_output which may let a
buggy
guest to trigger a SIGSEV easily. Fix this by validate its existence
before.
Cc: qemu-sta...@nongnu.org
Cc: A
Hi, Michael
I'm trying to install guest OS with PXE(vhost-user backend), it was failed.
Is there any plans to support it?
--
Regards,
Haifeng
On 2015/2/15 5:03, Michael S. Tsirkin wrote:
> On Fri, Feb 13, 2015 at 09:45:37PM +0800, linhaifeng wrote:
>> @@ -35,7 +39,7 @@ consists of 3 header fields and a payload:
>>
>> * Request: 32-bit type of the request
>> * Flags: 32-bit bit field:
>> - - Lower 2 bits are the version (current
On Fri, Feb 13, 2015 at 09:45:37PM +0800, linhaifeng wrote:
> @@ -35,7 +39,7 @@ consists of 3 header fields and a payload:
>
> * Request: 32-bit type of the request
> * Flags: 32-bit bit field:
> - - Lower 2 bits are the version (currently 0x01)
> + - Lower 2 bits are the version (current
Hi,
Le 14/02/2015 09:52, Mark Cave-Ayland a écrit :
Currently the m48t59 device uses the hardware model in order to determine
whether the year value is offset from the hardware value. As this will
soon be required by the x59 model, create a qdev base_year property to
represent the base year and
Le 14/02/2015 09:52, Mark Cave-Ayland a écrit :
This is for subsequent use by the sun4u machine.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Hervé Poussineau
---
hw/timer/m48t59.c |4
1 file changed, 4 insertions(+)
diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c
index 3d2
Recently added CP0.BadInstr and CP0.BadInstrP registers ended up in cpu_load()
under different offset than in cpu_save(). These and all registers between were
incorrectly restored.
Signed-off-by: Leon Alrae
---
target-mips/machine.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
di
Simple "hello world" MIPS N32 userland program crashes with segfault due to
incorrectly defined stat structure in QEMU.
Correct "target_stat" definition to match kernel's "stat64" as in MIPS N32
there are only plain "stat" syscalls using 64-bit structure.
Reported-by: Daniel Sanders
Signed-off-b
Signed-off-by: Leon Alrae
Reviewed-by: Maciej W. Rozycki
---
target-mips/op_helper.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index ea7d95f..73a8e45 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_h
From: Hervé Poussineau
Create a custom address space for PCI memory region and use it for the PCI bus.
Dynamically handle PCI0 Mem0 and PCI0 Mem1 regions, as already done for PCI0 IO.
Signed-off-by: Hervé Poussineau
Signed-off-by: Leon Alrae
---
hw/mips/gt64xxx_pci.c | 95
Signed-off-by: Leon Alrae
Reviewed-by: Maciej W. Rozycki
---
target-mips/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index a24863c..b80af98 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
From: Hervé Poussineau
Now that isa_mem_base variable is always 0, we can remove its usage.
Signed-off-by: Hervé Poussineau
Signed-off-by: Leon Alrae
---
hw/display/cirrus_vga.c | 2 +-
hw/display/vga-isa.c| 2 +-
hw/display/vga.c| 3 +--
hw/isa/isa-bus.c| 1 -
include/hw/
From: "Maciej W. Rozycki"
Signed-off-by: Maciej W. Rozycki
Signed-off-by: Leon Alrae
---
target-mips/translate_init.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index 1543f6c..9e8433a 100644
--- a/target-m
From: Hervé Poussineau
Do assorted changes in memory-mapped rtc interface.
Also fix size of ISA I/O memory region, which should be 0x1 bytes.
Signed-off-by: Hervé Poussineau
Signed-off-by: Leon Alrae
---
hw/mips/mips_jazz.c | 25 ++---
1 file changed, 14 insertions(+)
Using rs = -1 in gen_logic_imm() for microMIPS LUI instruction is dangerous
and may bite us when implementing microMIPS R6 because in R6 AUI and LUI
are distinguished by rs value. Therefore use 0 for safety.
Reported-by: Paolo Bonzini
Signed-off-by: Leon Alrae
---
target-mips/translate.c | 2 +-
From: Hervé Poussineau
piix4 is only used on MIPS Malta board, which gives get_system_memory()
to pci_register_bus().
Signed-off-by: Hervé Poussineau
Signed-off-by: Leon Alrae
---
hw/isa/piix4.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.
From: Hervé Poussineau
Also remove address_space and address_space_io parameters, which
where always get_system_memory() and get_system_io().
Signed-off-by: Hervé Poussineau
Signed-off-by: Leon Alrae
---
hw/mips/mips_jazz.c | 21 -
1 file changed, 8 insertions(+), 13 delet
From: Hervé Poussineau
Signed-off-by: Hervé Poussineau
Signed-off-by: Leon Alrae
---
hw/mips/mips_r4k.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
index 5b982f2..3e90e27 100644
--- a/hw/mips/mips_r4k.c
+++ b/
From: Hervé Poussineau
Currently, keep current behaviour by always using get_system_memory().
Also use QOM casts when possible.
Signed-off-by: Hervé Poussineau
Reviewed-by: Paolo Bonzini
Signed-off-by: Leon Alrae
---
hw/alpha/typhoon.c | 2 +-
hw/i386/pc_piix.c| 2 +-
hw/isa/i82378.
The test is supposed to terminate TB if the end of the page is reached.
However, with current implementation it may never succeed for microMIPS or
mips16.
Reported-by: Richard Henderson
Signed-off-by: Leon Alrae
Reviewed-by: Maciej W. Rozycki
Reviewed-by: Richard Henderson
---
target-mips/tra
Hi,
Here is version 2 of target-mips pullreq - rebased and with signed tag.
Thanks,
Leon
Cc: Peter Maydell
Cc: Aurelien Jarno
The following changes since commit cd2d5541271f1934345d8ca42f5fafff1744eee7:
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20150212' into
staging (2015-0
Adds these items to the View menu:
VGA
Monitor
Serial
Parallel
Signed-off-by: John Arbuckle
---
Removed commented out code.
include/ui/console.h |1 +
ui/cocoa.m | 60 -
ui/console.c | 38 +++
On 2/14/15 13:47, Peter Maydell wrote:
> On 14 February 2015 at 03:37, Chris Metcalf wrote:
>> I'm not sure whether Tilera can simply re-release the tilegx-specific stuff
>> from binutils as a separate tarball with GPL v2 licensing. Hopefully we can
>> avoid having to figure that out. :-)
>
> I
On 2/14/15 11:37, Chris Metcalf wrote:
> On 2/13/2015 10:08 PM, Chen Gang S wrote:
>> On 2/14/15 08:26, Peter Maydell wrote:
>>> On 13 February 2015 at 23:50, Chen Gang S wrote:
On 2/13/15 05:15, Chen Gang S wrote:
> It almost likes a template for adding an architecture target.
>
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 13/02/2015 23:54, David Gibson wrote:
> So AFAICT, CONFIG_PCI_HOTPLUG_OLD is still defined for x86
> targets:
>
> $ git grep PCI_HOTPLUG_OLD
> default-configs/i386-softmmu.mak:CONFIG_PCI_HOTPLUG_OLD=y
> default-configs/x86_64-softmmu.mak:CONFIG
On 14.02.2015 04:12, Richard Henderson wrote:
> This is less about improved type checking than enabling a
> subsequent change to the representation of labels.
>
> Cc: Claudio Fontana
> Cc: Andrzej Zaborowski
> Cc: Peter Maydell
> Cc: Aurelien Jarno
> Cc: Blue Swirl
> Cc: Stefan Weil
> Signed
Real sun4u systems memory-map the NVRAM on the (ISA) ebus, so switch over to
MMIO from ioport access whilst setting the base year to 1968 as used by Sun
systems. This allows all SPARC64 OSs included in my tests to correctly detect
the NVRAM IC and read the hardware clock correctly upon boot.
Note
Signed-off-by: Mark Cave-Ayland
CC: Peter Maydell
---
MAINTAINERS |3 +++
1 file changed, 3 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8c06739..7ef4879 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -159,6 +159,7 @@ F: hw/sh4/
SPARC
M: Blue Swirl
+M: Mark Cave-Ayland
S
Signed-off-by: Mark Cave-Ayland
---
qemu-doc.texi |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/qemu-doc.texi b/qemu-doc.texi
index aabe8df..f5b0dc4 100644
--- a/qemu-doc.texi
+++ b/qemu-doc.texi
@@ -2052,7 +2052,7 @@ firmware implementation. The goal is to impleme
Here is the current contents of my qemu-sparc queue coming up to soft freeze.
Note the NVRAM changes are currently blocked on mutiple outstanding patchsets
summarised below:
1) isa: remove isa_mem_base variable
- Currently queued in Leon's target-mips tree
2) timer/m48t59: QOM'ify
- Should be pi
Currently the m48t59 device uses the hardware model in order to determine
whether the year value is offset from the hardware value. As this will
soon be required by the x59 model, create a qdev base_year property to
represent the base year and update the callers appropriately.
Signed-off-by: Mark
This is for subsequent use by the sun4u machine.
Signed-off-by: Mark Cave-Ayland
---
hw/timer/m48t59.c |4
1 file changed, 4 insertions(+)
diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c
index 3d2d6ac..5fa4ab4 100644
--- a/hw/timer/m48t59.c
+++ b/hw/timer/m48t59.c
@@ -129,6 +129,10
This patchset lays the groundwork for switching sun4u over from ioport NVRAM
access to MMIO NVRAM access.
Patch 1 introduces a new base_year property which represents the base year of
the zero hardware year value. In particular, Sun hardware has a base year of
1968 used to extend the date range o
On 01/02/15 19:50, Hervé Poussineau wrote:
> Le 01/02/2015 19:39, Mark Cave-Ayland a écrit :
>> Currently the m48t59 device uses the hardware model in order to determine
>> whether the year value is offset from the hardware value. As this will
>> soon be required by the x59 model, change the year
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