On 05.11.14 07:17, Samuel Mendoza-Jonas wrote:
> If a guest reboots during a running migration, changes to the
> hash page table are not necessarily updated on the destination.
> Opening a new file descriptor to the HTAB forces the migration
> handler to resend the entire table.
>
> Signed-off-b
29.10.2014 16:38, Denis V. Lunev wrote:
> This dependency is required for adequate Parallels images support.
> Typically the disk consists of several images which are glued by
> XML disk descriptor. Also XML hides inside several important parameters
> which are not available in the image header.
[]
Markus Armbruster writes:
[...]
> = How can we better guard the trust boundary in QEMU? =
>
> The guest can violate the trust boundary only because
>
> (a) QEMU supports both raw images and image formats, and
>
> (b) QEMU guesses image format from raw image contents, and
>
> (c) given a raw image
Currently IGD drivers always need to access PCH by 1f.0, and
PCH vendor/device id is used to identify the card.
Signed-off-by: Tiejun Chen
---
hw/i386/pc_piix.c | 28 +++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
We need this instance to passthrough some config fields of PCH.
Signed-off-by: Tiejun Chen
---
hw/xen/xen_pt.c | 112
1 file changed, 112 insertions(+)
diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
index c1bf357..403c33f 100644
--- a/hw/
On 2014/11/3 21:10, Michael S. Tsirkin wrote:
On Mon, Nov 03, 2014 at 01:01:03PM +0100, Paolo Bonzini wrote:
On 03/11/2014 12:47, Chen, Tiejun wrote:
On 2014/11/3 19:36, Chen, Tiejun wrote:
On 2014/11/3 19:35, Paolo Bonzini wrote:
On 03/11/2014 08:48, Chen, Tiejun wrote:
I think the point
04.11.2014 16:39, Alex Bennée wrote:
> zhanghailiang writes:
>
>> Convert several Character backend open functions to use the Error API.
>>
>> Signed-off-by: zhanghailiang
>> ---
>> qemu-char.c | 76
>> +
>> 1 file changed, 41 inserti
This patch adds FWNMI support in qemu for powerKVM
guests by handling the ibm,nmi-register rtas call.
Whenever OS issues ibm,nmi-register RTAS call, the
machine check notification address is saved and the
machine check interrupt vector 0x200 is patched to
issue a private hcall.
This patch also han
Whenever there is a physical memory error due to bit
flips, which cannot be corrected by hardware, the error
is passed on to the kernel. If the memory address in
error belongs to guest address space then guest kernel
is responsible to take action. Hence the error is passed
on to guest via KVM by in
Receive updates from SLOF about the updated rtas-base.
A separate patch for SLOF [1] adds functionality to invoke
a private HCALL whenever OS issues instantiate-rtas with
a new rtas-base.
This is required as qemu needs to know the updated rtas-base
as it allocates error reporting structure in RTAS
Extend rtas-blob to accommodate error log. Error log
structure is saved in rtas space upon a machine check
exception.
Signed-off-by: Aravinda Prasad
---
hw/ppc/spapr.c |7 +++
include/hw/ppc/spapr.h |5 +
2 files changed, 12 insertions(+)
diff --git a/hw/ppc/spapr.c b/hw
This series of patches add support for fwnmi in powerKVM guests.
Currently upon machine check exception, if the address in
error belongs to guest then KVM invokes guest's NMI interrupt
vector 0x200.
This patch series adds functionality where the guest's 0x200
interrupt vector is patched such that
On Fri, Oct 03, 2014 at 06:47:37PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Signed-off-by: Dr. David Alan Gilbert
> ---
> arch_init.c | 11
> include/migration/migration.h| 1 +
> include/migration/postcopy-ram.h | 12
04.11.2014 13:50, zhanghailiang wrote
> It is either "Failed _to_ do something", or "something failed",
> but not "failed something".
Um. Heh. I was afraid of seeing this ;)
My comment about bad grammar was in context of changing error
reporting in this area -- so while chaning error API in use
On Fri, Oct 03, 2014 at 06:47:38PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Signed-off-by: Dr. David Alan Gilbert
> ---
> include/migration/migration.h| 2 ++
> include/migration/postcopy-ram.h | 6 +
> postcopy-ram.c | 49
> ++
On Fri, Oct 03, 2014 at 06:47:36PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Where postcopy is preceeded by a period of precopy, the destination will
> have received pages that may have been dirtied on the source after the
> page was sent. The destination mu
04.11.2014 16:25, Alex Bennée wrote:
> zhanghailiang writes:
>
>> For some qemu_chr_parse_* functions, we just check whether the parameter
>> is NULL or not, but do not check if it is empty.
>>
>> For example:
>> qemu-system-x86_64 -chardev pipe,id=id,path=
>> It will pass the check of NULL but w
Jeff Cody writes:
> On Tue, Nov 04, 2014 at 07:45:38PM +0100, Markus Armbruster wrote:
[...]
>> == Don't guess format from untrusted image contents ==
>>
>> Several variations of the theme.
>>
>> Guessing only happens when the user doesn't specify a format, so the
>> simplest way to avoid it wo
Currently when *obj is not a TYPE_DEVICE, qemu will abort. This patch just
fixed it. When *obj is not a TYPE_DEVICE, just do not add it to hotpluggable
device list.
This patch also fixed the following issue:
1, boot qemu using cli:
$ /opt/qemu-git-arm/bin/qemu-system-x86_64 -monitor stdio -enable-
04.11.2014 14:49, zhanghailiang wrote:
> When do memory hotplug, if there is numa node, we should add
> the memory size to the corresponding node memory size.
>
> It affects the result of hmp command "info numa".
>
> Reviewed-by: Igor Mammedov
> Signed-off-by: zhanghailiang
> ---
> Hi Luiz,
>
On 2014/11/5 14:53, Michael Tokarev wrote:
> 04.11.2014 16:32, Eric Blake wrote:
>> On 11/03/2014 01:48 PM, arei.gong...@huawei.com wrote:
>>> From: Gonglei
>>>
>>> Fix typos made people confuesd:
>>
>> Spelling:
>> s/confuesd/confused/
>>
>> Grammar: would read better as:
>>
>> Fix typos that ca
On 11/04/2014 09:19 PM, Alexander Graf wrote:
> The SAM instructions simply change 2 bits in PSW.MASK to advertise
> the current memory mode. While we can't fully guarantee that 31 bit
> mode (or even remotely 24 bit mode) actually work correctly, we don't
> check whether lpswe modifies these bits,
04.11.2014 16:32, Eric Blake wrote:
> On 11/03/2014 01:48 PM, arei.gong...@huawei.com wrote:
>> From: Gonglei
>>
>> Fix typos made people confuesd:
>
> Spelling:
> s/confuesd/confused/
>
> Grammar: would read better as:
>
> Fix typos that caused confusion for some people:
I just removed whole
On Wed, 11/05 09:59, Fam Zheng wrote:
> On Wed, 11/05 08:53, jun muzi wrote:
> > Yes, in my original thought i just want to do as you said. But it will have
> > two "return 0" in one function. So i think it's not so smart. If you still
> > think two "return 0" is better, i will submit a new version
Some of variables handling 64bit address must be changed from 'ram_addr_t' to
'uint64_t'.
Signed-off-by: SeokYeon Hwang
---
hw/i386/smbios.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/i386/smbios.c b/hw/i386/smbios.c
index 8a7ad48..024e594 100644
--- a/hw/
> -Original Message-
> From: Paolo Bonzini [mailto:paolo.bonz...@gmail.com] On Behalf Of Paolo
> Bonzini
> Sent: Tuesday, November 04, 2014 5:42 PM
> To: SeokYeon Hwang; qemu-devel@nongnu.org
> Cc: paolo.bonz...@gmail.com; arm...@redhat.com; alex.william...@hp.com
> Subject: Re: [PATCH v2]
On Wed, Nov 05, 2014 at 01:49:54PM +0800, Tang Chen wrote:
<...>
> - 2-7: reserved, OSPM must clear them before writing to register
> + 2: set by hardware after it has emitted devive eject event for
s/devive/device/
Regards,
Hu
If a TCG guest reboots during a running migration HTAB entries are not
marked dirty, and the destination boots with an invalid HTAB.
When a reboot occurs reset the state of HTAB migration, and explicitly
inform the destination of invalid entries.
Signed-off-by: Samuel Mendoza-Jonas
---
hw/ppc/s
If a guest reboots during a running migration, changes to the
hash page table are not necessarily updated on the destination.
Opening a new file descriptor to the HTAB forces the migration
handler to resend the entire table.
Signed-off-by: Samuel Mendoza-Jonas
---
hw/ppc/spapr.c | 47 +++
If a spapr guest reboots during a live migration, the guest HTAB on the
destination is not updated properly, usually resulting in a kernel panic.
This is a (delayed!) follow up to my previous patch including a fix
for TCG guests as well as KVM.
Samuel Mendoza-Jonas (2):
spapr: Fix stale HTAB du
On Tue, Nov 04, 2014 at 04:21:41PM +0200, Marcel Apfelbaum wrote:
> On Tue, 2014-11-04 at 17:12 +0800, Hu Tao wrote:
> > So that standard pci host device can share them.
> >
> > Signed-off-by: Hu Tao
> > ---
> > hw/pci-host/piix.c | 20
> > hw/pci-host/q35.c | 7 ---
>
This patch adds a new bit to memory hotplug IO port indicating that
memory device is be removed. And set MemStatus->is_removing to false
when the bit is written.
NOTE: MemStatus->is_removing is set to true in acpi_memory_unplug_cb()
when doing memory hot-remove with device_del command.
Signed-off
From: Hu Tao
Implement unrealize function for pc-dimm device. It remove subregion from
hotplug region, and delete ram address range from guest ram list.
Signed-off-by: Hu Tao
Signed-off-by: Tang Chen
---
hw/mem/pc-dimm.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/hw/mem/p
This patch-set implements memory hot-remove for QEmu.
Rebased on Igor's asynchronize hotplug framework (qemu v2.1.2, the latest).
Approach: QEmu sets GPE status bit, then triggers SCI to notify guest os.
Guest os checks device status, and free memory resource if possible,
then generate OST.
NOT
From: Hu Tao
This patch implements MEMORY_SLOT_EJECT_METHOD according to ACPI spec.
Signed-off-by: Hu Tao
Signed-off-by: Tang Chen
---
hw/i386/ssdt-mem.dsl | 5 +
hw/i386/ssdt-misc.dsl| 13 -
include/hw/acpi/pc-hotplug.h | 2 ++
3 files changed, 19 insertions
From: Hu Tao
Implement device unplug callback for PCMachine. And it now only support
pc-dimm hot-remove. The callback will call piix4 or ich9 callbacks introduced
in previous patches.
Signed-off-by: Hu Tao
Signed-off-by: Tang Chen
---
hw/i386/pc.c | 31 +++
1 file
Add a new API named acpi_memory_hotplug_sci() to send memory hotplug SCI.
Doing this is because this procedure will be used by other functions in the
next coming patches.
Signed-off-by: Tang Chen
---
hw/acpi/memory_hotplug.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
dif
Implement ich9_pm_device_unplug_cb() to support memory hot-remove,
calling acpi_memory_unplug_cb(). And itself will be called in
ich9_device_unplug_cb().
Signed-off-by: Tang Chen
---
hw/acpi/ich9.c | 12
hw/isa/lpc_ich9.c | 5 +++--
include/hw/acpi/ich9.h | 2 ++
3 fi
From: Hu Tao
Implement acpi_memory_unplug_cb(), sending an sci to guest to trigger
memory hot-remove, and call it in piix4_device_unplug_cb().
Signed-off-by: Hu Tao
Signed-off-by: Tang Chen
---
hw/acpi/piix4.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/acpi/pi
Add a new bool member named is_removing to MemStatus indicating that
the memory solt is being removed. Set it to true in acpi_memory_unplug_cb(),
and send SCI to guest.
Signed-off-by: Tang Chen
---
hw/acpi/memory_hotplug.c | 15 +++
include/hw/acpi/memory_hotplug.h | 3 +++
Replace string "slot" in acpi_memory_plug_cb() with MACRO PC_DIMM_SLOT_PROP.
Signed-off-by: Tang Chen
---
hw/acpi/memory_hotplug.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/acpi/memory_hotplug.c b/hw/acpi/memory_hotplug.c
index ed39241..c6580da 100644
--- a/hw/acpi
Add a new API named acpi_memory_get_slot_status_descriptor() to obtain
a single memory slot status. Doing this is because this procedure will
be used by other functions in the next coming patches.
Signed-off-by: Tang Chen
---
hw/acpi/memory_hotplug.c | 27 +++
1 file chan
This applies cases on drive-backup on blockdev-backup, except cases with
target format and mode.
Also add a case to check source == target.
Signed-off-by: Fam Zheng
---
tests/qemu-iotests/055 | 211 +
tests/qemu-iotests/055.out | 4 +-
2 files c
BTW add version info for other transaction types.
Signed-off-by: Fam Zheng
---
blockdev.c | 48
qapi-schema.json | 7 +++
2 files changed, 55 insertions(+)
diff --git a/blockdev.c b/blockdev.c
index 2e5068c..6401850 100644
--- a/blockd
Similar to drive-backup, but this command uses a device id as target
instead of creating/opening an image file.
Also add blocker on target bs, since the target is also a named device
now.
Add check and report error for bs == target which became possible but is
an illegal case with introduction of
v3: Address Eric's comments on documentation.
Squashed 3/4 into 2/4.
v2: Address Markus' and Eric's comments:
Fix qapi schema documentation.
Fix versioning of transactions.
Improve test case code by dropping inelegnet bool.
The existing drive-backup command accepts a target file p
On Wed, Oct 29, 2014 at 04:38:11PM +0300, Denis V. Lunev wrote:
> Signed-off-by: Denis V. Lunev
> Acked-by: Roman Kagan
> CC: Jeff Cody
> CC: Kevin Wolf
> CC: Stefan Hajnoczi
> ---
> block/parallels.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/block/parallels
On Wed, Oct 29, 2014 at 04:38:10PM +0300, Denis V. Lunev wrote:
> Unfortunately, old guest OSes do not align partitions to page size by
> default. This is true for Windows 2003 and Windows XP.
>
> "Padding" is a value which should be added to guest LBA to obtain
> sector number inside the image. T
On Wed, Oct 29, 2014 at 04:38:09PM +0300, Denis V. Lunev wrote:
> Unfortunately, old guest OSes do not align partitions to page size by
> default. This is true for Windows 2003 and Windows XP.
>
> For the time being Parallels was created an optimization for such OSes
> in its desktop product. Desk
On Wed, Oct 29, 2014 at 04:38:08PM +0300, Denis V. Lunev wrote:
> Signed-off-by: Denis V. Lunev
> Acked-by: Roman Kagan
> CC: Jeff Cody
> CC: Kevin Wolf
> CC: Stefan Hajnoczi
> ---
> tests/qemu-iotests/076| 6 ++
> tests/qemu-iotests/076.out
On Wed, Oct 29, 2014 at 04:38:07PM +0300, Denis V. Lunev wrote:
> Typically Parallels disk bundle consists of several images which are
> glued by XML disk descriptor. Also XML hides inside several important
> parameters which are not available in the image header.
>
> This patch allows to specify
On Wed, 11/05 08:53, jun muzi wrote:
> Yes, in my original thought i just want to do as you said. But it will have
> two "return 0" in one function. So i think it's not so smart. If you still
> think two "return 0" is better, i will submit a new version. Thanks.
>
> BTW, for subject, i agree with
From: Gonglei
After commit 89b516d8, some logics is turbid and
breaks 'make check' as below errors:
tests/vhost-user-test.c: In function '_cond_wait_until':
tests/vhost-user-test.c:154: error: 'G_TIME_SPAN_SECOND' undeclared (first use
in this function)
tests/vhost-user-test.c:154: error: (Each
Yes, in my original thought i just want to do as you said. But it will have
two "return 0" in one function. So i think it's not so smart. If you still
think two "return 0" is better, i will submit a new version. Thanks.
BTW, for subject, i agree with you.
Jun Li
2014-11-5 上午2:39于 "Andreas Färber"
On 2014/11/4 21:32, Eric Blake wrote:
> On 11/03/2014 01:48 PM, arei.gong...@huawei.com wrote:
>> From: Gonglei
>>
>> Fix typos made people confuesd:
>
> Spelling:
> s/confuesd/confused/
>
> Grammar: would read better as:
>
> Fix typos that caused confusion for some people:
>
Thanks.
Mybe /m
On 2014/11/3 21:34, Markus Armbruster wrote:
> I still intend to post a pull request for all the recent MAINTAINERS
> patches that don't go in via some other tree. I'm tracking yours. Give
> me a few more days.
Cool, thanks ;)
Best regards,
-Gonglei
On 4 November 2014 22:46, Greg Bellows wrote:
>
>
> On 31 October 2014 10:26, Peter Maydell wrote:
>>
>> On 30 October 2014 21:28, Greg Bellows wrote:
>> > static void vmsa_ttbcr_reset(CPUARMState *env, const ARMCPRegInfo *ri)
>> > {
>> > -env->cp15.c2_base_mask = 0xc000u;
>> > +/*
On Monday 03 November 2014 13:22:19 Peter Wu wrote:
> On Friday 24 October 2014 18:55:07 Jan Kiszka wrote:
> > writing to you as you provided a fix for the last related issue:
> >
> > I just noticed that the samba-based share is broken again with smbd
> > version 4.1.11. Tried to look briefly at i
On 31 October 2014 10:26, Peter Maydell wrote:
> On 30 October 2014 21:28, Greg Bellows wrote:
> > From: Fabian Aggeler
> >
> > Since TTBCR is banked we will bank c2_mask and c2_base_mask too. This
> > avoids recalculating them on switches from secure to non-secure world.
>
> These fields are p
Changes made in v9, but as with TTBR0_EL3 I have left the definition for
TCR_EL3 in.
On 31 October 2014 10:07, Peter Maydell wrote:
> On 30 October 2014 21:28, Greg Bellows wrote:
> > From: Fabian Aggeler
> >
> > Adds TCR_EL3 system register and makes existing TTBCR banked. Adjust
> > translat
On 31 October 2014 10:04, Peter Maydell wrote:
> On 30 October 2014 21:28, Greg Bellows wrote:
> > From: Fabian Aggeler
> >
> > Add TTBR0 and maps secure/non-secure instance of ttbr0 and ttbr1
>
> Is "maps" a typo for something, or have we lost a word here?
>
>
It is just not clear. It should
Now that we finally check for presence of dangling sysbus devices, make check
started complaining that the sPAPR PHB is one such device.
However, it really isn't. The spapr PHB is not really a traditional sysbus
device, but much more a special spapr pv device which is already able to get
created d
On Fri, 2014-10-31 at 13:38 +, Eric Auger wrote:
> Use the kvm_resamplefds_enabled function
>
> Signed-off-by: Eric Auger
> ---
If someone wants to pick this up:
Acked-by: Alex Williamson
Alternatively, provide an ack on patch 1 and I can bring it in through
my tree after 2.2. Thanks,
A
I have fixed the code to properly handle the CONTEXTIDR/FCSEIDR registers.
This is done in two parts:
1) I broke the FCSEIDR and CONTEXTIDR into separate secure/non-secure
definitions.
2) I updated the check that filters the secure duplicate instance caused by
registering unbanked register twice.
On 11/04/2014 08:19 PM, Alexander Graf wrote:
The SAM instructions simply change 2 bits in PSW.MASK to advertise
the current memory mode. While we can't fully guarantee that 31 bit
mode (or even remotely 24 bit mode) actually work correctly, we don't
check whether lpswe modifies these bits, so we
On 4 November 2014 19:26, Alexander Graf wrote:
> Hi Peter,
>
> This is my current patch queue for ppc. Please pull.
>
> Alex
>
>
> The following changes since commit d5b4dc3b50175f0c34f3cf4b053e123fb37f5aed:
>
> Merge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter'
> into
On 04.11.14 23:02, Bastian Koppelmann wrote:
>
> On 11/04/2014 08:19 PM, Alexander Graf wrote:
>> +static ExitStatus op_sam(DisasContext *s, DisasOps *o)
>> +{
>> +int sam = s->insn->data;
>> +TCGv_i64 tsam = tcg_const_i64(sam);
>> +
>> +/* Overwrite PSW_MASK_64 and PSW_MASK_32 */
>>
mce=ignore_ce indeed "fixes" the messages. However, it will mask real
(important) errors as well.
Since Intel can't or won't correct the bug with a microcode update, how
about filtering it in the kernel?
http://svnweb.freebsd.org/base/head/sys/x86/x86/mca.c?r1=269052&r2=269051&pathrev=269052
--
On 11/04/2014 08:19 PM, Alexander Graf wrote:
+static ExitStatus op_sam(DisasContext *s, DisasOps *o)
+{
+int sam = s->insn->data;
+TCGv_i64 tsam = tcg_const_i64(sam);
+
+/* Overwrite PSW_MASK_64 and PSW_MASK_32 */
+tcg_gen_deposit_i64(psw_mask, psw_mask, tsam, 31, 2);
+
+tcg
On Tue, Nov 04, 2014 at 07:45:38PM +0100, Markus Armbruster wrote:
> I'll try to explain all solutions fairly. Isn't easy when you're as
> biased towards one of them as I am. Please bear with me.
>
>
> = The trust boundary between image contents and meta-data =
>
> A disk image consists of ima
The SAM instructions simply change 2 bits in PSW.MASK to advertise
the current memory mode. While we can't fully guarantee that 31 bit
mode (or even remotely 24 bit mode) actually work correctly, we don't
check whether lpswe modifies these bits, so we shouldn't keep the
guest from executing SAM ins
* Paolo Bonzini (pbonz...@redhat.com) wrote:
> > the only oddity I get from that is from the 'SEND_ACK' you suggested;
> > since all my functions to send commands are send_ I currently have
> > 'qemu_savevm_send_send_ack' which while consistent looks a bit odd.
>
> Perhaps ping/pong?
Done (al
Ping: http://patchwork.ozlabs.org/patch/404885/
Does anyone know someone I can cc on this? This part of the code doesn't
have a dedicated maintainer.
On 10/29/2014 11:52 PM, Drew DeVault wrote:
The name is set to "qemu".
Signed-off-by: Drew DeVault
---
For the future, it may be useful to ad
This patch adds support to expose eTSEC devices in the dynamically created
guest facing device tree. This allows us to expose eTSEC devices into guests
without changes in the machine file.
Because we can now tell the guest about eTSEC devices this patch allows the
user to specify eTSEC devices via
From: Tom Musta
Fix the implementation of Vector Compare Bounds Single Precision.
Specifically, fix the case where the operands are unordered -- since
the result is non-zero, the CR[6] field should be set to zero.
Signed-off-by: Tom Musta
Signed-off-by: Alexander Graf
---
target-ppc/int_helpe
From: Paolo Bonzini
The MMU index is an internal detail that should not be needed by the
translator (except to generate loads and stores). Look at the MSR
directly.
Signed-off-by: Paolo Bonzini
Signed-off-by: Alexander Graf
---
target-ppc/translate.c | 165 +++
From: Chen Gang
strncat() will append additional '\0' to destination buffer, so need
additional 1 byte for it, or may cause memory overflow, just like other
area within QEMU have done.
And can use g_strdup_printf() instead of strncat(), which may be more
easier understanding.
Signed-off-by: Che
Sysbus devices can get their IRQ lines connected to other devices. It is
possible to figure out which IRQ line a connection is on and whether a sysbus
device even provides an IRQ connector at a specific offset.
This patch exposes helpers to make this information publicly accessible. We
will need i
Sysbus devices have a range of MMIO regions they expose. The exact number
of regions is device specific and internal information to the device model.
Expose whether a region exists via a public interface. That way our platform
bus enumeration code can dynamically determine how many regions exist.
Sysbus devices can be spawned by C code or dynamically via the command line.
In the latter case, we need to be able to find the dynamically created devices
to do things with them.
This patch adds a search helper that makes it easy to look for dynamically
spawned sysbus devices.
Signed-off-by: Ale
From: Tom Musta
Fix the implementation of the Altivec shift left and shift right
instructions (vsl, vsr) which erroneously inverts shift direction
on big endian hosts.
Signed-off-by: Tom Musta
Signed-off-by: Alexander Graf
---
target-ppc/int_helper.c | 13 ++---
1 file changed, 2 inse
From: Bharata B Rao
Define and use macros instead of direct numbers wherever
possible in ppc opcodes table handling code.
This doesn't change any code functionality.
Signed-off-by: Bharata B Rao
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h| 3 ++-
target-ppc/translate_init
For e500 our approach to supporting dynamically spawned sysbus devices is to
create a simple bus from the guest's point of view within which we map those
devices dynamically.
We allocate memory regions always within the "platform" hole in address
space and map IRQs to predetermined IRQ lines that
From: Peter Maydell
The g_hash_table_iter_* functions for iterating through a hash table
are not present in glib 2.12, which is our current minimum requirement.
Rewrite the code to use g_hash_table_foreach() instead.
Signed-off-by: Peter Maydell
Signed-off-by: Alexander Graf
---
hw/ppc/spapr_
From: Tom Musta
Correct the opcodes for the vrfim, vrfin and vrfiz instructions.
Signed-off-by: Tom Musta
Reviewed-by: Thomas Huth
Signed-off-by: Alexander Graf
---
target-ppc/translate.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/target-ppc/translate.c
From: Paolo Bonzini
It sets CR1, not CR6 (and the spec agrees).
Signed-off-by: Paolo Bonzini
Reviewed-by: Tom Musta
Tested-by: Tom Musta
Signed-off-by: Alexander Graf
---
target-ppc/translate.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/target-ppc/tra
From: Aurelien Jarno
This patch simplifies the AES code, by directly accessing the newly added
S-Box, InvS-Box tables instead of recreating them by using the AES_Te and
AES_Td tables.
Cc: Alexander Graf
Cc: Paolo Bonzini
Signed-off-by: Aurelien Jarno
Reviewed-by: Paolo Bonzini
Tested-by: Tom
With the e500 virt machine, we don't have to adhere to the exact hardware
layout of an mpc8544ds board. So there we can just add a qoriq compatible
GPIO controller into the system that we can add a power off hook to.
Signed-off-by: Alexander Graf
---
hw/ppc/e500.c | 32 ++
From: David Gibson
As of qemu-2.1, spapr/pseries, has a set of versioned machine classes to
represent the machine type as it appeared to the guest in different qemu
versions. This allows for safe migration of guests between current and
future qemu versions.
However, these are organized a bit di
From: Bharata B Rao
Opcode table has direct, indirect and double indirect handlers, but
ppc_cpu_unrealizefn() frees direct handlers which are never allocated
and never frees double indirect handlers.
Signed-off-by: Bharata B Rao
Signed-off-by: Alexander Graf
---
target-ppc/translate_init.c |
From: Peter Maydell
The MemoryRegionOps struct pci4xx_cfgaddr_ops and the read and
write functions it references are all unused; remove them.
Signed-off-by: Peter Maydell
Signed-off-by: Alexander Graf
---
hw/ppc/ppc4xx_pci.c | 24
1 file changed, 24 deletions(-)
diff
From: David Gibson
The virtex-ml507 is a Xilinx CPU based system, and requires several sub
devices which are only included with CONFIG_XILINX. Therefore, it should
only be compiled if CONFIG_XILINX is set.
Signed-off-by: David Gibson
Reviewed-by: Peter Crosthwaite
Signed-off-by: Alexander Gra
We need to support spawning of sysbus devices dynamically via the command line.
The easiest way to represent these dynamically spawned devices in the guest's
memory and IRQ layout is by preallocating some space for dynamic sysbus devices.
This is what the "platform bus" device does. It is a sysbus
Now that we can properly map sysbus devices that haven't been connected to
something forcefully by C code, we can allow the -device command line option
to spawn them.
For machines that don't implement dynamic sysbus assignment in their board
files we add a new bool "has_dynamic_sysbus" to the mach
From: Pierre Mallard
This patch remove limitation for fc[tf]id[*] on 32 bits targets and
add a new insn flag for signed integer 64 conversion PPC2_FP_CVT_S64
Signed-off-by: Pierre Mallard
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h| 5 -
target-ppc/fpu_helper.c |
From: Paolo Bonzini
This will match the code we use in fpu_helper.c when we flip
CRF_* bit-endianness.
Signed-off-by: Paolo Bonzini
Reviewed-by: Tom Musta
Tested-by: Tom Musta
Signed-off-by: Alexander Graf
---
target-ppc/translate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-
Now that we have a working GPIO controller on the virt machine, we can use
one pin to notify QEMU that the guests wants to power off the system.
Signed-off-by: Alexander Graf
---
hw/ppc/e500.c | 24
1 file changed, 24 insertions(+)
diff --git a/hw/ppc/e500.c b/hw/ppc/e5
From: Tom Musta
Adjust the IVOR mask for generic Book E implementation to support bit 59.
This is consistent with the Power ISA.
Signed-off-by: Tom Musta
Reported-by: Pierre Mallard
Signed-off-by: Alexander Graf
---
target-ppc/translate_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deleti
From: Paolo Bonzini
Signed-off-by: Paolo Bonzini
Reviewed-by: Tom Musta
Tested-by: Tom Musta
Signed-off-by: Alexander Graf
---
target-ppc/int_helper.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 713d
Hi Peter,
This is my current patch queue for ppc. Please pull.
Alex
The following changes since commit d5b4dc3b50175f0c34f3cf4b053e123fb37f5aed:
Merge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter'
into staging (2014-11-04 17:33:34 +)
are available in the git rep
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