Il 11/12/2013 06:20, Alexey Kardashevskiy ha scritto:
>
> Any progress on this?
>
> I am asking since the patchset about bootindex you gave me yesterday prints
> "(process:38896): GLib-CRITICAL **: g_hash_table_foreach: assertion
> `version == hash_table->version' failed" which I "fixed" by movin
Il 11/12/2013 01:12, Anthony Liguori ha scritto:
> Paolo Bonzini writes:
>
>> Anthony,
>>
>> the following changes since commit 7dc65c02fe3fb8f3146ce0b9ff5fec5945329f0e:
>>
>> Open 2.0 development tree (2013-11-27 14:02:45 -0800)
>
> This also conflicts badly.
This doesn't conflict here eithe
Il 11/12/2013 01:10, Anthony Liguori ha scritto:
>> >
>> > The following changes since commit
>> > ac9524dc55dc32e492ac3e6fbc9785be7168f8a2:
>> >
>> > qemu-iotests: filter QEMU monitor \r\n (2013-12-06 16:53:51 +0100)
>> >
>> > are available in the git repository at:
>> >
>> > git://github.com
On Thu, Nov 28, 2013 at 11:03:04AM +0100, Peter Lieven wrote:
> On 28.11.2013 09:48, Hu Tao wrote:
> >On Wed, Nov 27, 2013 at 11:13:40AM +0100, Peter Lieven wrote:
> >>Am 27.11.2013 11:07, schrieb Fam Zheng:
> >>>On 2013年11月27日 18:03, Peter Lieven wrote:
> Am 27.11.2013 07:40, schrieb Fam Zheng
Hi,
I'm trying to use the latest version of QEMU (1.7) in user mode in Android
1.7. I tried compiling it, but it seems there is a very hard dependency on
glib which is standing in the way. Has anyone tried building qemu 1.7 for
android, if so where can I get the information?
Thanks,
Tervel
On 12/11/2013 05:47 PM, Alexey Kardashevskiy wrote:
> On 12/10/2013 06:47 PM, Greg Kurz wrote:
>> On Tue, 10 Dec 2013 13:43:05 +1100
>> Alexey Kardashevskiy wrote:
>>> On 12/10/2013 03:33 AM, Greg Kurz wrote:
In the past, IO space could not be mapped into the memory address space
so we i
Peter Crosthwaite wrote:
On Mon, Dec 9, 2013 at 10:10 AM, liguang wrote:
Signed-off-by: liguang
---
default-configs/arm-softmmu.mak |2 +
hw/timer/Makefile.objs |2 +
hw/timer/allwinner-a10-pit.c | 254 ++
include/hw/t
Peter Crosthwaite wrote:
On Mon, Dec 9, 2013 at 10:10 AM, liguang wrote:
Signed-off-by: liguang
---
default-configs/arm-softmmu.mak |1 +
hw/intc/Makefile.objs |1 +
hw/intc/allwinner-a10-pic.c | 217 +++
include/hw/int
On 12/10/2013 06:47 PM, Greg Kurz wrote:
> On Tue, 10 Dec 2013 13:43:05 +1100
> Alexey Kardashevskiy wrote:
>> On 12/10/2013 03:33 AM, Greg Kurz wrote:
>>> In the past, IO space could not be mapped into the memory address space
>>> so we introduced a workaround for that. Nowadays it does not look
Prior to this patch, qapi-visit.py used custom code to generate enum
names used for handling a qapi union. Fix it to instead reuse common
code, with identical generated results, and allowing future updates to
generation to only need to touch one place.
Signed-off-by: Wenchao Xia
---
scripts/qapi
On Mon, Dec 9, 2013 at 10:10 AM, liguang wrote:
> Signed-off-by: liguang
Acked-by: Peter Crosthwaite
> ---
> hw/arm/Makefile.objs |2 +-
> hw/arm/cubieboard.c | 69
> ++
> 2 files changed, 70 insertions(+), 1 deletions(-)
> create mode
On Mon, Dec 9, 2013 at 10:10 AM, liguang wrote:
> Signed-off-by: liguang
Acked-by: Peter Crosthwaite
> ---
> default-configs/arm-softmmu.mak |1 +
> hw/arm/Makefile.objs|1 +
> hw/arm/allwinner-a10.c | 103
> +++
> include/hw/
Now "enum AIOContext" will generate AIO_CONTEXT instead of A_I_O_CONTEXT,
"X86CPU" will generate X86_CPU instead of X86_C_P_U.
Signed-off-by: Wenchao Xia
---
include/qapi/qmp/qerror.h |2 +-
scripts/qapi.py | 26 +++---
target-i386/cpu.c |2 +-
3 f
On Mon, Dec 9, 2013 at 10:10 AM, liguang wrote:
> Signed-off-by: liguang
> ---
> default-configs/arm-softmmu.mak |1 +
> hw/intc/Makefile.objs |1 +
> hw/intc/allwinner-a10-pic.c | 217
> +++
> include/hw/intc/allwinner-a10-pic.
After this patch, hidden enum type BlockdevOptionsKind will not
be generated, and other API can use enum BlockdevDriver.
Signed-off-by: Wenchao Xia
Reviewed-by: Eric Blake
---
qapi-schema.json | 14 +-
1 files changed, 13 insertions(+), 1 deletions(-)
diff --git a/qapi-schema.jso
It is bad that same key was specified twice, especially when a union have
two branches with same condition. This patch can prevent it.
Signed-off-by: Wenchao Xia
Reviewed-by: Eric Blake
---
scripts/qapi.py |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/scripts/qapi.py
Later both qapi-types.py and qapi-visit.py need a common function
for enum name generation.
Signed-off-by: Wenchao Xia
Reviewed-by: Eric Blake
---
scripts/qapi-types.py | 10 --
scripts/qapi.py | 10 ++
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/s
It will check whether the values specified are written correctly,
and whether all enum values are covered, when discriminator is a
pre-defined enum type
Signed-off-by: Wenchao Xia
Reviewed-by: Eric Blake
---
scripts/qapi-visit.py | 17 +
scripts/qapi.py | 31 ++
By default, any union will automatically generate a enum type as
"[UnionName]Kind" in C code, and it is duplicated when the discriminator
is specified as a pre-defined enum type in schema. After this patch,
the pre-defined enum type will be really used as the switch case
condition in generated C co
Later other scripts will need to check the enum values.
Signed-off-by: Wenchao Xia
Reviewed-by: Eric Blake
---
scripts/qapi.py| 18 ++
tests/qapi-schema/comments.out |2 +-
tests/qapi-schema/qapi-schema-test.out |4 +++-
3 files changed,
Test for inherit and complex union.
Signed-off-by: Wenchao Xia
---
tests/qapi-schema/qapi-schema-test.json | 27 ++
tests/qapi-schema/qapi-schema-test.out | 11 +++
tests/test-qmp-input-visitor.c | 120 +
tests/test-qmp-output-visitor.c | 149 +
I forgot to cc the maillist before, so resend it to qemu-devel@nongnu.org.
This series address two issues:
1. support using enum as discriminator in union.
For example, if we have following define in qapi schema:
{ 'enum': 'EnumOne',
'data': [ 'value1', 'value2', 'value3' ] }
{ 'type': 'UserD
On Mon, Dec 9, 2013 at 10:10 AM, liguang wrote:
> Signed-off-by: liguang
> ---
> default-configs/arm-softmmu.mak |2 +
> hw/timer/Makefile.objs |2 +
> hw/timer/allwinner-a10-pit.c | 254
> ++
> include/hw/timer/allwinner-a10-p
On 12/04/2013 01:58 AM, Paolo Bonzini wrote:
> Il 03/12/2013 15:35, Andreas Färber ha scritto:
>> Am 03.12.2013 15:00, schrieb Paolo Bonzini:
>>> Il 03/12/2013 14:44, Andreas Färber ha scritto:
>>
>> You can check "if (current_machine &&
>> current_machine->get_fw_dev_path)", and move c
This is no longer needed, and is obsoleted by error_abort. Remove.
Signed-off-by: Peter Crosthwaite
---
include/qapi/qmp/qerror.h | 1 -
qobject/qerror.c | 8
2 files changed, 9 deletions(-)
diff --git a/include/qapi/qmp/qerror.h b/include/qapi/qmp/qerror.h
index c30c2f6..73c
Replace an assert_no_error() usage with the error_abort system.
Signed-off-by: Peter Crosthwaite
---
target-i386/cpu.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index bb98f6d..6b7b1a9 100644
--- a/target-i386/cpu.c
+++ b/target-
This is a boiler-plate _nofail variant of qemu_opts_create. Remove and
use error_abort in call sites.
null/0 arguments needs to be added for the id and fail_if_exists fields
in affected callsites due to argument inconsistency between the normal and
no_fail variants.
Signed-off-by: Peter Crosthwai
Replace assert_no_error() usages with the error_abort system.
&error_abort is passed into API calls to signal to the Error sub-system
that any errors are fatal. Removes need for caller assertions.
Signed-off-by: Peter Crosthwaite
---
changed since v1: Split unrelated dead code removal to sep patc
This is unreachable code, as it's already asserted that no errors have
occurred. Delete.
Signed-off-by: Peter Crosthwaite
---
hw/core/qdev.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/hw/core/qdev.c b/hw/core/qdev.c
index e374a93..adbff18 100644
--- a/hw/core/qdev.c
+++ b/hw/core/q
Add a special Error * that can be passed to error handling APIs to
signal that any errors are fatal and should abort QEMU. There are two
advantages to this:
- allows for brevity when wishing to assert success of Error **
accepting APIs. No need for this pattern:
Error * local_err = NULL;
Following our discussion RE self asserting API calls, here is a spin of
my proposal. This series obsoletes the need for _nofail variants for
Error ** accepting APIs. Is also greatly reduces the verbosity of calls
sites that are currently asserting against errors.
Patch 1 is the main event - additi
On 12/10/2013 08:21 PM, Paolo Bonzini wrote:
> Il 10/12/2013 08:32, Alexey Kardashevskiy ha scritto:
>> As suffixes do not make sense for sPAPR's device tree and
>> there is no way to filter them out on the BusState::get_fw_dev_path
>> level, let's add an ability for the external caller to specify
On 2013年12月10日 23:16, Luiz Capitulino wrote:
On Tue, 10 Dec 2013 15:25:07 +0100
Kevin Wolf wrote:
My objection to your approach is strong because Benoît already sent an
alternative which I believe is less worse because with it, arguments
actually mean what their names tell instead of having ad
On Thu, Dec 5, 2013 at 8:11 PM, Markus Armbruster wrote:
> Peter Crosthwaite writes:
>
>> This is a boiler-plate _nofail variant of qemu_opts_create. Remove and
>> use error_abort in call sites.
>>
>> null/0 arguments needs to be added for the id and fail_if_exists fields
>> in affected callsites
From: Antony Pavlov
If hivecs are being used on reset, the CPU should come out of reset at
the hivecs reset vector (0x)
Signed-off-by: Antony Pavlov
[ PC Changes:
* Fixed Grammar error in commit message
* Elaborated commit message.
]
Signed-off-by: Peter Crosthwaite
---
target-arm/
GIC_BASE_ADDR is not the base address of the GIC. Its clear from the
code that this is the base address of the MPCore. Rename to
MPCORE_PERIPHBASE accordingly.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
changed since v2: Fixed broken comment (PMM review)
hw/arm/highbank.c
Fix the CBAR initialisation by using the newly defined static property.
Zynq will now correctly init the CBAR to the SCU base address.
Needed to boot Linux on the xilinx_zynq machine model.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
changed since v1:
use error report rather
On Wed, Dec 11, 2013 at 8:05 AM, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov
> ---
> target-arm/cpu-qom.h | 1 +
> target-arm/cpu.c | 24
> 2 files changed, 25 insertions(+)
>
> diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
> index b55306a..116320
From: Antony Pavlov
Add an ARM CPU property for the reset value of hivecs as it is a
board/SoC configurable setting.
The existence of the property is conditional on the ARM CPU not being M
class.
Signed-off-by: Antony Pavlov
[ PC Changes:
* Elaborated commit message
* refactored to use objec
On Wed, Dec 11, 2013 at 8:05 AM, Antony Pavlov wrote:
> [RFC v2 1/2] ARM: cpu: add "reset_hivecs" property (high vectors on
> [RFC v2 2/2] ARM: arm_cpu_reset: make possible to use high vectors
>
> Changes since v1:
> * rebase over Peter Crosthwaite's "Fix Support for ARM A9 CBAR" v3 series;
> *
Fix the CBAR initialisation by using the newly defined static property.
CBAR is now set before realization, so the intended value is now
actually used.
So I have kind of tested this. I booted an ARM kernel on Highbank with
the stock Highbank DTB. It doesn't boot (and I will be doing something
wron
To allow the machine model to set device properties before CPU
realization.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
changed since v1:
use error report rather than fprintf(stderr
hw/arm/xilinx_zynq.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
dif
To allow the machine model to set device properties before CPU
realization.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
changed since v1:
use error_report rather than fprintf(stderr
hw/arm/highbank.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff -
The reset value of the CP15 CBAR is a vendor (machine) configurable
property. If ARM_FEATURE_CBAR is set, add it as a property at
post_init time.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
Changed since v3:
typo s/Value/value (PMM review)
Change since v1:
Re-implement as dyn
Forgot to CC Antony
On Wed, Dec 11, 2013 at 12:52 PM, Peter Crosthwaite
wrote:
> Hi All,
>
> This patch series adds support for two board configuarable ARM CPU
> properties - Configuration Base Address Register and the
> hivecs-on-reset.
>
> Adding some of the QOM crowd to CC this time as Patches
Some processors (notably A9 within Highbank) define and use the
CP15 configuration base address (CBAR). This is vendor specific
so its best implemented as a CPU property (otherwise we would need
vendor specific child classes for every ARM implementation).
This patch prepares support for converting
The cp15.c15 space is implementation defined. Currently there is a
dummy placeholder register RAZing it. Allow overriding of this RAZ
so implementations of specific registers can take precedence.
Signed-off-by: Peter Crosthwaite
Reviewed-by: Peter Maydell
---
target-arm/helper.c | 3 ++-
1 fil
Integers have an API to add a property via a pointer to storage -
object_property_add_uintXX_ptr(). This is convenient for defining
dynamic properties without having to define local setters and getters.
This patch does the same for the boolean type - object can now easily
define boolean properties
Currently the uintXX property adders make a read only property. This
is not useful for devices that want to create board (or container)
configurable dynamic device properties. Fix by trivially adding property
setters to object_property_add_uintXX.
Signed-off-by: Peter Crosthwaite
---
changed sinc
Hi All,
This patch series adds support for two board configuarable ARM CPU
properties - Configuration Base Address Register and the
hivecs-on-reset.
Adding some of the QOM crowd to CC this time as Patches 1-2 touch the
QOM core and need some discussion.
The CBAR is needed to fix Zynq and Highban
On 2013年11月26日 13:45, Fam Zheng wrote:
Previously live commit of active block device is not supported, this series
implements it and updates corresponding qemu-iotests cases.
This series is based on BlockJobType enum QAPI series.
v6: Address comments from Stefan:
[04/06] commit: support c
On 2013年11月28日 16:39, Fam Zheng wrote:
This series adds for point-in-time snapshot NBD exporting based on
blockdev-backup (variant of drive-backup with existing device as target).
We get a thin point-in-time snapshot by COW mechanism of drive-backup, and
export it through built in NBD server. Th
于 2013/12/10 17:42, Kevin Wolf 写道:
Am 10.12.2013 um 04:18 hat Wenchao Xia geschrieben:
于 2013/12/7 1:22, Kevin Wolf 写道:
bs->buffer_alignment is set by the device emulation and contains the
logical block size of the guest device. This isn't something that the
block layer should know, and even le
From: Hervé Poussineau
We should not modify the type hash table while it is being iterated on.
Assert that it does not happen.
Signed-off-by: Hervé Poussineau
Signed-off-by: Paolo Bonzini
Signed-off-by: Igor Mammedov
---
v2:
* make ver more descriptinve s/enumerating/enumerating_classes/
Ping.
I just wanted to know the status of this patch.
Thanks
On 11/04/2013 11:41 AM, Alex Bennée wrote:
mohamad.ge...@gmail.com writes:
Version 5
* Use pkg-config for lttng-ust and urcu-bp libraries in configure (hard-coded
libraries as a fallback)
* s/Qemu/QEMU in docs/tracing.txt
* Bet
Currently it's possible to make PCIDevice not hotplugable by using
no_hotplug field of PCIDeviceClass. However it limits this
only to PCI devices and prevents from generalizing hotplug code.
So add similar field to DeviceClass so it could be reused with other
Devices and would allow to replace PCI
Split pcie_cap_slot_hotplug() into hotplug/unplug callbacks
and register them as "hotplug-handler" interface implementation of
PCIE_SLOT device.
Replace pci_bus_hotplug() wiring with setting link on PCI BUS
"hotplug-handler" property to PCI_BRIDGE_DEV device.
Signed-off-by: Igor Mammedov
---
hw
do so to avoid not necessary forward declarations and
place typeinfo registration at the file end where it's
usualy expected.
Signed-off-by: Igor Mammedov
---
hw/acpi/piix4.c | 80 +++---
1 files changed, 40 insertions(+), 40 deletions(-)
diff -
On 12/10/2013 10:55 AM, Eduardo Habkost wrote:
> The compiler is capable of eliminating the KVM-specific function calls
> as long as the calling function has an assert(kvm_enabled()) line, so we
> don't need to wrap all KVM-specific code inside #ifdefs.
Really? In tcg/tcg.h we force NDEBUG if not
From: Paolo Bonzini
There should be no need to look them up nor enumerate the interface
"types", whose "classes" are really just vtables. Just create the
types and add them to the interface list of the parent type.
Signed-off-by: Paolo Bonzini
Signed-off-by: Igor Mammedov
---
qom/object.c |
It will allow to reuse field with different BUSes, reducing code duplication.
Field is intended fot replacing 'hotplug_qdev' field in PCIBus and also
will allow to avoid adding equivalent field to DimmBus with possiblitity
to refactor other BUSes to use it instead of custom field.
In addition once
Split piix4_device_hotplug() into hotplug/unplug callbacks
and register them as "hotplug-handler" interface implementation of
PIIX4_PM device.
Replace pci_bus_hotplug() wiring with setting link on
PCI BUS "hotplug-handler" property to PIIX4_PM device.
Signed-off-by: Igor Mammedov
---
hw/acpi/pi
On Wed, Dec 11, 2013 at 12:35 AM, Gerd Hoffmann wrote:
> Hi,
>
>> The biggest changes were in the input handling, where SDL2 has done a major
>> overhaul, and I've had to include a generated translation file to get from
>> SDL2 codes back to qemu compatible ones. I'm still not sure how the keybo
Split shpc_device_hotplug() into hotplug/unplug callbacks
and register them as "hotplug-handler" interface implementation of
PCI_BRIDGE_DEV device.
Replace pci_bus_hotplug() wiring with setting link on PCI BUS
"hotplug-handler" property to PCI_BRIDGE_DEV device.
Signed-off-by: Igor Mammedov
---
make qdev_unplug()/device_set_realized() to call hotplug handler's
plug/unplug methods if available and remove not needed anymore
hot(un)plug handling from PCIDevice.
In case if hotplug handler is not available, revert to the legacy
hotplug method.
Signed-off-by: Igor Mammedov
---
hw/core/qdev.
Get rid of PCIDevice specific PCIDeviceClass.no_hotplug and use
generic DeviceClass.hotplugable field instead.
Check if hot(un)plug is allowed into common qdev_unplug/device_set_realized,
so that inherited classes won't have to do it.
Signed-off-by: Igor Mammedov
---
hw/acpi/piix4.c |
Provide generic hotplug interface for devices.
Intended for replacing hotplug mechanism used by
PCI/PCIE/SHPC code and will be used for memory hotplug.
Signed-off-by: Igor Mammedov
---
v2:
* s/device/handler/
* add hotplug_handler_plug/hotplug_handler_unplug API
v1:
it's scsi-bus like interface
Refactor PCI specific hotplug API to a more generic/reusable one.
Model it after SCSI-BUS like hotplug API replacing single hotplug
callback with hotplug/hot_unplug pair of callbacks as suggested by
Paolo.
Difference between SCSI-BUS and this approach is that the former
is BUS centric while the lat
On Sat, Dec 7, 2013 at 12:41 AM, Peter Maydell wrote:
> On 3 December 2013 07:01, Peter Crosthwaite
> wrote:
>> The reset Value of the CP15 CBAR is a vendor (machine) configurable
>
> no need to capitalize "value" here.
>
Fixed,
Regards,
Peter
>> property. If ARM_FEATURE_CBAR is set, add it as
On Sat, Dec 7, 2013 at 12:12 AM, Peter Maydell wrote:
> On 3 December 2013 07:00, Peter Crosthwaite
> wrote:
>> Some processors (notably A9 within Highbank) define and use the
>> CP15 configuration base address (CBAR). This is vendor specific
>> so its best implemented as a CPU property (otherwis
This resolves the build issue with building the ROMs on OpenBSD on x86 archs.
As of OpenBSD 5.3 the compiler builds PIE binaries by default and thus the
whole OS/packages and so forth. The ROMs need to have PIE disabled. This
is my initial attempt at trying to get somehting upstream so that QEMU
bo
make hpet_find inline so we don't need
to build hpet.c to check if hpet is enabled.
Fixes link error with CONFIG_HPET off.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Michael S. Tsirkin
---
include/hw/timer/hpet.h | 10 +-
hw/timer/hpet.c | 6 --
2 files changed, 9 insertions
avoid hard-coding strings
Signed-off-by: Michael S. Tsirkin
---
hw/i386/pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 29c325e..50de724 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1331,7 +1331,7 @@ void pc_basic_device_init(ISABus
On 10/12/13 1:44 PM, Stefan Weil wrote:
... now with qemu-stable addressed - I had pressed "send" to early.
Ah, I usually send such requests separately with a commit hash after
it has been commited to master.
--
This message has been scanned for viruses and
dangerous content by MailScanner, an
Paolo Bonzini writes:
> Anthony,
>
> the following changes since commit 7dc65c02fe3fb8f3146ce0b9ff5fec5945329f0e:
>
> Open 2.0 development tree (2013-11-27 14:02:45 -0800)
This also conflicts badly.
Regards,
Anthony Liguori
>
> are available in the git repository at:
>
> git://github.com/
Paolo Bonzini writes:
> Anthony,
>
> The following changes since commit ac9524dc55dc32e492ac3e6fbc9785be7168f8a2:
>
> qemu-iotests: filter QEMU monitor \r\n (2013-12-06 16:53:51 +0100)
>
> are available in the git repository at:
>
> git://github.com/bonzini/qemu.git scsi-next
What tree is th
The ability of the new opcodes to byte-swap the memory operation
simplifies the code in and around dec_load and dec_store significantly.
Cc: Edgar E. Iglesias
Signed-off-by: Richard Henderson
---
target-microblaze/translate.c | 139 +++---
1 file changed, 35
Signed-off-by: Richard Henderson
---
target-m68k/translate.c | 59 ++---
1 file changed, 31 insertions(+), 28 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index f54b94a..6b62955 100644
--- a/target-m68k/translate.c
+++ b/
On Tue, Dec 10, 2013 at 11:15:40PM +0100, Laszlo Ersek wrote:
> On 12/10/13 23:13, Laszlo Ersek wrote:
>
> > Please let OVMF know about the big MMIO range (the "split" you mention)
> > - that is going to be advertised via ACPI to the OS,
> > - in an easy to parse format over fw_cfg.
>
> Anyway ju
On Tue, 2013-12-10 at 22:14 +, Peter Maydell wrote:
> Googling again brought up this mailing list thread:
>
> http://www.pcisig.com/reflector/msg00459.html
>
> which includes what is supposedly a quote from the PCI 2.1 spec:
>
> # "Note: A Base Address register does not contain a valid
> #
On 12/09/2013 05:25 PM, Antonios Motakis wrote:
> Add a new QEMU netdev backend that is intended to invoke vhost_net
> with the vhost-user backend. Also decouple virtio-net from the tap
> backend.
>
> Signed-off-by: Antonios Motakis
> Signed-off-by: Nikolay Nikolaev
> ---
> +++ b/include/net/vh
stefa...@redhat.com writes:
> On Mon, Nov 18, 2013 at 12:54:59PM +0800, Chunyan Liu wrote:
>> 2013/11/15 Stefan Hajnoczi
>>
>> > On Thu, Nov 14, 2013 at 04:15:28PM +0800, Chunyan Liu wrote:
>> > > Set NOCOW flag to newly created images to solve performance issues on
>> > btrfs.
>> > This shoul
On 10.12.2013, at 20:44, Greg Kurz wrote:
> On Tue, 10 Dec 2013 18:48:45 +0100
> Alexander Graf wrote:
Yeah, but so far LE switching code is not upstream in KVM - and for TCG
we don't need the cpu_synchronize_state() call at all.
Alex
>>>
>>> Sure, but for TCG,
On 12/10/13 23:13, Laszlo Ersek wrote:
> Please let OVMF know about the big MMIO range (the "split" you mention)
> - that is going to be advertised via ACPI to the OS,
> - in an easy to parse format over fw_cfg.
Anyway just ignore me this time. I test OVMF regularly on fresh qemu
builds and if so
On 10 December 2013 21:42, Michael Roth wrote:
> Quoting Peter Maydell (2013-12-05 17:33:48)
>> And presumably whoever put that specific check for 0 into
>> QEMU had a reason for it.
>>
>> On the other hand I can't now find whatever document it was
>> that I was reading that claimed 0 wasn't valid
On 12/10/13 22:00, Michael S. Tsirkin wrote:
> On Tue, Dec 10, 2013 at 06:46:12PM +0100, Laszlo Ersek wrote:
>> On 12/10/13 16:53, Gerd Hoffmann wrote:
>>> On Di, 2013-12-10 at 16:47 +0100, Laszlo Ersek wrote:
On 12/10/13 15:53, Gerd Hoffmann wrote:
> Hi,
>
>> If we could make a
Signed-off-by: Antony Pavlov
---
target-arm/cpu.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index b60e3fc..b6199c5 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -120,6 +120,11 @@ static void arm_cpu_reset(CPUState *s)
env->
[RFC v2 1/2] ARM: cpu: add "reset_hivecs" property (high vectors on
[RFC v2 2/2] ARM: arm_cpu_reset: make possible to use high vectors
Changes since v1:
* rebase over Peter Crosthwaite's "Fix Support for ARM A9 CBAR" v3 series;
* rewrite according to Peter Crosthwaite's and Peter Maydell's comme
Signed-off-by: Antony Pavlov
---
target-arm/cpu-qom.h | 1 +
target-arm/cpu.c | 24
2 files changed, 25 insertions(+)
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index b55306a..116320c 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -128
Quoting Peter Maydell (2013-12-05 17:33:48)
> On 5 December 2013 22:33, Michael Roth wrote:
> > Some kernels program a 0 address for io regions. PCI 3.0 spec
> > sectio 6.2.5.1 doesn't seem to disallow this.
>
> Hmm. The last PCI spec I looked at said 0 wasn't a valid MMIO
> address, so the varia
On 10/12/13 1:44 PM, Stefan Weil wrote:
... now with qemu-stable addressed - I had pressed "send" to early.
Stefan
Am 10.12.2013 19:42, schrieb Stefan Weil:
Am 10.12.2013 08:48, schrieb Brad Smith:
On 10/12/13 2:07 AM, Stefan Weil wrote:
Am 10.12.2013 02:26, schrieb Brad Smith:
This resolv
Hi Anthony,
There's a fairly nasty regression in OpenBIOS for 1.7 which breaks
booting for SPARC32 disk images, along with a stack underflow which
affects all architectures during boot.
Please can you update the OpenBIOS git-svn mirror on git.qemu.org, and
let me know how to coordinate the p
On Tue, Dec 10, 2013 at 03:21:44PM -0200, Marcelo Tosatti wrote:
> On Tue, Dec 10, 2013 at 01:05:42PM -0200, Marcelo Tosatti wrote:
> > On Tue, Dec 10, 2013 at 02:18:36PM +0100, Paolo Bonzini wrote:
> > > Il 28/11/2013 11:26, Michael S. Tsirkin ha scritto:
> > > > On Mon, Nov 25, 2013 at 06:43:13PM
On Tue, Dec 10, 2013 at 06:46:12PM +0100, Laszlo Ersek wrote:
> On 12/10/13 16:53, Gerd Hoffmann wrote:
> > On Di, 2013-12-10 at 16:47 +0100, Laszlo Ersek wrote:
> >> On 12/10/13 15:53, Gerd Hoffmann wrote:
> >>> Hi,
> >>>
> If we could make a small guset visible change, it would be simpler
On 10/12/13 14:40, Peter Maydell wrote:
On 10 December 2013 14:24, Mark Cave-Ayland
wrote:
I've been running my OpenBIOS test suite on a recent git (commit a1d22a) and
have encountered a QEMU process segfault in 2 out of 3 of my NetBSD 5.0.2
boot attempts. Does anyone have an idea what could
On 12/10/2013 05:31 PM, Paul Moore wrote:
On Tuesday, December 10, 2013 04:48:54 PM Lucas Meneghel Rodrigues wrote:
On 12/10/2013 01:20 AM, Corey Bryant wrote:
IMHO the test suite should probe to see if sandbox is working or not,
and
just not use the "-sandbox on" arg if the host doesn't suppor
On Tue, 10 Dec 2013 18:48:45 +0100
Alexander Graf wrote:
> >>
> >> Yeah, but so far LE switching code is not upstream in KVM - and for TCG
> >> we don't need the cpu_synchronize_state() call at all.
> >>
> >>
> >> Alex
> >
> > Sure, but for TCG, cpu_synchronize_state() does nothing since KVM i
On 12/10/2013 04:48 PM, Lucas Meneghel Rodrigues wrote:
On 12/10/2013 01:20 AM, Corey Bryant wrote:
IMHO the test suite should probe to see if sandbox is working or not,
and
just not use the "-sandbox on" arg if the host doesn't support it.
But I think this could be done on virt-test as well
On Tuesday, December 10, 2013 04:48:54 PM Lucas Meneghel Rodrigues wrote:
> On 12/10/2013 01:20 AM, Corey Bryant wrote:
> >>> IMHO the test suite should probe to see if sandbox is working or not,
> >>> and
> >>> just not use the "-sandbox on" arg if the host doesn't support it.
> >>
> >> But I thi
On Tue, Dec 10, 2013 at 07:03:50PM +0100, Paolo Bonzini wrote:
> Il 10/12/2013 14:15, Eduardo Habkost ha scritto:
> >> > If the total number of the assigned numa nodes memory is not
> >> > equal to the assigned ram size, it will write the wrong data
> >> > to ACPI talb, then the guest will ignore t
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