On 10/24/2013 10:17 PM, Paolo Bonzini wrote:
Il 22/10/2013 04:25, Lei Li ha scritto:
This patch series tries to introduce a mechanism using side
channel pipe for RAM via SCM_RIGHTS with unix domain socket
protocol migration.
This side channel is used for the page flipping by vmsplice,
which is
On 25.10.2013 07:42, Eric Blake wrote:
On 10/25/2013 04:27 AM, Peter Lieven wrote:
Ok, one way direction - i forgot about this paradigm.
2 thoughts:
a) a send-capabilities capability that "stores" the capabilities that where
used when savevm was used. I would implement a special segment
right
On 10/25/2013 04:27 AM, Peter Lieven wrote:
> Ok, one way direction - i forgot about this paradigm.
>
> 2 thoughts:
>
> a) a send-capabilities capability that "stores" the capabilities that where
> used when savevm was used. I would implement a special segment
> right at the beginning of the dat
[adding qemu-trivial]
On 10/25/2013 04:36 AM, Weng Fan wrote:
> From: WengFan
> Date: Wed, 25 Oct 2013 11:18:22 -0400
> Subject: [PATCH 1/1] fix the typo
>
> Signed-off-by: WengFan
> ---
> qemu-master/docs/ccid.txt |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a
On Thu, Oct 24, 2013 at 10:55:54PM +0100, Peter Maydell wrote:
> On 24 October 2013 22:12, Marcelo Tosatti wrote:
> > Align guest physical address and host physical address
> > beyond guest 4GB on a 1GB boundary, in case hugetlbfs is used.
> >
> > Otherwise 1GB TLBs cannot be cached for the range.
On Fri, Oct 25, 2013 at 12:55:36AM +0100, Paolo Bonzini wrote:
> > +if (hpagesize == (1<<30)) {
> > +unsigned long holesize = 0x1ULL - below_4g_mem_size;
> > +
> > +memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g",
> > ram,
> > +
On 10/24/2013 10:07 PM, Paolo Bonzini wrote:
Il 22/10/2013 04:25, Lei Li ha scritto:
Override befor_ram_iterate to send pipefd. It will write the
RAM_SAVE_FLAG_HOOK flags which will trigger the load hook to
receive it.
Signed-off-by: Lei Li
---
migration-local.c | 26 ++
On 10/24/2013 10:15 PM, Paolo Bonzini wrote:
Il 22/10/2013 04:25, Lei Li ha scritto:
Signed-off-by: Lei Li
---
migration.c | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/migration.c b/migration.c
index 4ac466b..568b73a 100644
--- a/migration.c
+++ b/migrati
On 10/24/2013 10:13 PM, Paolo Bonzini wrote:
Il 22/10/2013 04:25, Lei Li ha scritto:
Introduce new RanState RAN_STATE_FLIPPING_MIGRATE and
add it to runstate_needs_reset().
I am not sure about the name; for one thing, the new state would apply
also to postcopy migration.
About the name, how a
On 10/24/2013 10:10 PM, Paolo Bonzini wrote:
Il 22/10/2013 04:25, Lei Li ha scritto:
Relace qemu_fopen_socket with qemu_fopen_socket_local in Unix
protocol migration.
Signed-off-by: Lei Li
---
migration-unix.c | 18 ++
1 files changed, 14 insertions(+), 4 deletions(-)
dif
On 10/24/2013 10:07 PM, Paolo Bonzini wrote:
Il 22/10/2013 04:25, Lei Li ha scritto:
Override befor_ram_iterate to send pipefd. It will write the
RAM_SAVE_FLAG_HOOK flags which will trigger the load hook to
receive it.
Signed-off-by: Lei Li
---
migration-local.c | 26 ++
On 10/24/2013 09:52 PM, Paolo Bonzini wrote:
Il 22/10/2013 04:25, Lei Li ha scritto:
+# @unix-page-flipping: If enabled, QEMU will support localhost migration. This
+# feature allows live upgrade of a running QEMU instance by doing
localhost
+# migration with page flipping. It
On 10/24/2013 09:57 PM, Paolo Bonzini wrote:
Il 22/10/2013 04:25, Lei Li ha scritto:
Signed-off-by: Lei Li
---
qmp-commands.hx |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/qmp-commands.hx b/qmp-commands.hx
index fba15cd..650a3a8 100644
--- a/qmp-commands.hx
On 10/24/2013 09:46 PM, Paolo Bonzini wrote:
Il 22/10/2013 04:25, Lei Li ha scritto:
is_active is used to identify block migration, rename to
is_block_active to make it more clear.
No, is_active is used to identify whether a set of SaveVMHandlers is
active. The default is true, so only block m
From: WengFan
Date: Wed, 25 Oct 2013 11:18:22 -0400
Subject: [PATCH 1/1] fix the typo
Signed-off-by: WengFan
---
qemu-master/docs/ccid.txt |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/qemu-master/docs/ccid.txt b/qemu-master/docs/ccid.txt
index 8bbaa94..83c174d 1006
Am 25.10.2013 um 01:37 schrieb Juan Quintela :
> Peter Lieven wrote:
>> Hi,
>>
>> I was thinking that it would be great to have the source and
>> destination during migration negoatiate
>> migration capabilities e.g. something like this:
>>
>> User wants to use a feature e.g. 'zero_blocks'. He
* A new format is required to generate definitions for ust tracepoints.
Files ust_events_h.py and ust_events_c.py define common macros, while
new function ust_events_h in events.py does the actual definition of
each tracepoint.
* ust.py generates the new interface for calling userspace tracep
Add generation of new files for LTTng ust.
Signed-off-by: Mohamad Gebai
---
Makefile| 5 +
trace/Makefile.objs | 25 +
2 files changed, 30 insertions(+)
diff --git a/Makefile b/Makefile
index b15003f..7935d9b 100644
--- a/Makefile
+++ b/Makefile
@@ -50,6
Signed-off-by: Mohamad Gebai
---
docs/tracing.txt | 36
1 file changed, 36 insertions(+)
diff --git a/docs/tracing.txt b/docs/tracing.txt
index bfc261b..bf2e15c 100644
--- a/docs/tracing.txt
+++ b/docs/tracing.txt
@@ -214,6 +214,42 @@ The "ust" backend uses t
Version 5
* Use pkg-config for lttng-ust and urcu-bp libraries in configure (hard-coded
libraries as a fallback)
* s/Qemu/QEMU in docs/tracing.txt
* Better dependencies for ust-generated files in trace/Makefile.obj
Mohamad Gebai (5):
Fix configure script for LTTng 2.x
Modified the tracetool
Signed-off-by: Mohamad Gebai
---
configure | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/configure b/configure
index 57ee62a..f20ceaa 100755
--- a/configure
+++ b/configure
@@ -3284,15 +3284,25 @@ fi
# For 'ust' backend, test if ust headers are present
Signed-off-by: Mohamad Gebai
Reviewed-by: Alex Bennée
---
.gitignore | 2 ++
1 file changed, 2 insertions(+)
diff --git a/.gitignore b/.gitignore
index 8e1b73f..e024a76 100644
--- a/.gitignore
+++ b/.gitignore
@@ -9,6 +9,8 @@ trace/generated-tracers-dtrace.h
trace/generated-tracers.dtrace
tra
Il 24/10/2013 22:12, Marcelo Tosatti ha scritto:
> Align guest physical address and host physical address
> beyond guest 4GB on a 1GB boundary, in case hugetlbfs is used.
>
> Otherwise 1GB TLBs cannot be cached for the range.
>
> Signed-off-by: Marcelo Tosatti
>
> Index: qemu/hw/i386/pc.c
> ===
On 22/10/2013 8:47 PM, Jia Liu wrote:
Hi Sebastian,
On Tue, Oct 22, 2013 at 8:12 AM, Sebastian Macke wrote:
This series is the first part to make the OpenRISC target more
reliable and faster.
It corrects several severe problems which prevented the OpenRISC emulation
for being useful in the pas
Peter Lieven wrote:
> Hi,
>
> I was thinking that it would be great to have the source and
> destination during migration negoatiate
> migration capabilities e.g. something like this:
>
> User wants to use a feature e.g. 'zero_blocks'. He switches it to 'on'
> or maybe a new state 'auto' on the so
On 24 October 2013 17:26, Tom Musta wrote:
> This patch adds the VSX floating point maximum and minimum
> instructions:
>
> - xsmaxdp, xvmaxdp, xvmaxsp
> - xsmindp, xvmindp, xvminsp
>
> Because of the Power ISA definitions of maximum and minimum
> on various boundary cases, the standard softfl
On 24 October 2013 22:12, Marcelo Tosatti wrote:
> Align guest physical address and host physical address
> beyond guest 4GB on a 1GB boundary, in case hugetlbfs is used.
>
> Otherwise 1GB TLBs cannot be cached for the range.
> +if (hpagesize == (1<<30)) {
> +unsigned long hol
Il 24/10/2013 17:37, Stefan Weil ha scritto:
> Yes, that works, too. It also fixes the problem with the assertion
> (tested with Wine).
>
> No, we cannot remove from_, because the same interface is also used
> for Linux and other hosts which don't have a 'current' variable.
> Or we would have to c
On 10/24/2013 07:39 PM, Peter Lieven wrote:
> Hi,
>
> I was thinking that it would be great to have the source and destination
> during migration negoatiate
> migration capabilities e.g. something like this:
>
> User wants to use a feature e.g. 'zero_blocks'. He switches it to 'on' or
> maybe a
Align guest physical address and host physical address
beyond guest 4GB on a 1GB boundary, in case hugetlbfs is used.
Otherwise 1GB TLBs cannot be cached for the range.
Signed-off-by: Marcelo Tosatti
Index: qemu/hw/i386/pc.c
===
--
From: "Edgar E. Iglesias"
No functional change.
Signed-off-by: Edgar E. Iglesias
---
target-microblaze/translate.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 232015a..021a504 100644
---
On 10/24/2013 02:07 PM, Tom Musta wrote:
>
> See, for example, table 58 (Actions for xsmaxdp) on p. 369 of the
> V2.06 ISA.
Bah, I typoed my search in the document and looked at the Altivec insn, which
is only one letter different, and doesn't have the same guarantees.
Reviewed-by: Richard Hende
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
---
hw/microblaze/boot.c | 39 +-
hw/microblaze/boot.h |4 ++-
hw/microblaze/petalogix_ml605_mmu.c |1 +
hw/microblaze/petalogix_s3adsp1800_mmu.c |4
See individual patches for details.
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
---
hw/microblaze/boot.c | 11 ++-
hw/microblaze/petalogix_ml605_mmu.c |5 +++--
hw/microblaze/petalogix_s3adsp1800_mmu.c |2 +-
3 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/
Add helper to retrieve page size of RAM backing, when hugetlbfs
is used.
Signed-off-by: Marcelo Tosatti
Index: git/qemu/exec.c
===
--- qemu.orig/exec.c
+++ qemu/exec.c
@@ -961,8 +961,27 @@ static void *file_ram_alloc(RAMBlock *bl
From: "Edgar E. Iglesias"
This improves the reservation check for system emulation, making
it possible to catch stores that modify reserved word.
Signed-off-by: Edgar E. Iglesias
---
target-microblaze/cpu.h |1 +
target-microblaze/translate.c | 16
2 files changed,
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
---
target-microblaze/translate.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 021a504..57627fc 100644
--- a/target-microblaze/tr
From: "Edgar E. Iglesias"
Microblaze carry is mirrored in MSR[31], pick it directly from
there. Also, no need to mask cpu_R[dc->ra] when calling
write_carry.
15% improvement in linux-user src loops.
Signed-off-by: Edgar E. Iglesias
---
target-microblaze/translate.c | 15 ---
1 f
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
---
target-microblaze/translate.c |4
1 file changed, 4 insertions(+)
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 1b937b3..76b2570 100644
--- a/target-microblaze/translate.c
+++ b/target-mi
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
---
target-microblaze/translate.c |5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index d183e17..916db15 100644
--- a/target-microblaze/translate.c
From: "Edgar E. Iglesias"
write_carry only looks at bit zero, no need to mask out the others.
Meassured a 12% speed improvement in linux-user srl loops.
Signed-off-by: Edgar E. Iglesias
---
target-microblaze/translate.c |7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --g
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
---
target-microblaze/translate.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 76b2570..d183e17 100644
--- a/target-microblaze/translate.c
From: "Edgar E. Iglesias"
Hi,
These are various MicroBlaze patches sitting in my queue.
A few optimizations, sysemu initrd boot loading support and improvement to
the exclusive load/store for system emulation.
Cheers,
Edgar
Edgar E. Iglesias (10):
microblaze: Clarify expected input of write_
On 10/24/2013 3:45 PM, Richard Henderson wrote:
On 10/24/2013 09:26 AM, Tom Musta wrote:
Because of the Power ISA definitions of maximum and minimum
on various boundary cases, the standard softfloat comparison
routines (e.g. float64_lt) do not work as well as one might
think. Therefore specific
On 10/24/2013 01:42 PM, Tom Musta wrote:
>
> Unless you are suggesting that the decoded VSR index (0..63) be passed to the
> helper?
It was a thought. I'll leave the ultimate decision to ppc maintainers.
The insns setting cr6 and crf[BF] get more complicated, but in general those
could be handl
On 10/24/2013 09:28 AM, Tom Musta wrote:
> This patch adds the VSX Round to Floating Point Integer instructions:
>
> - xsrdpi, xsrdpic, xsrdpim, xsrdpip, xsrdpiz
> - xvrdpi, xvrdpic, xvrdpim, xvrdpip, xvrdpiz
> - xvrspi, xvrspic, xvrspim, xvrspip, xvrspiz
>
> Signed-off-by: Tom Musta
> ---
On 10/24/2013 09:27 AM, Tom Musta wrote:
> This patch adds the VSX Integer Conversion instructions defined by
> V2.06 of the PowerPC ISA:
>
> - xscvdpsxds, xscvdpsxws, xscvdpuxds, xscvdpuxws
> - xvcvdpsxds, xvcvdpsxws, xvcvdpuxds, xvcvdpuxws
> - xvcvspsxds, xvcvspsxws, xvcvspuxds, xvcvspuxw
On 10/24/2013 09:26 AM, Tom Musta wrote:
> Because of the Power ISA definitions of maximum and minimum
> on various boundary cases, the standard softfloat comparison
> routines (e.g. float64_lt) do not work as well as one might
> think. Therefore specific routines for comparing 64 and 32
> bit flo
On 10/24/2013 09:27 AM, Tom Musta wrote:
> This patch adds the VSX instructions that convert between floating
> point formats: xscvdpsp, xscvspdp, xvcvdpsp, xvcvspdp.
>
> Signed-off-by: Tom Musta
> ---
Reviewed-by: Richard Henderson
r~
On 10/24/2013 1:51 PM, Richard Henderson wrote:
On 10/24/2013 09:19 AM, Tom Musta wrote:
+#define GEN_VSX_HELPER_2(name, op1, op2, inval, type) \
+static void gen_##name(DisasContext * ctx)\
+{
On 10/24/2013 09:25 AM, Tom Musta wrote:
> This patch adds the VSX scalar floating point compare ordered
> and unordered instructions.
>
> Signed-off-by: Tom Musta
> ---
Reviewed-by: Richard Henderson
r~
On 10/24/2013 09:25 AM, Tom Musta wrote:
>\
> +ft0 = tp##_to_##btp(xa.fld[i], &env->fp_status);
> \
> +ft1 = tp##_to_##btp(m->fld[i], &env->fp_status);
> \
> +ft0 = btp##_mul(ft0,
On 10/24/2013 09:24 AM, Tom Musta wrote:
> This patch adds the VSX floating point test for software square
> root instructions defined by V2.06 of the PowerPC ISA: xstsqrtdp,
> xvtsqrtdp, xvtsqrtsp.
>
> Signed-off-by: Tom Musta
> ---
Reviewed-by: Richard Henderson
r~
On 10/24/2013 09:23 AM, Tom Musta wrote:
> This patch adds the VSX floating point reciprocal square root
> estimate instructions defined by V2.06 of the PowerPC ISA: xsrsqrtedp,
> xvrsqrtedp, xvrsqrtesp.
>
> Signed-off-by: Tom Musta
> ---
Reviewed-by: Richard Henderson
r~
On 10/24/2013 09:23 AM, Tom Musta wrote:
> This patch adds the VSX floating point test for software divide
> instructions defined by V2.06 of the PowerPC ISA: xstdivdp, xvtdivdp,
> and xvtdivsp.
>
> Signed-off-by: Tom Musta
> ---
Reviewed-by: Richard Henderson
r~
On 10/24/2013 09:22 AM, Tom Musta wrote:
> This patch adds the VSX floating point square root instructions
> defined by V2.06 of the PowerPC ISA: xssqrtdp, xvsqrtdp, xvsqrtsp.
>
> Signed-off-by: Tom Musta
> ---
Reviewed-by: Richard Henderson
r~
On 10/24/2013 09:22 AM, Tom Musta wrote:
> This patch adds the VSX floating point reciprocal estimate instructions
> defined by V2.06 of the PowerPC ISA: xsredp, xvredp, xvresp.
>
> Signed-off-by: Tom Musta
> ---
Reviewed-by: Richard Henderson
r~
On 10/24/2013 09:21 AM, Tom Musta wrote:
> This patch adds the VSX floating point divide instructions defined
> by V2.06 of the PowerPC ISA: xsdivdp, xvdivdp, xvdivsp.
>
> Signed-off-by: Tom Musta
> ---
Reviewed-by: Richard Henderson
r~
On 10/24/2013 09:21 AM, Tom Musta wrote:
> This patch adds the VSX floating point multiply instructions defined
> by V2.06 of the PowerPC ISA: xsmuldp, xvmuldp, xvmulsp.
>
> Signed-off-by: Tom Musta
> ---
Reviewed-by: Richard Henderson
r~
On 10/24/2013 09:20 AM, Tom Musta wrote:
> This patch adds the floating point subtraction instructions defined
> by V2.06 of the PowerPC ISA: xssubdp, xvsubdp and xvsubsp.
>
> Signed-off-by: Tom Musta
> ---
Reviewed-by: Richard Henderson
r~
On 10/24/2013 09:20 AM, Tom Musta wrote:
> This patch adds the VSX floating point add instructions that are
> defined by V2.06 of the PowerPC ISA: xsadddp, xvadddp and xvaddsp.
>
> Signed-off-by: Tom Musta
Reviewed-by: Richard Henderson
r~
> Live cloning is a disaster waiting to happen if not done in a very
> carefully controlled environment (I could maybe see it useful across two
> private networks for forensic analysis or running "what-if" scenarios,
> but never for provisioning enterprise-quality public-facing servers).
> Remember
On 10/24/2013 09:19 AM, Tom Musta wrote:
>
> +#define GEN_VSX_HELPER_2(name, op1, op2, inval, type)
> \
> +static void gen_##name(DisasContext * ctx)
> \
> +{
>
On 10/24/2013 09:17 AM, Tom Musta wrote:
> This patch adds routines to the softfloat library that are useful for
> the PowerPC VSX implementation. The routines are, however, not specific
> to PowerPC and are approprriate for softfloat.
>
> The following routines are added:
>
> - float32_is_den
Hi,
I was thinking that it would be great to have the source and destination during
migration negoatiate
migration capabilities e.g. something like this:
User wants to use a feature e.g. 'zero_blocks'. He switches it to 'on' or maybe
a new state 'auto' on the source VM.
If the migration is sta
Opening the qcow2 image with BDRV_O_NO_FLUSH prevents any flushes during
the image creation. This means that the image has not yet been flushed
to disk when qemu-img create exits. This flush is delayed until the next
operation on the image involving opening it without BDRV_O_NO_FLUSH and
closing (o
On 2013-10-24 20:24, Max Reitz wrote:
Add a test for saving a VM state from a qcow2 image and loading it back
(with having restarted qemu in between); this should work without any
problems.
Signed-off-by: Max Reitz
---
v2: Included test output 068.out in patch.
Max
Add a test for saving a VM state from a qcow2 image and loading it back
(with having restarted qemu in between); this should work without any
problems.
Signed-off-by: Max Reitz
---
tests/qemu-iotests/068 | 65 ++
tests/qemu-iotests/068.out | 11 +++
The verification of this Stable Release Update has completed
successfully and the package has now been released to -updates.
Subsequently, the Ubuntu Stable Release Updates Team is being
unsubscribed and will not receive messages about this bug report. In
the event that you encounter a regression
This bug was fixed in the package qemu-kvm - 1.0+noroms-0ubuntu14.12
---
qemu-kvm (1.0+noroms-0ubuntu14.12) precise-proposed; urgency=low
* migration-do-not-overwrite-zero-pages.patch,
call-madv-hugepage-for-guest-ram-allocations.patch:
Fix performance degradation after migr
Disallow the guest to cause us to address the data3 and status3 arrays
out of bounds.
Signed-off-by: Hans de Goede
---
hw/usb/dev-uas.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/hw/usb/dev-uas.c b/hw/usb/dev-uas.c
index 70f41d3..5884035 100644
--- a/hw/usb/dev-uas.c
+++
It is easier to simply make the arrays one larger, rather then
substracting one everywhere.
Signed-off-by: Hans de Goede
---
hw/usb/dev-uas.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/usb/dev-uas.c b/hw/usb/dev-uas.c
index 12d79ef..70f41d3 100644
--- a/hw/usb/d
Regular scsi cmds should always report their status using a sense-iu, using
the sense code to report any errors.
Signed-off-by: Hans de Goede
---
hw/usb/dev-uas.c | 30 ++
1 file changed, 22 insertions(+), 8 deletions(-)
diff --git a/hw/usb/dev-uas.c b/hw/usb/dev-uas
Signed-off-by: Hans de Goede
---
hw/scsi/scsi-bus.c | 10 ++
include/hw/scsi/scsi.h | 4
2 files changed, 14 insertions(+)
diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c
index 24ec52f..2414696 100644
--- a/hw/scsi/scsi-bus.c
+++ b/hw/scsi/scsi-bus.c
@@ -1293,6 +1293,11 @@
-The correct error if we cannot find the dev is INCORRECT_LUN rather then
INVALID_INFO_UNIT
-Move the device not found check to the top so we only need to do it once
-Remove the dev->lun != lun checks, dev is returned by scsi_device_find
which searches by lun, so this will never trigger
Signed-o
Hi Gerd et al,
Here is a bunch of uas fixes, they are hopefully self
explanatory...
Regards,
Hans
This patch adds the VSX floating point test for software divide
instructions defined by V2.06 of the PowerPC ISA: xstdivdp, xvtdivdp,
and xvtdivsp.
Signed-off-by: Tom Musta
---
target-ppc/fpu_helper.c | 55 +++
target-ppc/helper.h |3 ++
tar
Am 24.10.2013 12:38, schrieb Paolo Bonzini:
> Il 23/10/2013 21:26, Stefan Weil ha scritto:
>> Am 23.10.2013 11:00, schrieb Paolo Bonzini:
>>> Il 23/10/2013 08:39, Michael W. Bombardieri ha scritto:
Hi,
My newly built qemu/win32 binary (v1.6.1) crashes in qemu-system-i386 and
qe
This patch adds the VSX floating point reciprocal estimate instructions
defined by V2.06 of the PowerPC ISA: xsredp, xvredp, xvresp.
Signed-off-by: Tom Musta
---
target-ppc/fpu_helper.c | 35 +++
target-ppc/helper.h |3 +++
target-ppc/translate.c |
This patch adds the VSX Integer Conversion instructions defined by
V2.06 of the PowerPC ISA:
- xscvdpsxds, xscvdpsxws, xscvdpuxds, xscvdpuxws
- xvcvdpsxds, xvcvdpsxws, xvcvdpuxds, xvcvdpuxws
- xvcvspsxds, xvcvspsxws, xvcvspuxds, xvcvspuxws
- xscvsxddp, xscvuxddp
- xvcvsxddp, xscvsxwdp,
This patch adds the VSX Round to Floating Point Integer instructions:
- xsrdpi, xsrdpic, xsrdpim, xsrdpip, xsrdpiz
- xvrdpi, xvrdpic, xvrdpim, xvrdpip, xvrdpiz
- xvrspi, xvrspic, xvrspim, xvrspip, xvrspiz
Signed-off-by: Tom Musta
---
target-ppc/fpu_helper.c | 68 +++
This patch adds the VSX instructions that convert between floating
point formats: xscvdpsp, xscvspdp, xvcvdpsp, xvcvspdp.
Signed-off-by: Tom Musta
---
target-ppc/fpu_helper.c | 46 ++
target-ppc/helper.h |4
target-ppc/translate.c |
This patch adds the VSX floating point multiply/add instructions
defined by V2.06 of the PowerPC ISA:
- xsmaddadp, xvmaddadp, xvmaddasp
- xsmaddmdp, xvmaddmdp, xvmaddmsp
- xsmsubadp, xvmsubadp, xvmsubasp
- xsmsubmdp, xvmsubmdp, xvmsubmsp
- xsnmaddadp, xvnmaddadp, xvnmaddasp
-
This patch adds the VSX floating point compare vector instructions:
- xvcmpeqdp[.], xvcmpgedp[.], xvcmpgtdp[.]
- xvcmpeqsp[.], xvcmpgesp[.], xvcmpgtsp[.]
Signed-off-by: Tom Musta
---
target-ppc/fpu_helper.c | 58 +++
target-ppc/helper.h |
This patch adds the VSX floating point maximum and minimum
instructions:
- xsmaxdp, xvmaxdp, xvmaxsp
- xsmindp, xvmindp, xvminsp
Because of the Power ISA definitions of maximum and minimum
on various boundary cases, the standard softfloat comparison
routines (e.g. float64_lt) do not work as
This patch adds the VSX scalar floating point compare ordered
and unordered instructions.
Signed-off-by: Tom Musta
---
target-ppc/fpu_helper.c | 39 +++
target-ppc/helper.h |2 ++
target-ppc/translate.c |4
3 files changed, 45 insertions(+
This patch adds the VSX floating point test for software square
root instructions defined by V2.06 of the PowerPC ISA: xstsqrtdp,
xvtsqrtdp, xvtsqrtsp.
Signed-off-by: Tom Musta
---
target-ppc/fpu_helper.c | 52 +++
target-ppc/helper.h |3 ++
This patch adds the VSX floating point square root instructions
defined by V2.06 of the PowerPC ISA: xssqrtdp, xvsqrtdp, xvsqrtsp.
Signed-off-by: Tom Musta
---
target-ppc/fpu_helper.c | 43 +++
target-ppc/helper.h |3 +++
target-ppc/translate.c
This patch adds the VSX floating point reciprocal square root
estimate instructions defined by V2.06 of the PowerPC ISA: xsrsqrtedp,
xvrsqrtedp, xvrsqrtesp.
Signed-off-by: Tom Musta
---
target-ppc/fpu_helper.c | 44
target-ppc/helper.h |3 +
This patch adds the VSX floating point divide instructions defined
by V2.06 of the PowerPC ISA: xsdivdp, xvdivdp, xvdivsp.
Signed-off-by: Tom Musta
---
target-ppc/fpu_helper.c | 52 +++
target-ppc/helper.h |3 ++
target-ppc/translate.c |
This patch adds the VSX floating point multiply instructions defined
by V2.06 of the PowerPC ISA: xsmuldp, xvmuldp, xvmulsp.
Signed-off-by: Tom Musta
---
target-ppc/fpu_helper.c | 47 +++
target-ppc/helper.h |3 +++
target-ppc/translate.c |
This patch adds the floating point subtraction instructions defined
by V2.06 of the PowerPC ISA: xssubdp, xvsubdp and xvsubsp.
Signed-off-by: Tom Musta
---
target-ppc/fpu_helper.c | 46 ++
target-ppc/helper.h |3 +++
target-ppc/translate.c
This patch adds general support that will be used by the VSX helper
routines:
- a union describing the various VSR subfields.
- access routines to get and set VSRs
- VSX decoders
- a general routine to generate a handler that invokes a VSX
helper.
Signed-off-by: Tom Musta
---
targe
This patch adds the VSX floating point add instructions that are
defined by V2.06 of the PowerPC ISA: xsadddp, xvadddp and xvaddsp.
Signed-off-by: Tom Musta
---
target-ppc/fpu_helper.c | 46 ++
target-ppc/helper.h |6 ++
target-ppc/tran
The fload_invalid_op_excp() function sets assorted invalid
operation status bits. However, it also implicitly modifies
the FPRF field of the PowerPC FPSCR. Many VSX instructions
set invalid operation bits but do not alter FPRF. Thus the
function is more generally useful if the setting of the FP
This patch adds routines to the softfloat library that are useful for
the PowerPC VSX implementation. The routines are, however, not specific
to PowerPC and are approprriate for softfloat.
The following routines are added:
- float32_is_denormal() returns true if the 32-bit floating point numb
This is the third series of patches to add PowerPC VSX emulation support
to QEMU.
This series adds the floating point arithmetic, compare, conversion and
rounding instructions. Instructions are implemented using helpers and
wherever practical, existing floating point code such as the softfloat
l
This adds a command "info vmstate" for dumping a textual representation
of the currently registered VMStateDescriptions.
Being purely for debugging, intentionally no QMP schema is set in stone.
Drawback is that conversations from savevm to VMState show up as
differences when comparing outputs and
Il 24/10/2013 11:06, Peter Lieven ha scritto:
> this patch adds the ability for targets to stay sparse during
> block migration (if the zero_blocks capability is set) and qemu-img convert
> even if the target does not have has_zero_init = 1.
>
> the series was especially developed for iSCSI, but i
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