Hi,
I was trying to figure out how SIGUSR1 is been handled by QEMU as I am getting
multiple SIGUSR1 in my trace when I run the guest .
If anyone could guide me on this, that would be of great help.
Thanks & Regards
Nitesh Narayan Lal
This series introduces a new simulated device, pvpanic, to notify
qemu when guest panic event happens.
Along with this series, there are two patches to add seabios ACPI
driver and kernel ACPI driver for the device, respectively.
Tested with:
- qemu(kvm)/qemu(tcg)
- qemu piix/q35
- default
Also parse command line options for ioport and set
it accordingly.
Signed-off-by: Hu Tao
---
hw/i386/pc_piix.c | 2 ++
hw/i386/pc_q35.c | 1 +
hw/pc.h | 4
hw/pvpanic.c | 42 ++
vl.c | 2 ++
5 files changed, 51 inserti
This lets seabios patch the corresponding SSDT entry.
Signed-off-by: Hu Tao
---
hw/fw_cfg.c | 8 +++-
hw/fw_cfg.h | 2 ++
hw/pvpanic.c | 14 ++
3 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/hw/fw_cfg.c b/hw/fw_cfg.c
index 63a1998..0bde436 100644
--- a/hw/fw_c
The guest will be in this state when it is panicked.
Signed-off-by: Wen Congyang
Signed-off-by: Hu Tao
---
include/sysemu/sysemu.h | 1 +
qapi-schema.json| 5 -
qmp.c | 3 +--
vl.c| 13 +++--
4 files changed, 17 insertions(+), 5 delet
pvpanic device is used to send guest panic event from guest to qemu.
When guest panic happens, pvpanic device driver will write a event
number to IO port 0x505(which is the IO port occupied by pvpanic device,
by default). On receiving the event, pvpanic device will pause guest
cpu(s), and send a q
Signed-off-by: Hu Tao
---
docs/specs/pvpanic.txt | 37 +
1 file changed, 37 insertions(+)
create mode 100644 docs/specs/pvpanic.txt
diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt
new file mode 100644
index 000..d72d667
--- /dev/null
+++ b/do
This event will be emited when qemu detects guest panic.
Signed-off-by: Wen Congyang
Signed-off-by: Hu Tao
---
QMP/qmp-events.txt| 14 ++
include/monitor/monitor.h | 1 +
monitor.c | 1 +
3 files changed, 16 insertions(+)
diff --git a/QMP/qmp-events.txt b/
I've tried , no difference. Same result for puppy, centos and fedora.
CPU seems to be 99% used and nothing happens.
On 04/04/2013 03:17 PM, Peter Maydell wrote:
On 4 April 2013 14:11, Aurelien Jarno wrote:
qemu-system-i386 is likely to be broken on arm hosts, I have never been
able to boot a L
On Tue, Apr 02, 2013 at 09:02:02AM +, Zhanghaoyu (A) wrote:
> I start a kvm VM with vnc(using the zrle protocol) connect, sometimes qemu
> program crashed during starting period, received signal SIGABRT.
> Trying about 20 times, this crash may be reproduced.
> I guess the cause memory corrupti
here, we will handle power state transition between
on, off, suspend, wakeup, we treat reset as power
on then off, and power out pin will be connected to
power in pin of devices, if we want a transition,
we will trigger a power signal(qemu_irq), then all
connected devices will be reply for this.
S
Signed-off-by: liguang
---
vl.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/vl.c b/vl.c
index aeed7f4..a14549e 100644
--- a/vl.c
+++ b/vl.c
@@ -171,6 +171,8 @@ int main(int argc, char **argv)
#include "ui/qemu-spice.h"
#include "qapi/string-input-visitor.h"
+#i
realize wakeup function for ICH9-LPC device
Signed-off-by: liguang
---
hw/acpi.c | 20 +---
hw/acpi.h |3 ++-
hw/acpi_ich9.c |2 +-
hw/ich9.h |2 ++
hw/lpc_ich9.c | 31 ++-
5 files changed, 44 insertions(+), 14 deletions
By now, all devices of QEMU do not have much more
power management consideration, for example, if
system do suspend, it will call all registered notifiers,
this was loosely required, and the code to do power management
state transition seems just do 'ugly emulation', rather than be
conscious with w
Signed-off-by: liguang
---
include/sysemu/sysemu.h |7 +--
1 files changed, 1 insertions(+), 6 deletions(-)
diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h
index 6578782..83796b3 100644
--- a/include/sysemu/sysemu.h
+++ b/include/sysemu/sysemu.h
@@ -9,6 +9,7 @@
#include "
run power_management temporarily,
later, if this approach is accepted,
will try to replace main_loop_should_exit()
Signed-off-by: liguang
---
vl.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/vl.c b/vl.c
index a14549e..731158a 100644
--- a/vl.c
+++ b/vl.c
@@ -2041,6 +
so, devices can connect power signal with power chip
Signed-off-by: liguang
---
hw/qdev-core.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/hw/qdev-core.h b/hw/qdev-core.h
index 547fbc7..abbb570 100644
--- a/hw/qdev-core.h
+++ b/hw/qdev-core.h
@@ -121,6 +121,7 @@ stru
define struct IRQState in irq.c bring in
a annoying result, if you want dereference of
IRQState's member like opaque outside of
irq.c, compiler will complain:
"error: dereferencing pointer to incomplete type"
Signed-off-by: liguang
---
hw/irq.c |6 --
hw/irq.h |6 ++
2 files chan
Hi Paolo & Co,
So I've been running into another bug with SeaBIOS w/ virtio-scsi +
vhost-scsi-pci code..
During the last weeks debugging on the QEMU vhost memory re-mapping bug,
my seabios builds have been using a smaller target ID (16) for scanning
than the default hard coded value of 256 in ini
On 04/04/2013 04:57:32 AM, Artyom Tarasenko wrote:
On Thu, Apr 4, 2013 at 11:50 AM, Alexander Graf wrote:
>
> On 04.04.2013, at 11:46, Artyom Tarasenko wrote:
>
>> On Thu, Apr 4, 2013 at 10:37 AM, Fabien Chouteau
wrote:
>>>
>>> On 04/03/2013 06:59 PM, Alexander Graf wrote:
On 03.04
On Thu, Apr 04, 2013 at 07:55:02AM +0200, Peter Lieven wrote:
> On 02.04.2013 23:45, Michael Roth wrote:
> >Hi everyone,
> >
> >The following new patches are queued for QEMU stable v1.4.1:
> >
> >https://github.com/mdroth/qemu/commits/stable-1.4-staging
> >
> >The release is planned for 04-15-2013:
Allow the clock_gettime() code using monotonic clock to be utilized on
more POSIX compliannt OS's. This started as a fix for OpenBSD which was
listed in one function as part of the previous hard coded list of OS's
for the functions to support but not in the other.
Signed-off-by: Brad Smith
Review
Brad Smith writes:
> On Wed, Apr 03, 2013 at 03:22:24PM -0400, Brad Smith wrote:
>> On Wed, Apr 03, 2013 at 10:18:51AM +0200, Paolo Bonzini wrote:
>> > Il 03/04/2013 00:52, Peter Maydell ha scritto:
>> > > On 2 April 2013 17:45, Paolo Bonzini wrote:
>> > >> Il 02/04/2013 17:42, Brad Smith ha scr
Improve constant addition -- previously we'd emit useless addi with 0.
Use new constraints to force the driver to pull full 64-bit constants
into a register.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 108 +
1 file changed, 64 in
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 27 +++
tcg/ppc64/tcg-target.h | 4 ++--
2 files changed, 29 insertions(+), 2 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index b134029..9583cf9 10064
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 39 +++
tcg/ppc64/tcg-target.h | 4 ++--
2 files changed, 41 insertions(+), 2 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 0cb1667..1
On Fri, Apr 5, 2013 at 3:13 AM, Brendan Dolan-Gavitt
wrote:
> In target-i386 cpu_get_phys_page_debug, the CR4_PAE bit is checked
> before CR0_PG. This means that if paging is disabled but the PAE bit has
> been set in CR4, cpu_get_phys_page_debug will return the wrong result
> (it will try to tran
On Thu, Apr 04, 2013 at 09:52:31AM +0200, Laszlo Ersek wrote:
> On 04/03/13 22:05, Anthony Liguori wrote:
> > Laszlo Ersek writes:
> >> Any chance patches 01 to 09 could be considered? Esp. 06 which removes
> >> an out-of-bounds access (an innocent-looking one, admittedly).
> >>
> >> I'm OK too if
In target-i386 cpu_get_phys_page_debug, the CR4_PAE bit is checked
before CR0_PG. This means that if paging is disabled but the PAE bit has
been set in CR4, cpu_get_phys_page_debug will return the wrong result
(it will try to translate the address as virtual rather than using it as
a physical addre
The TCG optimizer does great work when inserting constants, being able
to fold the open-coded deposit expansion to just an AND or an OR. Avoid
a bit the regression caused by having the deposit opcode by expanding
deposit of zero as an AND.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-targ
> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, April 04, 2013 5:52 PM
> To: Yoder Stuart-B08248
> Cc: Alex Williamson; Wood Scott-B07421; ag...@suse.de; Bhushan Bharat-R65777;
> Sethi Varun-B16395;
> k...@vger.kernel.org; qemu-devel@nongnu.org; io...@lists.linux-foundat
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 59 ++
tcg/ppc64/tcg-target.h | 4 ++--
2 files changed, 61 insertions(+), 2 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index
Since we have special code to handle and/or/xor with a constant,
apply the same to andc/orc/eqv with a constant.
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 44 ++--
1 file changed, 34 insertions(+), 10 deleti
There are a few simple special cases that should be handled first.
Break these out to subroutines to avoid code duplication.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 181 -
1 file changed, 119 insertions(+), 62 deletions(-)
di
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 56 ++
tcg/ppc64/tcg-target.h | 4 ++--
2 files changed, 58 insertions(+), 2 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 12
tcg/ppc64/tcg-target.h | 4 ++--
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 7c326c5..909ba3c 100644
--- a/tcg/ppc
It takes half the cycles to read one CR register instead of all 8.
This is a backward compatible addition to the ISA, so chips prior
to Power 2.00 spec will simply continue to read the entire CR register.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 12
1 file chang
Glibc 2.16 includes an easy way to get feature bits previously
buried in /proc or the program startup auxiliary vector. Use it.
Signed-off-by: Richard Henderson
---
configure | 18 ++
tcg/ppc64/tcg-target.c | 16 +++-
2 files changed, 33 insertions(+), 1
Nothing else in the call chain ensures that these
constants don't have garbage in the high bits.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index edb2b6c..27d5ea5 100644
---
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 35 +++
tcg/ppc64/tcg-target.h | 2 +-
2 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index ee035fd..1352852
The optimization/bug being fixed is that tcg_out_cmp was not applying the
right type to loading a constant, in the case it can't be implemented
directly. Rather than recomputing the TCGType enum from the arch64 bool,
pass around the original TCGType throughout.
Reviewed-by: Aurelien Jarno
Signed
Mostly copied from the ppc32 port.
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 34 ++
tcg/ppc64/tcg-target.h | 20 ++--
2 files changed, 44 insertions(+), 10 deletions(-)
diff --git a/tcg/ppc64/tcg-ta
Use RLWINM
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 50 +-
tcg/ppc64/tcg-target.h | 6 --
2 files changed, 53 insertions(+), 3 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-
The mul_i32 pattern was loading non-16-bit constants into a register,
when we can get the middle-end to do that for us. The mul_i64 pattern
was not considering that MULLI takes 64-bit inputs.
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 24 +
Using SUBFIC for 16-bit signed constants.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 384946b..4da969f 100644
--- a/tcg/ppc64/tcg-targe
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 43 +++
tcg/ppc64/tcg-target.h | 8
2 files changed, 47 insertions(+), 4 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 18338a2..ee035fd 100644
--- a/t
Use RLDICL and RLDICR.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 64 +++---
1 file changed, 50 insertions(+), 14 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 1b0563f..1bd456a 100644
--- a/tcg/ppc6
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 143 -
1 file changed, 70 insertions(+), 73 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 82e1da7..b12cbec 100644
--- a/tcg
Using a table to look up insns of the right width and sign.
Include support for the Power 2.06 LDBRX and STDBRX insns.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 166 +
1 file changed, 56 insertions(+), 110 deletions(-)
diff --g
Handle constants in common code; we'll want to reuse that later.
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 55 --
1 file changed, 31 insertions(+), 24 deletions(-)
diff --git a/tcg/ppc64/tcg-target.
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 9199ac4..82e1da7 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-targ
We'll need a zero, and Z makes more sense for that. Make sure we
have a full compliment of signed and unsigned 16 and 32-bit tests.
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 43 +--
1 file changed, 33 inser
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 36 +---
1 file changed, 21 insertions(+), 15 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 833fe0c..762ca1b 100644
--- a/tcg/ppc64/tcg-tar
The test for using movi32 was sub-optimal for TCG_TYPE_I32, comparing
a signed 32-bit quantity against an unsigned 32-bit quantity.
When possible, use addi+oris for 32-bit unsigned constants. Otherwise,
standardize on addi+oris+ori instead of addis+ori+rldicl.
Reviewed-by: Aurelien Jarno
Signed
The enhancements to and immediate obviate this.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 5 -
tcg/ppc64/tcg-target.h | 6 +++---
2 files changed, 3 insertions(+), 8 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 1bd456a..71d72b4 100644
-
We weren't ignoring the high 32 bits during a NE comparison.
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index b12cbec..822eb07 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 72 ++
1 file changed, 20 insertions(+), 52 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 762ca1b..3587d0e 100644
--- a/tcg
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 84e30ad..9199ac4 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg
Changes v3-v4:
There were two problems, both related to the setcond opcode:
* The first was pre-existing: the current code gets 32-bit NE wrong,
failing to ignore the high 32-bits of the register. This problem
caused the rest of the patch set to be non-bisectable -- any non-
trivia
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
tcg/ppc64/tcg-target.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 3587d0e..84e30ad 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/
Reviewed-by: Aurelien Jarno
Signed-off-by: Richard Henderson
---
disas.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/disas.c b/disas.c
index 74d3ba0..67103e0 100644
--- a/disas.c
+++ b/disas.c
@@ -325,6 +325,7 @@ void disas(FILE *out, void *code, unsigned long size)
s.info.mach = bf
On 04/04/2013 04:38:44 PM, Yoder Stuart-B08248 wrote:
> > /*
> > * VFIO_PAMU_MAP_MSI_BANK
> > *
> > * Maps the MSI bank at the specified index and iova. User space
must
> > * call this ioctl once for each MSI bank (count of banks is
returned by
> > * VFIO_IOMMU_GET_MSI_BANK_COUNT).
>
On Thu, Apr 04, 2013 at 04:18:27PM +0200, Stefan Hajnoczi wrote:
> Backported to QEMU 1.4 stable branch.
>
> Original series:
> http://lists.nongnu.org/archive/html/qemu-devel/2013-03/msg04756.html
>
> v2:
> * Use git cherry-pick -x and give rationale for conflict resolutions.
Applied to the 1.
On 4 April 2013 23:32, Alexander Graf wrote:
> Am 04.04.2013 um 18:52 schrieb Peter Maydell :
>
>> On 4 April 2013 17:51, Alexander Graf wrote:
>>>
>>> On 04.04.2013, at 18:41, Peter Maydell wrote
No, in general this isn't what -bios does. Usually -bios means
"take a blob and put it whe
Am 04.04.2013 um 18:52 schrieb Peter Maydell :
> On 4 April 2013 17:51, Alexander Graf wrote:
>>
>> On 04.04.2013, at 18:41, Peter Maydell wrote
>>> No, in general this isn't what -bios does. Usually -bios means
>>> "take a blob and put it wherever this board expects to have
>>> a ROM or flash
Am 04.04.2013 um 21:06 schrieb Andreas Färber :
> Am 04.04.2013 18:47, schrieb Alexander Graf:
>> On -M mac99, we can run 970 CPUs. However, these CPUs define the initial
>> instruction pointer they start execution at as part of their bootup protocol,
>> so effectively it's up to the board to de
On Wed, Apr 03, 2013 at 11:51:31PM +0200, Aurelien Jarno wrote:
> On Tue, Apr 02, 2013 at 04:45:05PM -0500, Michael Roth wrote:
> > Hi everyone,
> >
> > The following new patches are queued for QEMU stable v1.4.1:
> >
> > https://github.com/mdroth/qemu/commits/stable-1.4-staging
> >
> > The rele
-v3 updates
-made vfio_pamu_attr a union, added flags
-s/VFIO_PAMU_/VFIO_IOMMU_PAMU_/ for the ioctls to make it more
clear which fd is being operated on
-added flags to vfio_pamu_msi_bank_map/umap
-VFIO_PAMU_GET_MSI_BANK_COUNT now just returns a __u32
not a struct
-fixed some
> > /*
> > * VFIO_PAMU_MAP_MSI_BANK
> > *
> > * Maps the MSI bank at the specified index and iova. User space must
> > * call this ioctl once for each MSI bank (count of banks is returned by
> > * VFIO_IOMMU_GET_MSI_BANK_COUNT).
> > * Caller provides struct vfio_pamu_msi_bank_map with all f
This is a show-stopper and regression for many VM scenarios on Precise.
A year later we should have a fix for this.
** Changed in: qemu-kvm-spice (Ubuntu)
Importance: Undecided => High
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEM
Signed-off-by: Paolo Bonzini
---
default-configs/arm-softmmu.mak | 1 +
hw/arm/Makefile.objs| 5 ++---
hw/i2c/Makefile.objs| 3 +++
hw/{ => i2c}/bitbang_i2c.c | 0
hw/{ => i2c}/exynos4210_i2c.c | 0
hw/{ => i2c}/omap_i2c.c | 0
6 files changed, 6 insertions(
Signed-off-by: Paolo Bonzini
---
default-configs/alpha-softmmu.mak| 1 +
default-configs/i386-softmmu.mak | 1 +
default-configs/mips-softmmu.mak | 1 +
default-configs/mips64-softmmu.mak | 1 +
default-configs/mips64el-softmmu.mak | 1 +
default-configs/mipsel-softmmu.mak | 1 +
Signed-off-by: Paolo Bonzini
---
hw/ppc/Makefile.objs| 2 +-
hw/scsi/Makefile.objs | 1 +
hw/{ => scsi}/spapr_vscsi.c | 0
3 files changed, 2 insertions(+), 1 deletion(-)
rename hw/{ => scsi}/spapr_vscsi.c (100%)
diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs
index 42c7d
Signed-off-by: Paolo Bonzini
---
MAINTAINERS | 174 +---
1 file changed, 95 insertions(+), 79 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index db14ffc..4dfd8bf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -59,37 +59,45 @@ Alpha
M
Paolo Bonzini writes:
> Il 04/04/2013 18:59, Anthony Liguori ha scritto:
>>> >
>>> > The right thing to use would be g_source_add_child_source() and
>>> > g_source_remove_child_source(), but that is only present since glib 2.28
>>> > and we currently require 2.12 (2.20 on Windows).
>> I don't thi
Signed-off-by: Paolo Bonzini
---
hw/arm/Makefile.objs | 6 +-
hw/{ => arm}/strongarm.c | 0
2 files changed, 1 insertion(+), 5 deletions(-)
rename hw/{ => arm}/strongarm.c (100%)
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index 35c5f11..9e3a06f 100644
--- a/hw/arm/Makefile
On 4 April 2013 18:03, Michael S. Tsirkin wrote:
> On Thu, Apr 04, 2013 at 01:58:29PM +0100, Peter Maydell wrote:
>> Implement the correct IRQ mapping for the Versatile PCI controller; it
>> differs between realview and versatile boards, but the previous QEMU
>> implementation was correct only for
Signed-off-by: Paolo Bonzini
---
default-configs/arm-softmmu.mak | 1 +
hw/arm/Makefile.objs| 2 +-
hw/usb/Makefile.objs| 1 +
3 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2d53895..4b7
Signed-off-by: Paolo Bonzini
---
default-configs/arm-softmmu.mak| 4
default-configs/i386-softmmu.mak | 3 +++
default-configs/sparc-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 3 +++
hw/arm/Makefile.objs | 11 +--
hw/i386/Makefile.objs
Signed-off-by: Paolo Bonzini
---
default-configs/arm-softmmu.mak | 4
hw/arm/Makefile.objs| 2 --
hw/cpu/Makefile.objs| 4
hw/{ => cpu}/a15mpcore.c| 0
hw/{ => cpu}/a9mpcore.c | 0
hw/{ => cpu}/arm11mpcore.c | 0
6 files changed, 8 insertions
Many headers are used only in a single directory. These can be
kept in hw/.
Signed-off-by: Paolo Bonzini
---
hw/{ => alpha}/alpha_sys.h| 0
hw/alpha/dp264.c | 2 +-
hw/alpha/pci.c| 2 +-
hw/alpha/typ
Signed-off-by: Paolo Bonzini
---
hw/nvram/Makefile.objs | 1 +
hw/{ => nvram}/spapr_nvram.c | 0
hw/ppc/Makefile.objs | 5 -
3 files changed, 1 insertion(+), 5 deletions(-)
rename hw/{ => nvram}/spapr_nvram.c (100%)
diff --git a/hw/nvram/Makefile.objs b/hw/nvram/Makefile.objs
Signed-off-by: Paolo Bonzini
---
default-configs/i386-softmmu.mak | 1 +
default-configs/mips-softmmu.mak | 1 +
default-configs/mips64-softmmu.mak | 1 +
default-configs/mips64el-softmmu.mak | 1 +
default-configs/mipsel-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
Signed-off-by: Paolo Bonzini
---
default-configs/arm-softmmu.mak| 4
default-configs/sparc-softmmu.mak | 1 +
hw/arm/Makefile.objs | 17 +++--
hw/cris/Makefile.objs | 1 -
hw/input/Makefile.objs | 4
hw/{ => input}/milkymist-so
Signed-off-by: Paolo Bonzini
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/i386/Makefile.objs | 3 ---
hw/xen/Makefile.objs | 4
hw/{ => xen}/xen-host-pci-device.c | 0
hw/{ => xen}/xen_apic.c| 0
hw/{ => xen
Signed-off-by: Paolo Bonzini
---
default-configs/arm-softmmu.mak | 4
default-configs/i386-softmmu.mak | 2 ++
default-configs/ppc-softmmu.mak | 1 +
default-configs/ppc64-softmmu.mak| 1 +
default-configs/ppcemb-softmmu.mak | 1 +
default-configs
Signed-off-by: Paolo Bonzini
---
default-configs/i386-softmmu.mak | 4
default-configs/sparc64-softmmu.mak| 1 +
default-configs/x86_64-softmmu.mak | 4
hw/Makefile.objs | 1 +
hw/alpha/Makefile.objs
Signed-off-by: Paolo Bonzini
---
default-configs/arm-softmmu.mak | 1 +
default-configs/microblaze-softmmu.mak | 1 +
default-configs/microblazeel-softmmu.mak | 1 +
hw/arm/Makefile.objs | 3 +--
hw/microblaze/Makefile.objs | 4
hw/ssi/Makefile.obj
Peter requested the KVM GIC to be in hw/intc.
Signed-off-by: Paolo Bonzini
---
hw/i386/Makefile.objs | 5 +
hw/i386/kvm/Makefile.objs | 1 +
hw/{ => i386}/kvm/apic.c | 0
hw/{ => i386}/kvm/clock.c | 0
hw/{ => i386}/kvm/i8254.c | 0
hw/{ => i386}/kvm/i8259.c
Signed-off-by: Paolo Bonzini
---
hw/Makefile.objs | 10 --
hw/misc/Makefile.objs | 6 ++
hw/{ => misc}/ivshmem.c| 0
hw/{vfio_pci.c => misc/vfio.c} | 0
4 files changed, 6 insertions(+), 10 deletions(-)
rename hw/{ => misc}/ivshmem.c (100%)
rename h
Signed-off-by: Paolo Bonzini
---
default-configs/arm-softmmu.mak | 1 +
default-configs/cris-softmmu.mak | 1 +
default-configs/lm32-softmmu.mak | 1 +
default-configs/m68k-softmmu.mak | 1 +
default-configs/microblaze-softmmu.mak | 1 +
default-configs/microbla
Signed-off-by: Paolo Bonzini
---
hw/arm/Makefile.objs| 4 ++--
hw/lm32/Makefile.objs | 1 -
hw/sd/Makefile.objs | 4
hw/{ => sd}/milkymist-memcard.c | 0
hw/{ => sd}/omap_mmc.c | 0
hw/{ => sd}/pxa2xx_mmci.c | 0
6 files changed, 6 insertions(
Signed-off-by: Paolo Bonzini
---
default-configs/arm-softmmu.mak| 1 +
default-configs/i386-softmmu.mak | 1 +
default-configs/sh4-softmmu.mak| 1 +
default-configs/sh4eb-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/arm/Makefile.objs | 2 +-
hw/block/Ma
Signed-off-by: Paolo Bonzini
---
hw/arm/Makefile.objs | 3 +--
hw/gpio/Makefile.objs | 3 +++
hw/{ => gpio}/omap_gpio.c | 0
hw/{ => gpio}/zaurus.c| 0
4 files changed, 4 insertions(+), 2 deletions(-)
rename hw/{ => gpio}/omap_gpio.c (100%)
rename hw/{ => gpio}/zaurus.c (100%)
dif
Signed-off-by: Paolo Bonzini
---
default-configs/arm-softmmu.mak| 1 +
default-configs/i386-softmmu.mak | 1 +
default-configs/lm32-softmmu.mak | 1 +
default-configs/s390x-softmmu.mak | 1 +
default-configs/sparc-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/arm
Signed-off-by: Paolo Bonzini
---
default-configs/sparc-softmmu.mak | 2 ++
hw/arm/Makefile.objs | 7 ++-
hw/cris/Makefile.objs | 1 -
hw/dma/Makefile.objs | 6 ++
hw/{ => dma}/etraxfs_dma.c| 0
hw/{ => dma}/omap_dma.c | 0
hw/{ => dm
Signed-off-by: Paolo Bonzini
---
default-configs/i386-softmmu.mak | 1 +
default-configs/ppc64-softmmu.mak | 2 ++
default-configs/x86_64-softmmu.mak | 1 +
hw/i386/Makefile.objs | 2 +-
hw/pci/Makefile.objs | 2 ++
hw/ppc/Makefile.objs | 2 +-
6 files
Signed-off-by: Paolo Bonzini
---
default-configs/arm-softmmu.mak | 1 +
default-configs/sparc-softmmu.mak | 1 +
hw/arm/Makefile.objs| 2 +-
hw/audio/Makefile.objs | 4
hw/{ =>
Signed-off-by: Paolo Bonzini
---
default-configs/i386-softmmu.mak | 1 +
default-configs/pci.mak| 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/i386/Makefile.objs | 1 -
hw/watchdog/Makefile.objs | 3 ++-
hw/{ => watchdog}/wdt_ib700.c | 0
6 files chan
Signed-off-by: Paolo Bonzini
---
default-configs/arm-softmmu.mak| 6 ++
default-configs/i386-softmmu.mak | 1 +
default-configs/lm32-softmmu.mak | 1 +
default-configs/sh4-softmmu.mak| 1 +
default-configs/sh4eb-softmmu.mak | 1 +
default-configs/sparc-softmmu.mak | 1 +
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