On Tue, Feb 26, 2013 at 05:16:48PM +0400, Евард Вадим wrote:
> Hi list,
> Our team is now surveying various binary translation and emulation tools, and
> as part of this work we have to measure time spent in different parts of the
> process.
> More precisely, I'd like to make this work on x86_64-li
From: Kuo-Jung Su
The FTSDC010 is a simple MMC/SD host controller and
many of its registers are similar to Arm PrimeCell PL181.
Signed-off-by: Kuo-Jung Su
---
hw/arm/Makefile.objs |1 +
hw/arm/faraday_a369_soc.c |7 +
hw/arm/ftsdc010.c | 359 ++
From: Kuo-Jung Su
The s->addr should be reset along with the s->addrlen,
or it might have the previous address shifted to MSB
and then causes problem to nand erase operation.
Signed-off-by: Kuo-Jung Su
---
hw/nand.c |1 +
1 file changed, 1 insertion(+)
diff --git a/hw/nand.c b/hw/nand.c
i
From: Kuo-Jung Su
The FTI2C010 is a simple I2C master controller.
Signed-off-by: Kuo-Jung Su
---
hw/arm/Makefile.objs |1 +
hw/arm/faraday_a369_soc.c |6 ++
hw/arm/fti2c010.c | 217 +
hw/arm/fti2c010.h | 69 +++
On 2013-02-27 08:37, Igor Mammedov wrote:
> On Wed, 27 Feb 2013 00:26:38 -0300
> Eduardo Habkost wrote:
>
>> On Tue, Feb 26, 2013 at 10:57:56PM +0100, Igor Mammedov wrote:
>>> On Sat, 23 Feb 2013 16:45:00 +0100
>>> Jan Kiszka wrote:
>>>
From: Jan Kiszka
Several issues fixed:
From: Kuo-Jung Su
The FTWDT010 is used to prevent system from infinite loop
while software gets trapped in the deadlock.
Under the normal operation, users should restart FTWDT010
at the regular intervals before counter counts down to 0.
If the counter does reach 0, FTWDT010 will try to reset
th
From: Kuo-Jung Su
The FTMAC110 is an Ethernet controller that provides AHB master capability
and is in full compliance with the IEEE 802.3 10/100 Mbps specifications.
Its DMA controller handles all data transfers between system memory
and on-chip memories.
It supports half-word data transfer for
From: Nathan Rossi
Added Vector Base Address remapping on ARM v7.
Signed-off-by: Nathan Rossi
Signed-off-by: Peter Crosthwaite
---
target-arm/cpu.h |1 +
target-arm/helper.c | 14 ++
target-arm/machine.c |2 ++
3 files changed, 17 insertions(+), 0 deletions(-)
diff
On Wed, 27 Feb 2013 00:26:38 -0300
Eduardo Habkost wrote:
> On Tue, Feb 26, 2013 at 10:57:56PM +0100, Igor Mammedov wrote:
> > On Sat, 23 Feb 2013 16:45:00 +0100
> > Jan Kiszka wrote:
> >
> > > From: Jan Kiszka
> > >
> > > Several issues fixed:
> > > - We were missing a bunch of feature list
From: Kuo-Jung Su
Some ethernet mac relies on the bit ordering reversal functions
to performance the multicast address hash code calculation.
So I've ported the bitrev.[ch] from linux kernel into QEMU.
Signed-off-by: Kuo-Jung Su
---
include/qemu/bitrev.h | 25 +
util/Make
Hi Jan,
Thank you for your review.
I added 4 patches including whole implementation of this feature, not just
infrastructure.
Some explanations for your notes :
Cond_exp is the array of bytecodes ( not string ), cond_len - size of this
array . For more info ,please, look GDB agent documentation
From: Kuo-Jung Su
The FTGMAC100 Ethernet controller has a DMA engine which handles
all data transfers between the system memory and on-chip memories.
Its DMA engine supports both 16-bits and 32-bits alignment,
and thus make it possible to support zero-copy transfer at both
Linux and WINCE.
It al
From: Kuo-Jung Su
The FTAPBBRG020 supports the DMA functions for the AHB-to-AHB,
AHB-to-APB, APB-to-AHB, and APB-to-APB transactions.
The DMA engine can support up to 4 DMA channels (A, B, C, and D)
and 15 handshaking channels. A DMA channel granted by the arbiter
block is the only channel start
From: Kuo-Jung Su
The Faraday FTDMAC020 provides eight configurable
channels for the memory-to-memory, memory-to-peripheral,
peripheral-to-peripheral, and peripheral-to-memory transfers.
Each DMA channel supports chain transfer and can be programmed
to one of the 16 handshaking channels in the h
From: Kuo-Jung Su
The FTDDRII030 is a DDRII SDRAM controller which is responsible for
SDRAM initialization.
In QEMU we emualte only the SDRAM enable function.
Signed-off-by: Kuo-Jung Su
---
hw/arm/Makefile.objs |1 +
hw/arm/faraday_a369_soc.c |3 +
hw/arm/ftddrii030.c | 171
From: Kuo-Jung Su
This patch includes the single core support to FA606TE, FA626TE,
FA616TE, FA726TE and CP15 Faraday extensions (AUX and I/D-Scratchpad).
Signed-off-by: Kuo-Jung Su
---
target-arm/cpu.c | 52 +++
target-arm/cpu.h |6 +++-
target-arm/hel
From: Kuo-Jung Su
These patches introduce Faraday A369 SoC platform support.
Here are some public documents for your reference.
http://www.faraday-tech.com/html/documentation/index.html
The partial version of faraday cpu datasheet with only
the CP15 and MPU description are available at my Goog
2013/2/27 Peter Crosthwaite :
> Hi Kuo-Jung,
>
> On Wed, Feb 27, 2013 at 12:08 PM, Kuo-Jung Su wrote:
>> 2013/2/26 Peter Crosthwaite :
>>> Hi Kuo-Jung,
>>>
>>> On Tue, Feb 26, 2013 at 7:14 PM, Kuo-Jung Su wrote:
From: Kuo-Jung Su
The FTSPI020 is an integrated SPI Flash controller
fix build errors like following:
CCui/gtk.o
In file included from /usr/include/gtk-2.0/gtk/gtk.h:233,
from ui/gtk.c:43:
ui/gtk.c: In function ‘gd_vc_init’:
ui/gtk.c:928: error: ‘GDK_KEY_2’ undeclared (first use in this function)
ui/gtk.c:928: error: (Each undeclared identifi
Hi Peter,
I'm one of the major offenders in that count of 250 patches. Summary
of my outstanding ARM series':
"Xilinx Zynq PL330 support": Sent today
"m25p80.c: Use QOM classes for part differentiation": Pinged today
"Zynq GEM updates": Pinged today
"Xilinx SPIPS updates": Pinged today
+The SD a
Ping^2!
For arm-devs.
Regards,
Peter
On Thu, Feb 21, 2013 at 2:05 PM, Peter Crosthwaite
wrote:
> Ping!
>
> These should all be low controversy. CC Stefan in case hes interested
> in keeping tabs on net devices.
>
> Regards,
> Peter
>
> On Fri, Feb 15, 2013 at 2:51 PM, Peter Crosthwaite
> wrote
Not sure how you sent this but it's not threaded properly and the diffs
aren't git diffs. Please use git-send-email.
I used quilt mail. I apologize for the improper threading. I'll switch
over to git-send-email in the future.
+int qemu_write_bytes(QEMUFile *f, const uint8_t *buf, int si
Ping
On Tue, Feb 19, 2013 at 5:50 PM, Peter Crosthwaite
wrote:
> Hi Peter, Edgar,
>
> Can we get a merge of this either individually or as part of the next
> arm-devs? If not I will create a [PULL] but I'm guessing singles like
> this are better to go via a patch queue.
>
> Regards,
> Peter
>
> O
Signed-off-by: Peter Crosthwaite
---
changed from v9:
static const'ified dma_irqs array (Blue review)
hw/xilinx_zynq.c | 24
1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index 311f791..74c30aa 100644
--- a/hw/xilin
Device model for Primecell PL330 DMA controller.
Signed-off-by: Peter Crosthwaite
Signed-off-by: Kirill Batuzov
Tested-by: Igor Mitsyanko
---
changed from v10:
Deleted some unused variables (Igor review)
Returned 0 from invalid mmio read paths (Igor review)
changed from v9:
s/dma/DMA in patch s
Factor out the hexdumper functionality from iov for all to use. Useful for
creating verbose debug printfery that dumps packet data.
Signed-off-by: Peter Crosthwaite
---
changed from v10:
Added Gerd and Red Hat to (c)
reworked iov hexdumper to use iov_to_buf (Gerd Review)
changed from v9:
changed
These patches add support for the Primcell PL330 DMA controller and add it to
the Xilinx Zynq machine model. Patch 2 is the device model. Patch 3 is the
machine model update. Patch 1 is a helper function for debug mode.
The Device model was originally contributed by Kirill Batuzov / Samsung, as
in
Hi All,
Im looking into how to do clock control in QEMU. For 95% of devices
this is irrelevant and timing is not worth modelling, however it holds
some relevance for a few things for us, mainly timers. But we also
want to model individual clock gating for a large number of devices.
That is, if a d
Hi All,
The lastest QOM styling guidlines have mandated that instead of using
child specific init functions (E.G. SysBusDeviceClass::init), all
devices should use DeviceClass::realize or Object::init. I'm wondering
if the same policy should be applied to resets. The main offender is
CPUClass::rese
Hi Jan,
I actually have my own subset implementation of this currently on
list. Yours is more complete however, So id prefer to drop mine in
favour of yours and reverify Zynq as working with yours.
On Sat, Feb 23, 2013 at 6:39 AM, Jan Kiszka wrote:
> This implements I2C EEPROMs of the AT24Cxx se
Public bug reported:
If a qtest test case fails, it leaves orphaned qemu processes hanging
around. On Fedora 18 with qemu.git as of today ( Feb 26 2013), the
patch just forces a test failure
ps axwww | grep qemu | grep -v grep
$ make check-qtest-x86_64
CCtests/rtc-test.o
LINK tests/rtc-t
Ping!
And CC Kuo-Jung. AFAICT Kuo-Jung is using xilinx_spips as a template
for his SPI work so some of these updates will be relevant to the
Faraday series. The patches about the unused IRQs and the QOM styling
fix are the ones.
Ill CC andreas as well, as does some QOM plumbing, establishing a
he
Hi Kuo-Jung,
On Wed, Feb 27, 2013 at 12:08 PM, Kuo-Jung Su wrote:
> 2013/2/26 Peter Crosthwaite :
>> Hi Kuo-Jung,
>>
>> On Tue, Feb 26, 2013 at 7:14 PM, Kuo-Jung Su wrote:
>>> From: Kuo-Jung Su
>>>
>>> The FTSPI020 is an integrated SPI Flash controller
>>> which supports upto 4 flash chips.
>>>
On 2013-02-24 05:11, Anthony Green wrote:
+static TCGv cpu_pc;
+static TCGv cpu_gregs[16];
+static TCGv cpu_sregs[256];
...
+for (i = 0; i < 256; i++)
+cpu_sregs[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ offsetof(CPUMoxieState,
sregs[i]),
Hi Jesse,
Thanks for looking into this.
On Wed, Feb 27, 2013 at 9:19 AM, Jesse Larrew
wrote:
> Hi David!
>
> On 02/21/2013 05:19 PM, David Holsgrove wrote:
>> Configuring QEMU as
>>
>> ./configure --target-list=i386-softmmu --cpu=i386 --enable-werror
>>
>> results in following error
>>
>> cc1: w
In this example, first it will create some qcow2 images, then try get
information including backing file relationship, then it will do sync IO on
the image.
Signed-off-by: Wenchao Xia
---
tests/Makefile|2 +
tests/check-libqblock-qcow2.c | 385 +
Now libqblock.la can be built with neccessary object files,
and can be automatically cleaned by make clean in root directory.
make libqblock-clean also clean it. -fvisibility=hidden was used
to hide symbols, and a special macro was introduced to export
symbols that marked as public.
Signed-off-b
Rule for libqblock.la will be included if it is enabled, and
will be added to 'all' to be automatically built.
Only support Linux now, to save trouble in building on windows.
Signed-off-by: Wenchao Xia
---
Makefile |3 +++
configure | 32 +
Libtool will be used for final link, the rules do nothing if
libqblock was disabled. Temp directory was used to store image
created in test, which will be deleted in clean.
Signed-off-by: Wenchao Xia
---
tests/Makefile |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --
Public API design header files: libqblock.h, libqblock-error.h.
Public type define header files: libqblock-types.h. Private internal used
header files: libqblock-internal. For ABI some reserved bytes are used in
structure defines. Macro QEMU_DLL_PUBLIC is used to mark exported function.
Importan
This command will package the clean operations in tests,
to make it easy to be extended. Now root Makefile simply calls
the command and do not care the details of it any more.
Signed-off-by: Wenchao Xia
---
Makefile |1 -
tests/Makefile |8 +++-
2 files changed, 7 insertions(
Now libqblock can be packaged and installed by
"sudo make install-libqblock'.
Signed-off-by: Wenchao Xia
---
libqblock/Makefile | 34 +-
libqblock/libqblock.pc.in | 13 +
2 files changed, 42 insertions(+), 5 deletions(-)
create mode 1
On Tue, Feb 26, 2013 at 10:57:56PM +0100, Igor Mammedov wrote:
> On Sat, 23 Feb 2013 16:45:00 +0100
> Jan Kiszka wrote:
>
> > From: Jan Kiszka
> >
> > Several issues fixed:
> > - We were missing a bunch of feature lists. Fix this by simply dumping
> >the meta list feature_word_info.
> > -
This patch contains implemention for APIs. Basically it is a layer
above qemu block general layer now.
qb_image_new() will try do init for this library.
Signed-off-by: Wenchao Xia
---
libqblock/libqblock-error.c | 49 +++
libqblock/libqblock.c | 1005 +
libqblock need to use it.
Signed-off-by: Wenchao Xia
---
block.c |2 +-
include/block/block.h |2 ++
2 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/block.c b/block.c
index 4582961..d13152e 100644
--- a/block.c
+++ b/block.c
@@ -195,7 +195,7 @@ static void
This patch will hide all symbols except those marked with
QEMU_DLL_PUBLIC in .lo files. Because vsclient linked some
function in qemu, so export them as well. All symbols
in libcacard.syms are marked as public.
Signed-off-by: Wenchao Xia
---
configure | 18 +
These patches introduce libqblock API, make subdir-libqblock and make
check-libqblock could build this library.
Functionalities:
1 create a new image.
2 sync access of an image.
3 basic image information retrieving such as backing file.
4 detect if a sector is allocated in an image.
Supported
On 02/27/2013 05:53 AM, Michael S. Tsirkin wrote:
> QEMU 1.3 does not emulate the link auto negotiation, so if migrate to a
> 1.3 machine during link auto negotiation, the guest link will be set to down.
> Fix this by just disabling auto negotiation for 1.3 and older.
>
> Signed-off-by: Michael S.
On Tue, Feb 26, 2013 at 09:42:43AM +0100, Alexander Graf wrote:
>
>
> Am 26.02.2013 um 03:01 schrieb David Gibson :
>
> > On Mon, Feb 25, 2013 at 01:19:48PM +0100, Alexander Graf wrote:
[snip]
> >> This makes newer QEMU on older host kernels unusable, right? It
> >> would spill that warning all
On 02/26/2013 06:11 PM, Michael S. Tsirkin wrote:
> This fixes two bugs related to memory sync during
> migration:
> - ram address calculation was missing the chunk
> address, so the wrong page was dirtied
> - one after last was used instead of the
> end address of a region, whi
于 2013-2-26 23:59, Eric Blake 写道:
On 02/26/2013 03:40 AM, Wenchao Xia wrote:
Signed-off-by: Wenchao Xia
In v6, I complained that these functions didn't match the namespace
expected in block.c. You replied:
This patch is just for making review easier, those two functions will
be deleted
于 2013-2-27 0:13, Eric Blake 写道:
On 02/26/2013 03:40 AM, Wenchao Xia wrote:
This patch added the support of showing internal snapshots on an
image in the backing chain of a block device in hmp layer, by
calling a qmp function.
Signed-off-by: Wenchao Xia
---
hmp.c | 81 ++
Hi, Liu Ji
It is embrassing to say that I forgot the version number too, consider
the date of that patch, it should be some version around qemu-1.3, I
remember that migration is not a stand alone thread at that time.
I tested it with (TCG qemu)+(SDL)+(qcow2 image)+"ubuntu guest OS",
it seems f
jsch...@linux.vnet.ibm.com writes:
> These patches implement asn1 ber visitors for encoding and decoding data.
> References: <20130226230354.982917...@linux.vnet.ibm.com>
> Content-Disposition: inline; filename=qemu_file_bits.diff
Not sure how you sent this but it's not threaded properly and the
Keith Busch writes:
> This seems like a silly feature, but the spec allows it, so this adds
> support for queues that are not physically contiguous.
>
> Signed-off-by: Keith Busch
> ---
> hw/nvme.c | 143 +---
> hw/nvme.h |2 +
> 2 fi
2013/2/26 Andreas Färber :
> Am 26.02.2013 12:08, schrieb Peter Crosthwaite:
>> On Tue, Feb 26, 2013 at 7:14 PM, Kuo-Jung Su wrote:
>>> From: Kuo-Jung Su
>>>
>>> The FTSPI020 is an integrated SPI Flash controller
>>> which supports upto 4 flash chips.
>
> "up to"
>
Got it, thanks.
My English su
2013/2/26 Peter Crosthwaite :
> Hi Kuo-Jung,
>
> On Tue, Feb 26, 2013 at 7:14 PM, Kuo-Jung Su wrote:
>> From: Kuo-Jung Su
>>
>> The FTSPI020 is an integrated SPI Flash controller
>> which supports upto 4 flash chips.
>>
>> Signed-off-by: Kuo-Jung Su
>> ---
>
> Please provide change logs below th
This patch uses the possibility to add a vendor-specific register and
adds a debug register useful for dumping the TIS's internal state. This
register is only active in a debug build (#define DEBUG_TIS).
Signed-off-by: Stefan Berger
Reviewed-by: Corey Bryant
---
tpm/tpm_tis.c | 70 +
Signed-off-by: Keith Busch
---
hw/nvme.c | 72 +++--
hw/nvme.h |2 +
2 files changed, 67 insertions(+), 7 deletions(-)
diff --git a/hw/nvme.c b/hw/nvme.c
index 69136e0..087fce9 100644
--- a/hw/nvme.c
+++ b/hw/nvme.c
@@ -327,7 +327,6 @
This adds support for the optional data-set-management command. Action
is only done for the deallocate option.
Signed-off-by: Keith Busch
---
hw/nvme.c | 46 ++
1 files changed, 46 insertions(+), 0 deletions(-)
diff --git a/hw/nvme.c b/hw/nvme.c
ind
> Cc: Guan Xuetao
> Signed-off-by: Richard Henderson
Acked-by: Guan Xuetao
> ---
> target-unicore32/translate.c | 83
> ++--
> 1 file changed, 11 insertions(+), 72 deletions(-)
>
> diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
Build the TPM passthrough driver only for i386 and x86_64 targets
using the default-configs files for those targets with softmmu.
Signed-off-by: Stefan Berger
Reviewed-by: Corey Bryant
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
2 files changed, 2 ins
This adds support for format, asynch event, abort, and format admin
commands, and helper routines to make it easier to put interesting data
in the log pages.
Signed-off-by: Keith Busch
---
hw/nvme.c | 420 -
hw/nvme.h | 21 +++
2 fil
Build the TPM frontend code that has been added so far.
Signed-off-by: Stefan Berger
Reviewed-by: Corey Bryant
---
configure | 11 +++
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
tpm/Makefile.objs | 3 +
This only works with separate buffer meta-data, i.e. non-interleaved
meta-data. The sgl method requires block multiple transfers, which may
not happen with the interleaved meta-data, so more work needed to double
buffer. I don't think there is any use for the interleaved meta-data
anyway from a hos
Signed-off-by: liguang
---
target-i386/cpu.c | 296 ++--
1 files changed, 148 insertions(+), 148 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index aab35c7..ce76055 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -450,
convert cpu mode definitions family and model number
which were in decimal into hexadecimal, because they
were both composed by code(4-bit) and extend code(4-bit),
so, in hexadecimal, we can view the 2 fields easily.
Signed-off-by: liguang
---
target-i386/cpu.c | 28 ++-
Signed-off-by: liguang
---
target-i386/cpu.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index b92ee73..862f2dd 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1198,13 +1198,13 @@ static char *x86_cpuid_get_mode
This patch adds support for TPM command line options.
The command line options supported here are
./qemu-... -tpmdev passthrough,path=,id=
-device tpm-tis,id=
and
./qemu-... -tpmdev help
where the latter works similar to -soundhw help and shows a list of
available TPM backends (for e
This patch adds the main code of the TPM frontend driver, the TPM TIS
interface, to QEMU. The code is largely based on the previous implementation
for Xen but has been significantly extended to meet the standard's
requirements, such as the support for changing of localities and all the
functionalit
When errors are detected in commands, set the error log page so that
the host driver may see relevent error data.
Signed-off-by: Keith Busch
---
hw/nvme.c | 25 +
hw/nvme.h |2 ++
2 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/hw/nvme.c b/hw/nvme.c
On 02/26/2013 07:18 PM, Stefan Berger wrote:
On 02/26/2013 04:58 PM, Corey Bryant wrote:
qemu-system-x86_64 -tpmdev passthrough,id=tpm0,path=/dev/tpm0
(It's missing -device tpm-tis,tpmdev=tpm0)
So with the necessary filtering this will then have to be -device
tpm-tis,tpmdev=tpm0,id=tpm0 . I
This patch adds support for cancelling an executing TPM command.
In Linux for example a user can cancel a command through the TPM's
sysfs 'cancel' entry using
echo "1" > /sysfs/class/misc/tpm0/device/cancel
This patch propagates the cancellation of a command inside a VM
to the host TPM's sysfs en
>From Andreas Niederl's original posting with adaptations where necessary:
This patch is based of off version 9 of Stefan Berger's patch series
"QEMU Trusted Platform Module (TPM) integration"
and adds a new backend driver for it.
This patch adds a passthrough backend driver for passing command
From: root
The following series of patches adds TPM (Trusted Platform Module) support
to QEMU. An emulator for the TIS (TPM Interface Spec) interface is
added that provides the basis for accessing a 'backend' implementing the actual
TPM functionality. The TIS emulator serves as a 'frontend' enabl
NVM Express is an open standard for PCI-e attached Non-Volatile Memory
storage. This commit adds an emulated device that supports the register
interface and command set defined by this standard. The standard can
be viewed at nvmexpress.org. This initial commit implements the minimum
amount required
Adds logging at various levels of detail throughout the code so that
a developer may see what is occuring within a device interacting with
their nvme drivers and utilities.
Signed-off-by: Keith Busch
---
hw/nvme.c | 266 +++--
1 files chan
This is the initial patches needed for a qemu device. I've submitted a
patch for this before, but it was very large had some issues. This splits
the commit into multiple commits. The initial commit is the smallest I
could make this to work with the existing device drivers. The follow on
patches add
This seems like a silly feature, but the spec allows it, so this adds
support for queues that are not physically contiguous.
Signed-off-by: Keith Busch
---
hw/nvme.c | 143 +---
hw/nvme.h |2 +
2 files changed, 118 insertions(+), 27 de
For controller capabilities and features visibile to a host driver,
add command line parameters to allow them to be any value the spec
allows. Useful for verifying a driver against a device with various
constraints.
Signed-off-by: Keith Busch
---
hw/nvme.c | 161
This allows a driver to set and retrieve the various nvme features defined
in the spec. Where applicable, setting the features changes the device
behavior to reflect the desired feature.
Signed-off-by: Keith Busch
---
hw/nvme.c | 148 -
If the temperature threshold warning is set below the controller temperature,
enqueue the async event warning.
Signed-off-by: Keith Busch
---
hw/nvme.c |9 +
hw/nvme.h |1 +
2 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/hw/nvme.c b/hw/nvme.c
index c65c179..3e5cf
Public bug reported:
Detail and temporary path:
http://www.devttys0.com/2011/12/qemu-vs-sstrip/#comment-10161
** Affects: qemu
Importance: Undecided
Status: New
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://
As of glib 2.35.4, glib changed its logic for ordering test cases:
https://bugzilla.gnome.org/show_bug.cgi?id=694487
This was causing failures in rtc-test. Group the reordered test
cases into their own suite, which maintains the original ordering.
CC: qemu-sta...@nongnu.org
Signed-off-by: Cole R
On 02/26/2013 04:58 PM, Corey Bryant wrote:
I spent some time testing this patch series and just about everything
is working as expected. Part of the testing included running Trousers
and the Trousers testsuite and they behaved as expected. However I
did find a few minor issues (and a couple
Commit 0e21e12bb311c4c1095d0269dc2ef81196ccb60a [Don't route PIC
interrupts through the local APIC if the local APIC config says so.]
missed a check to ensure the local APIC is enabled. Since if the local
APIC is disabled it doesn't matter what the local APIC config says.
If this check isn't done
On 02/26/2013 05:04 PM, Corey Bryant wrote:
On 02/21/2013 11:33 AM, Stefan Berger wrote:
-@item -tpmdev passthrough, id=@var{id}, path=@var{path}
+@item -tpmdev passthrough, id=@var{id}, path=@var{path},
path=@var{cancel-path}
The last path= should be cancel-path=
Fixed
goto
Hi David!
On 02/21/2013 05:19 PM, David Holsgrove wrote:
> Configuring QEMU as
>
> ./configure --target-list=i386-softmmu --cpu=i386 --enable-werror
>
> results in following error
>
> cc1: warnings being treated as errors
> qemu-char.c: In function 'qmp_ringbuf_write':
> qemu-char.c:2764: error
These patches implement asn1 ber visitors for encoding and decoding data.
These depend on the previously posted patch
"Move File operations to qemu-file.c". These seem useful on their own so I
thought I'd post them now so others can use them. I plan to post an nvram
implementation shortly that
On 02/26/13 17:42, Georgios Tsalikis wrote:
> Greeting Qemu fellows :)
>
> I have invoked Qemu with various parameters. For example:
> $ /usr/bin/qemu-system-x86_64 -monitor stdio -enable-kvm -m 512
> -localtime -hda /home/george/Qemu\ VMs/efi-bios/efi.disk -hdb
> /home/george/Qemu\ VMs/efi-bios/l
These patches implement asn1 ber visitors for encoding and decoding data.
References: <20130226230354.982917...@linux.vnet.ibm.com>
Content-Disposition: inline; filename=asn1_tests.diff
Signed-off-by: Stefan Berger
Signed-off-by: Joel Schopp
---
tests/Makefile | 12 +
tests/test-ber
These patches implement asn1 ber visitors for encoding and decoding data.
References: <20130226230354.982917...@linux.vnet.ibm.com>
Content-Disposition: inline; filename=qemu_file_bits.diff
Signed-off-by: Stefan Berger
Signed-off-by: Joel Schopp
---
include/migration/qemu-file.h |4
qe
On Tue, Feb 26, 2013 at 10:53:27PM +0100, Laszlo Ersek wrote:
> On 02/20/13 02:51, Laszlo Ersek wrote:
> > This commit does the same for the ICH9 LPC as commit 1ec4ba74 for the
> > PIIX3. For the present we're ignoring the Full Reset (FULL_RST) and System
> > Reset (SYS_RST) bits; the guest can rea
Jan Kiszka writes:
> Otherwise we may start processing sockets in slirp_pollfds_poll that
> were created past slirp_pollfds_fill.
>
> Signed-off-by: Jan Kiszka
I think there's still something wrong...
Somehow, my char flow series breaks slirp. Prior to the g_poll
conversion, this was not the
On 02/21/2013 11:33 AM, Stefan Berger wrote:
This patch adds support for cancelling an executing TPM command.
In Linux for example a user can cancel a command through the TPM's
sysfs 'cancel' entry using
echo "1" > /sysfs/class/misc/tpm0/device/cancel
This patch propagates the cancellation of
I spent some time testing this patch series and just about everything is
working as expected. Part of the testing included running Trousers and
the Trousers testsuite and they behaved as expected. However I did find
a few minor issues (and a couple of nits) so I'll expand on those inline.
As
On Sat, 23 Feb 2013 16:45:00 +0100
Jan Kiszka wrote:
> From: Jan Kiszka
>
> Several issues fixed:
> - We were missing a bunch of feature lists. Fix this by simply dumping
>the meta list feature_word_info.
> - kvm_enabled() cannot be true at this point because accelerators are
>initial
QEMU 1.3 does not emulate the link auto negotiation, so if migrate to a
1.3 machine during link auto negotiation, the guest link will be set to down.
Fix this by just disabling auto negotiation for 1.3 and older.
Signed-off-by: Michael S. Tsirkin
---
hw/e1000.c | 25 +
On 02/20/13 02:51, Laszlo Ersek wrote:
> This commit does the same for the ICH9 LPC as commit 1ec4ba74 for the
> PIIX3. For the present we're ignoring the Full Reset (FULL_RST) and System
> Reset (SYS_RST) bits; the guest can read them back but that's it.
>
> Signed-off-by: Laszlo Ersek
> ---
>
> I just reread the code and noticed the delay is 1 microsecond, not 1
> millisecond.
Yes, It does not really add a delay.
> The problem is that this is a magic value. It worked on your machine with
> your
> workload, but there's no guarantee it works on anyone else's machine or
> workload. W
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