Am 01.02.2013 18:03, schrieb Paolo Bonzini:
> Il 31/01/2013 09:33, Orit Wasserman ha scritto:
If my above assumption that the guest reads unmapped memory as zeroes is
right, this mapping
is not necessary in the case of a zero dup page.
We just have to make sure that we are
Il 02/02/2013 16:11, Eric Blake ha scritto:
> On 02/02/2013 06:30 AM, Peter Maydell wrote:
>
>>> - * Undefined if no bit exists, so code should check against 0 first.
>>> + * Returns -1 if no bit exists. Note that compared to the C library
>>> + * routine ffsl, this one returns one less.
>>> */
Il 31/01/2013 09:33, Orit Wasserman ha scritto:
>> > If my above assumption that the guest reads unmapped memory as zeroes is
>> > right, this mapping
>> > is not necessary in the case of a zero dup page.
>> >
>> > We just have to make sure that we are still in the very first round when
>> > dec
The MDIO model needs to have VMState support before it can be used by
devices that support VMState. This patch adds VMState macros for both
qemu_mdio and qemu_phy.
Cc: Peter Maydell
Cc: Paul Brook
Cc: Edgar E. Iglesias
Cc: Anthony Liguori
Cc: Andreas Färber
Signed-off-by: Grant Likely
---
h
The etraxfs and Xilinx axienet Ethernet models implement quite a nice
MDIO core that supports both bitbanging and direct register access. This
change factors the common code out into a separate file. There are no
functional changes here, just movement of code.
The etraxfs and axienet are slightly
The MDIO state machine has a moderate amount of duplicate code in the
state processing that can be consolidated. This patch does so and
reorganizes it a bit so that far less code is required. Most of the
states simply stream a fixed number of bits in as a single integer and
can be handled by a comm
The smc91c111 device has bitbanged MDIO access, but the model doesn't
yet implement it. This patch uses the generalized bitbang MDIO support
pulled out of etraxfs Ethernet driver.
The MDIO state machine is driven by changes in state to the clock
control bit in the management register. The PHY mode
The RST and ANEG_RST bits are commands, not settings. An operating
system will get confused (or at least u-boot does) if those bits remain
set after writing to them. Therefore, mask them out on write.
Similarly, no bits in the ID1, ID2, and remote capability registers are
writeable; so mask them o
Am 03.02.2013 00:06, schrieb Anthony Liguori:
> Signed-off-by: Anthony Liguori
> ---
> hw/s390x/s390-virtio-bus.c | 3 ++-
> hw/s390x/virtio-ccw.c | 3 ++-
> hw/virtio-pci.c| 3 ++-
> hw/virtio.h| 3 ++-
> 4 files changed, 8 insertions(+), 4 deletions(-)
>
> diff
There really isn't anything tdk-specific about tdk_init() other than the
phy id registers. The function should instead be generalized for any
phy, at least as far as the ID registers are concerned. For the most
part the read/write behaviour should be very similar across PHYs.
This patch renames td
On 2 February 2013 23:40, Grant Likely wrote:
> static const VMStateDescription vmstate_smc91c111 = {
> @@ -71,6 +76,8 @@ static const VMStateDescription vmstate_smc91c111 = {
> VMSTATE_BUFFER_UNSAFE(data, smc91c111_state, 0, NUM_PACKETS * 2048),
> VMSTATE_UINT8(int_level, smc91
Trivial patch to add #defines for defined PHY register address and bit fields
Cc: Peter Maydell
Cc: Paul Brook
Cc: Edgar E. Iglesias
Cc: Anthony Liguori
Cc: Andreas Färber
Signed-off-by: Grant Likely
---
hw/mdio.c |8
hw/mdio.h | 24 ++--
2 files changed,
This is a trivial patch to harmonize the coding style on
hw/etraxfs_eth.c. This is in preparation to split off the bitbang mdio
code into a separate file.
Cc: Peter Maydell
Cc: Paul Brook
Cc: Edgar E. Iglesias
Cc: Anthony Liguori
Cc: Andreas Färber
Signed-off-by: Grant Likely
---
hw/etraxfs
Hi Edgar,
Here is one more version of this patch set. I've addressed as many
comments as I could. There is more work to be done, particularly in
moving to the common GPIO api, but that work can be done as a follow on
patch series.
Cheers,
g.
On 2 February 2013 23:04, wrote:
> From: Dillon Amburgey
>
> Signed-off-by: Dillon Amburgey
Reviewed-by: Peter Maydell
-- PMM
On 2 February 2013 21:37, Andreas Färber wrote:
> Am 02.02.2013 22:19, schrieb Peter Maydell:
>> It's OK and expected for visitors to return errors when presented with
>> the fuzz test's random data. This means the test harness needs to
>> handle them; check for and free any error after each visit
Michael Tokarev writes:
> This is a quick-n-dirty bandaid to let virtio-net to work on windows
> again. Merely removing newly added stuff (max_virtqueue_pairs)
> from struct virtio_net_config makes fixes it. Note this field
> of the structure is not actually used, as far as I can see - it
> is
Vadim Rozenfeld writes:
> On Sat, 2013-02-02 at 20:42 +0800, Jason Wang wrote:
>>
>> Have a look at this issue. It was caused by multiqueue patch who adds a
>> new field to virtio_net_cfg. Not sure multiqueue is the root cause since
>> I also find even w/o multiqueue, adding any new field to vir
Signed-off-by: Anthony Liguori
---
hw/s390x/s390-virtio-bus.c | 3 ++-
hw/s390x/virtio-ccw.c | 3 ++-
hw/virtio-pci.c| 3 ++-
hw/virtio.h| 3 ++-
4 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/hw/s390x/s390-virtio-bus.c b/hw/s390x/s390-virtio-bus.c
The windows PV drivers seem to get very upset if the config size changes.
Even when we disable features, we don't change the config size today which
is a bug.
This patch is a pretty rough way to solve this problem and it only handles
the multiqueue case specifically.
Cc: Michael Tokarev
Reported
virtio-net multiqueue added a new field to the config layout. The config
layout is rounded up to the nearest power of 2 and this field caused
field causes the size to go from 8 bytes to 16 bytes.
For reasons unknown, the increase in config size causes the Windows
virtio-net driver to fail. This
From: Dillon Amburgey
Signed-off-by: Dillon Amburgey
---
linux-user/syscall.c | 22 --
1 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index a148d9f..7344052 100644
--- a/linux-user/syscall.c
+++ b/linux-user/sys
Am 02.02.2013 22:19, schrieb Peter Maydell:
> It's OK and expected for visitors to return errors when presented with
> the fuzz test's random data. This means the test harness needs to
> handle them; check for and free any error after each visitor call,
> and only free the string returned by visit_
It's OK and expected for visitors to return errors when presented with
the fuzz test's random data. This means the test harness needs to
handle them; check for and free any error after each visitor call,
and only free the string returned by visit_type_str if visit_type_str
succeeded.
This fixes a
On 2 February 2013 12:40, Blue Swirl wrote:
> On Wed, Jan 30, 2013 at 4:37 PM, Kevin Wolf wrote:
>> Am 19.01.2013 17:01, schrieb Blue Swirl:
>>> Perform input tests on random data.
>>>
>>> Improvement to code coverage for qapi/string-input-visitor.c
>>> is about 3 percentage points.
>>>
>>> Signe
On 2 February 2013 18:34, Andreas Färber wrote:
> Am 02.02.2013 18:17, schrieb Peter Maydell:
>> This is the only clang warning on MacOSX apart from the ones about
>> deprecated features in audio/coreaudio.c and ui/cocoa.m
> On v10.5.8 I'm seeing some redundant declaration warnings from
> disas/s
On 2 February 2013 18:26, Blue Swirl wrote:
> On Sat, Feb 2, 2013 at 5:44 PM, Peter Maydell
> wrote:
>> On 2 February 2013 17:37, Andreas Färber wrote:
>>> Am 02.02.2013 17:49, schrieb Peter Maydell:
>>> libqtest.h has no generic endian-aware memread functions unlike Alex,
>>> you or me expecte
On Sat, Feb 2, 2013 at 8:18 PM, Peter Maydell wrote:
> On 2 February 2013 18:26, Blue Swirl wrote:
>> On Sat, Feb 2, 2013 at 5:44 PM, Peter Maydell
>> wrote:
>>> On 2 February 2013 17:37, Andreas Färber wrote:
Am 02.02.2013 17:49, schrieb Peter Maydell:
libqtest.h has no generic endi
On Sat, 2013-02-02 at 20:42 +0800, Jason Wang wrote:
> On 02/02/2013 05:13 AM, Anthony Liguori wrote:
> > Michael Tokarev writes:
> >
> >> 02.02.2013 00:36, Anthony Liguori wrote:
> >>> Michael Tokarev writes:
> >>>
> 02.02.2013 00:18, Michael Tokarev wrote:
> > Just a heads-up for now,
Am 02.02.2013 18:17, schrieb Peter Maydell:
> Add explicit braces round an empty for-loop body; this fits
> QEMU style and is easier to read than an inconspicuous semicolon
> at the end of the line. It also silences a clang warning:
>
> disas/i386.c:4723:49: warning: for loop has empty body [-Wemp
On Sat, Feb 2, 2013 at 5:44 PM, Peter Maydell wrote:
> On 2 February 2013 17:37, Andreas Färber wrote:
>> Am 02.02.2013 17:49, schrieb Peter Maydell:
>>> There's nothing special about the OMAP i2c device that I know of:
>>> shouldn't the test code just be using a generic "write 16 bit value
>>> t
Thank you Peter for the quick response to this bug report.
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https://bugs.launchpad.net/bugs/1110531
Title:
regression booting pxa kernels
Status in QEMU:
New
Bug description:
Som
On 2 February 2013 17:37, Andreas Färber wrote:
> Am 02.02.2013 17:49, schrieb Peter Maydell:
>> There's nothing special about the OMAP i2c device that I know of:
>> shouldn't the test code just be using a generic "write 16 bit value
>> to memory with appropriate endianness for target CPU" functio
Am 02.02.2013 18:44, schrieb Peter Maydell:
> On 2 February 2013 17:37, Andreas Färber wrote:
>> Am 02.02.2013 17:49, schrieb Peter Maydell:
>>> There's nothing special about the OMAP i2c device that I know of:
>>> shouldn't the test code just be using a generic "write 16 bit value
>>> to memory w
Am 02.02.2013 17:49, schrieb Peter Maydell:
> On 2 February 2013 16:45, Andreas Färber wrote:
>> From: Andreas Färber
>>
>> The libqos driver for omap_i2c currently does not work on Big Endian.
>> Introduce helpers for reading from and writing to 16-bit armel registers.
>>
>> This fixes tmp105-te
Add explicit braces round an empty for-loop body; this fits
QEMU style and is easier to read than an inconspicuous semicolon
at the end of the line. It also silences a clang warning:
disas/i386.c:4723:49: warning: for loop has empty body [-Wempty-body]
for (i = 0; tmp[i] == '0' && tmp[i
On 2 February 2013 16:45, Andreas Färber wrote:
> From: Andreas Färber
>
> The libqos driver for omap_i2c currently does not work on Big Endian.
> Introduce helpers for reading from and writing to 16-bit armel registers.
>
> This fixes tmp105-test failures on ppc.
>
> Signed-off-by: Andreas Färbe
From: Andreas Färber
The libqos driver for omap_i2c currently does not work on Big Endian.
Introduce helpers for reading from and writing to 16-bit armel registers.
This fixes tmp105-test failures on ppc.
Signed-off-by: Andreas Färber
---
tests/libi2c-omap.c | 51 +++
Am 01.02.2013 23:26, schrieb Richard Henderson:
> The misnamed HOST_LONG_BITS is really HOST_POINTER_BITS. Here we're
> explicitly using an unsigned long, rather than uintptr_t, so it is
> more correct to select the swap size via ULONG_MAX.
>
> Signed-off-by: Richard Henderson
Acked-by: Andreas
This is a quick-n-dirty bandaid to let virtio-net to work on windows
again. Merely removing newly added stuff (max_virtqueue_pairs)
from struct virtio_net_config makes fixes it. Note this field
of the structure is not actually used, as far as I can see - it
is write-only, so it shouldn't affect a
Commit b758aca1f6cdb175634812b79f5560c36c902d00 (target-alpha: Enable
the alpha-softmmu target.) introduced cpu_{save,load}() functions but
didn't define CPU_SAVE_VERSION, so they were never registered.
Drop cpu_{save,load}() and register the VMStateDescription via CPUClass.
This operates on the A
Expose vmstate_cpu as vmstate_lm32_cpu and hook it up to CPUClass::vmsd.
Adapt VMState fields to LM32CPU. Drop cpu_{save,load}().
Signed-off-by: Andreas Färber
---
target-lm32/cpu-qom.h |2 ++
target-lm32/cpu.c |4
target-lm32/cpu.h |2 --
target-lm32/machine.c | 36 ++
Hello,
In response to patches from Juan [1], this series implements a declarative way
for CPUs to register their CPU-specific VMStateDescription.
There are subtle differences between CPU and devices in how they register
their savevm handlers and VMStateDescription respectively:
* CPUs register o
Since commit e67db06e9f6d7e514ee2a9b9b769ecd42977f6fb (target-or32: Add
target stubs and QOM cpu) a VMStateDescription existed, but
CPU_SAVE_VERSION was not set, so it was never registered.
Register it through CPUState.
Use a version_id of 1 and specify minimum versions as well.
Cc: Jia Liu
Sign
Fixed by this patch http://patchwork.ozlabs.org/patch/217673/ which
hopefully will make it into 1.4.
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https://bugs.launchpad.net/bugs/1110531
Title:
regression booting pxa kernels
Sta
Expose vmstate_cpu as vmstate_x86_cpu and hook it up to CPUClass::vmsd.
Adapt opaques and VMState fields to X86CPU. Drop cpu_{save,load}().
Signed-off-by: Andreas Färber
---
target-i386/cpu-qom.h |2 +
target-i386/cpu.c |4 +
target-i386/cpu.h |2 -
target-i386/machine.c | 2
A few targets already managed to implement cpu_save() and cpu_load()
without defining CPU_SAVE_VERSION that causes them to be registered.
Guard the prototypes with CPU_SAVE_VERSION to avoid this happening again
until all targets are converted to VMState or QIDL.
Signed-off-by: Andreas Färber
---
When the pxa2xx performance counter related cp14 registers were converted
from a switch-statement implementation to the new table driven cpregs
format in commit dc2a9045c, the crn and crm values for all these
registers were accidentally transposed. Fix this mistake, which was
causing OpenBSD for Za
On 02/02/2013 06:30 AM, Peter Maydell wrote:
>> - * Undefined if no bit exists, so code should check against 0 first.
>> + * Returns -1 if no bit exists. Note that compared to the C library
>> + * routine ffsl, this one returns one less.
>> */
>
> Do any of our callers actually use the "-1 on
Ah, found the problem -- it looks like I accidentally transposed the
crm/crn values for all the perf registers in commit dc2a9045c, in the
process of converting from switch statements to the table
representation, and my test Linux image obviously doesn't prod these
registers. I'll send out a patch.
In comparison to DeviceClass::vmsd, CPU VMState is split in two,
"cpu_common" and "cpu", and uses cpu_index as instance_id instead of -1.
Therefore add a CPU-specific CPUClass::vmsd field.
Unlike the legacy CPUArchState registration, rather register CPUState.
Signed-off-by: Juan Quintela
Signed-
OpenBSD appears to be trying to access cp14 crn=0 crm=1 opc1=0 opc2=0.
Implementing this as a no-op allows the image to boot.
I'm trying to track down what this is supposed to be -- it doesn't seem to be
listed in the PXA27x docs.
(Previously we were lax about decoding and tended to print warnin
On 1 February 2013 22:03, Paolo Bonzini wrote:
> We had two copies of a ffs function for longs with subtly different
> semantics and, for the one in bitops.h, a confusing name: the result
> was off-by-one compared to the library function ffsl.
>
> Unify the functions into one, and solve the name p
On Fri, Feb 1, 2013 at 2:28 PM, Stefan Hajnoczi wrote:
> From: Kevin Wolf
>
> Return -errno instead of -1 on errors and add error checks in some
> places that didn't have one. Passing things by reference requires more
> correct typing, replaced a few off_ts therefore - with a 32-bit off_t
> this
On Wed, Jan 30, 2013 at 4:37 PM, Kevin Wolf wrote:
> Am 19.01.2013 17:01, schrieb Blue Swirl:
>> Perform input tests on random data.
>>
>> Improvement to code coverage for qapi/string-input-visitor.c
>> is about 3 percentage points.
>>
>> Signed-off-by: Blue Swirl
>
> Does this test pass for you?
On Fri, Feb 1, 2013 at 1:53 PM, Stefan Hajnoczi wrote:
> Slirp uses rfds/wfds/xfds more extensively than other QEMU components.
>
> The rarely-used out-of-band TCP data feature is used. That means we
> need the full table of select(2) to g_poll(3) events:
>
> rfds -> G_IO_IN | G_IO_HUP | G_IO_E
It was never implemented.
Signed-off-by: Andreas Färber
---
target-lm32/cpu.h |1 -
1 Datei geändert, 1 Zeile entfernt(-)
diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index 4e202db..6948d0e 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -189,7 +189,6 @@ struct CPULM32State
On 02/02/2013 05:13 AM, Anthony Liguori wrote:
> Michael Tokarev writes:
>
>> 02.02.2013 00:36, Anthony Liguori wrote:
>>> Michael Tokarev writes:
>>>
02.02.2013 00:18, Michael Tokarev wrote:
> Just a heads-up for now, no real diagnostics or anything like that.
>
> Current git ma
Reindent, add missing braces and drop/adjust whitespace.
Prepares for CPUArchState-to-CPUState field movements in
cpu_cris_handle_mmu_fault(), do_interruptv10() and do_interrupt().
The remaining functions were so minor that they can be fixed in one go.
Signed-off-by: Andreas Färber
---
target-c
On Wed, Jan 30, 2013 at 11:05 AM, Muhammad Nouman wrote:
> Hi! There is a special segment in Octeon processors (CVMSEG)
> which maps a small portion of MIPS64 address space to
> Data Cache. This region is used by the user applications
> as scratch space and this space is saved by Octeon Kernel
> o
It was never implemented.
Signed-off-by: Andreas Färber
---
target-s390x/cpu.h |1 -
1 Datei geändert, 1 Zeile entfernt(-)
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 01e59b9..0070c40 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -315,7 +315,6 @@ static inline i
On Tue, Jan 29, 2013 at 8:52 PM, Richard Henderson wrote:
> On 01/29/2013 12:06 PM, Blue Swirl wrote:
>>>
>>> +static const Test test_u_data[] = {
>>> +{ 1, 1, 0, 1 },
>>> +{ 1, 1, 0, 1 },
>>> +{ -1ull, 2, 1, -2ull },
>>
>>
>> Shouldn't '1' be '-1'? How can this test pa
Il 11/01/2013 17:46, Paolo Bonzini ha scritto:
> Trying (unsuccessfully) to break the code and reproduce the effects
> of https://bugs.launchpad.net/qemu/+bug/1090558... Well, more
> tests never hurt...
>
> Paolo Bonzini (2):
> rtc-test: always set register B in its entirety
> rtc-test: add t
Hello,
Most of its prerequisites in v1.4.0-rc0 or in qom-cpu-next, this series
proceeds with moving fields from CPU_COMMON / CPU*State to CPUState.
For large Coding Style cleanups it seems too late now (Hard Freeze).
But the two function declarations might be considered an acceptable cleanup.
Po
Enable ARMCPUInfo to specify a custom class_init functions.
Introduce arm_v7m_class_init() and use it for "cortex-m3" model.
Instead of forwarding from arm_cpu_do_interrupt() to do_interrupt_v7m(),
override CPUClass::do_interrupt with arm_v7m_cpu_do_interrupt()
in arm_v7m_class_init().
Signed-off
Move it to qom/cpu.h to avoid issues with include order.
Change pc_acpi_smi_interrupt() opaque to X86CPU.
Signed-off-by: Andreas Färber
---
cpus.c |2 +-
exec.c |2 +-
hw/alpha_typhoon.c | 10 --
hw/apic.c| 21 +++
This removes a global per-target function and thus takes us one step
closer to compiling multiple targets into one executable.
It will also allow to override the interrupt handling for certain CPU
families.
Signed-off-by: Andreas Färber
---
cpu-exec.c | 36 +++
Move it to qom/cpu.c to avoid build failures depending on include order
of cpu-qom.h and exec/cpu-all.h.
Change opaques of various ..._irq_handler() functions to the
appropriate CPU type to facilitate using cpu_reset_interrupt().
Fix Coding Style issues while at it (missing braces, indentation).
Version 5 contained the halted field, that we are about to move from
CPUX86State to CPUState. To avoid inventing new VMSTATE macros for
calculating a negative offset from CPUX86State to the field in CPUState,
rather bump the minimum version from 3 to 6. We're at 12 currently.
Suggested-by: Juan Qu
Am 02.02.2013 11:46, schrieb Jan Kiszka:
> From: Jan Kiszka
>
> Signed-off-by: Jan Kiszka
> ---
> configure |1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/configure b/configure
> index 0657b1a..cfccec5 100755
> --- a/configure
> +++ b/configure
> @@ -4289,6 +4289
Hi Christopher,
Am 02.02.2013 03:38, schrieb Christopher Friedt:
> On Fri, Feb 1, 2013 at 1:01 PM, Peter Maydell
> wrote:
>> OSX generally works for me, with some caveats:
>> * current master doesn't compile because of a recent patch
>>related to ffsl; this should be fixed soon I hope.
>
>
From: Jan Kiszka
Signed-off-by: Jan Kiszka
---
configure |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/configure b/configure
index 0657b1a..cfccec5 100755
--- a/configure
+++ b/configure
@@ -4289,6 +4289,7 @@ FILES="$FILES tests/tcg/lm32/Makefile"
FILES="$FILES pc-bi
On Sat, Feb 2, 2013 at 5:02 AM, Brian Jackson wrote:
[...]
> It probably gets stripped during the install process. Check 'file'
> output on both and see.
This is a stupid mistake, which the latter one is *NOT* installed by
the first one. Jackson, thanks for your suggestions ;-)
--
Thanks
Harry
Am 01.02.2013 23:03, schrieb Paolo Bonzini:
> We had two copies of a ffs function for longs with subtly different
> semantics and, for the one in bitops.h, a confusing name: the result
> was off-by-one compared to the library function ffsl.
>
> Unify the functions into one, and solve the name prob
Am 31.01.2013 18:57, schrieb Andreas Färber:
> Hello,
>
> This series propagates M68kCPU arguments along the call chain in preparation
> for CPU_COMMON -> CPUState interrupt field movements and function changes.
>
> It is based on my current qom-cpu-next queue:
> https://github.com/afaerber/qemu-
Am 02.02.2013 01:37, schrieb Andreas Färber:
> Hello,
>
> Long announced, here it is after the freeze: My 3rd attempt at CPU subclasses.
> v3 is closer to v1 again, slimmed down not to touch x86_def_t much.
>
> It was noticed that in theory a QOM class enumeration could lead to the host
> CPU cla
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