Adapt static caller functions.
This cleans up after passing PowerPCCPU to kvmppc_set_interrupt().
Signed-off-by: Andreas Färber
---
hw/ppc.c | 66 ++--
hw/ppc.h |2 +-
hw/ppc_booke.c | 28
3 Dateien
Am 01.12.2012 12:26, schrieb Peter Maydell:
> On 30 November 2012 21:38, Eduardo Habkost wrote:
>> cpu_reset() is not that well-defined, otherwise we wouldn't have this on
>> linux-user:
>>
>> #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
>> cpu_reset(ENV_GET_CPU(env
Hello,
As announced in my KVM Forum talk, here's a patchset converting the QEMU-side
KVM API to use CPUState where possible. While carrying the same name as before
the introduction of CPUArchState, CPUState is now a target-independent type,
theoretically allowing, e.g., KVM vCPU ioctls from target
Cleans up after passing PowerPCCPU to ppc_set_irq().
Signed-off-by: Andreas Färber
---
hw/ppc.c | 60 +---
1 Datei geändert, 33 Zeilen hinzugefügt(+), 27 Zeilen entfernt(-)
diff --git a/hw/ppc.c b/hw/ppc.c
index 6db595f..b1b93a1 100644
-
Adapt some functions to take CPUState / {PowerPC,S390}CPU argument.
Signed-off-by: Andreas Färber
---
cpu-defs.h |2 --
include/qemu/cpu.h |3 +++
kvm-all.c | 28 ++--
kvm.h |4 ++--
target-i386/cpu.c |7 +--
target-i38
Prepares for passing PowerPCCPU to ppc_booke_timers_init().
Signed-off-by: Andreas Färber
---
hw/ppc405_uc.c |8 ++--
hw/ppc4xx.h |6 +++---
hw/ppc4xx_devs.c |8
3 Dateien geändert, 13 Zeilen hinzugefügt(+), 9 Zeilen entfernt(-)
diff --git a/hw/ppc405_uc.c b/hw/p
Am 02.12.2012 05:50, schrieb Andreas Färber:
> diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
> index 61b7698..6c66fc0 100644
> --- a/include/qemu/cpu.h
> +++ b/include/qemu/cpu.h
> @@ -77,6 +77,10 @@ struct CPUState {
> bool stop;
> bool stopped;
>
> +#if !defined(CONFIG_USER_ONL
Pass CPUState / {X86,S390}CPU to helper functions.
Signed-off-by: Andreas Färber
---
cpu-defs.h |4 +--
include/qemu/cpu.h |2 ++
kvm-all.c |8 +++---
target-i386/kvm.c |9 +++---
target-s390x/kvm.c | 77
5
Cleans up after passing PowerPCCPU to timer callbacks.
Signed-off-by: Andreas Färber
---
hw/ppc.h |2 +-
hw/ppc/e500.c |2 +-
hw/ppc405_uc.c |2 +-
hw/ppc440_bamboo.c |2 +-
hw/ppc_booke.c |5 ++---
hw/virtex_ml507.c |2 +-
6 Dateien geändert, 7 Ze
Cleans up after passing PowerPCCPU to booke_update_irq().
Signed-off-by: Andreas Färber
---
hw/ppc_booke.c | 23 ++-
1 Datei geändert, 10 Zeilen hinzugefügt(+), 13 Zeilen entfernt(-)
diff --git a/hw/ppc_booke.c b/hw/ppc_booke.c
index da6bc4a..5748063 100644
--- a/hw/ppc_bo
Adapt helper functions to pass X86CPU / PowerPCCPU / S390CPU.
Signed-off-by: Andreas Färber
---
hw/kvm/apic.c | 10 +--
hw/kvm/clock.c |2 +-
hw/ppc.c |2 +-
hw/s390-virtio-bus.c | 12 ++--
hw/spapr.c |2 +-
kvm-all
Cleans up after passing PowerPCCPU to [h]decr exception callbacks.
Signed-off-by: Andreas Färber
---
hw/ppc.c | 18 ++
1 Datei geändert, 10 Zeilen hinzugefügt(+), 8 Zeilen entfernt(-)
diff --git a/hw/ppc.c b/hw/ppc.c
index b1b93a1..8c05eb3 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
Move kvm_vcpu_dirty field into CPUState to simplify things.
Signed-off-by: Andreas Färber
---
cpu-defs.h |3 +--
include/qemu/cpu.h |1 +
kvm-all.c | 75 ++--
kvm.h | 26 +-
target-i386/kvm.
Signed-off-by: Andreas Färber
---
cpu-defs.h |1 -
include/qemu/cpu.h |4
kvm-all.c |8 +---
3 Dateien geändert, 9 Zeilen hinzugefügt(+), 4 Zeilen entfernt(-)
diff --git a/cpu-defs.h b/cpu-defs.h
index 3669241..6373a80 100644
--- a/cpu-defs.h
+++ b/cpu-defs.
Hello,
Some review comments for SysBus EHCI were ignored in favor of merging into 1.3.
As requested by Gerd, this now follows up with the cleanups I had requested
from Peter C. Apart from using the new-style QOM casts it also achieves some
deduplification. It then goes on to implement the suggeste
This allows specific derived models to use different values.
Signed-off-by: Andreas Färber
---
hw/usb/hcd-ehci-sysbus.c | 26 --
1 Datei geändert, 24 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)
diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c
index c7b6
From: Liming Wang
Add EHCI USB host controller to exynos4210.
Signed-off-by: Liming Wang
[AF: Use type constant]
Signed-off-by: Andreas Färber
---
hw/exynos4210.c |7 +++
hw/exynos4210_gic.c |2 +-
2 Dateien geändert, 8 Zeilen hinzugefügt(+), 1 Zeile entfernt(-)
diff --git a/
SysBus EHCI was introduced in a hurry before 1.3 Soft Freeze.
To use QOM casts in place of DO_UPCAST() / FROM_SYSBUS(), we need an
identifying type. Introduce generic abstract base types for PCI and
SysBus EHCI to allow multiple types to access the shared fields.
The VMSTATE_PCI_DEVICE() macro doe
It uses a different capsbase and opregbase than the Xilinx device.
Signed-off-by: Liming Wang
Signed-off-by: Andreas Färber
Cc: Igor Mitsyanko
---
hw/usb/hcd-ehci-sysbus.c | 15 +++
hw/usb/hcd-ehci.h|2 ++
2 Dateien geändert, 17 Zeilen hinzugefügt(+)
diff --git a/hw/
This prepares an EHCI device for the Nvidia Tegra 2 SoC family.
Values based on patch by Vincent Palatin and verified against TRM v01p.
Cc: Vincent Palatin
Signed-off-by: Andreas Färber
---
hw/usb/hcd-ehci-sysbus.c | 15 +++
1 Datei geändert, 15 Zeilen hinzugefügt(+)
diff --git a
Thank you .I will modify the patch and give more infomation about the patch
在 2012年12月1日星期六，Andreas Färber 写道：
> Am 30.11.2012 16:03, schrieb Peter Maydell:
>> On 30 November 2012 07:17, Feng Gao wrote:
>>> Add OpenRisc fpu excepiton.
>>> When an exception raised, CPU can save right PC.
>>
>> Th
On 11/29/2012 9:02 PM, Peter Maydell wrote:
The GIC spec states that only interrupts with higher priority
than the value in the GICC_PMR priority mask register are
passed through to the processor. We were incorrectly allowing
through interrupts with a priority equal to the specified
value: correc
On 11/29/2012 9:02 PM, Peter Maydell wrote:
The GIC architecture specification for v1 and v2 GICs (as found
on the Cortex-A9 and newer) states that the GICC_PMR reset value
is zero; this differs from the 0xf0 reset value used on 11MPCore.
The NVIC is different again in not having a CPU interface;
On 11/29/2012 9:02 PM, Peter Maydell wrote:
Fix the code in the secondary CPU boot stubs so that it correctly
initialises the GIC rather than relying on bugs or implementation
dependent aspects of the QEMU GIC implementation:
* set the GIC_PMR.Priority field to all-ones, so that all
interru
Am 01.12.2012 16:27, schrieb Liming Wang:
> Refactor ehci-sysbus to accept different capsbase and opregbase.
> And then add exynos4210 ehci support to ehci-sysbus.
>
> Signed-off-by: Liming Wang
> ---
> hw/usb/hcd-ehci-sysbus.c | 48
> --
> 1 file c
Hello all,
As I have been browsing through QEMU's source code, I've noticed a
hardware model for a temperature sensor called TMP105. This model
implements the function tmp105_set(I2CSlave *i2c, int temp) declared
in i2c.h [0, 1].
Surprisingly, however, I cannot find any code which calls this sett
Check for a 0 "distance" value to avoid infinite loop when the
expired FCR timer was not programed with auto-increment.
With this change the behavior is coherent with the same type
of code in the exynos4210_gfrc_restart() function in the same
file.
Linux seems to mostly use this timer with auto-
On Thu, Nov 29, 2012 at 12:02 PM, Peter Maydell
wrote:
> The GIC spec states that only interrupts with higher priority
> than the value in the GICC_PMR priority mask register are
> passed through to the processor. We were incorrectly allowing
> through interrupts with a priority equal to the speci
Add ehci host controller to exynos4210.
Signed-off-by: Liming Wang
---
hw/exynos4210.c |6 ++
hw/exynos4210_gic.c |2 +-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/exynos4210.c b/hw/exynos4210.c
index 00d4db8..e0913a5 100644
--- a/hw/exynos4210.c
+++ b/hw/ex
Refactor ehci-sysbus to accept different capsbase and opregbase.
And then add exynos4210 ehci support to ehci-sysbus.
Signed-off-by: Liming Wang
---
hw/usb/hcd-ehci-sysbus.c | 48 --
1 file changed, 38 insertions(+), 10 deletions(-)
diff --git a/hw/
On Fri, Nov 30, 2012 at 2:46 PM, Mark Cave-Ayland
wrote:
> On 30/11/12 14:26, Anthony Liguori wrote:
>
>>> Try latest seabios.
>>>
>>> [ yes, /me plans to update seabios for 1.3, just waiting for the q35
>>>patches to find their way into seabios ].
>>
>>
>> If we're going to update, it's got t
On Fri, Nov 30, 2012 at 5:01 AM, Alan Jacobs wrote:
>
> Hello: I am Alan Jacobs in Green Bay Wisconsin USA ( north of Chicago). I
> have a difficult emulation question regarding interrupt driven bidirectional
> parallel port communication on a Celeron 220 Intel processor with 2GB RAM (
> but no ha
On Tue, Nov 27, 2012 at 12:19 PM, Gerd Hoffmann wrote:
> When older versions are found the internal pixman version is prefered.
Isn't this 1.3 material?
>
> Signed-off-by: Gerd Hoffmann
> ---
> configure |4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/configure
On 1 December 2012 10:29, Janne Karhunen <955...@bugs.launchpad.net> wrote:
>> this blocks forever, because the thing that would wake it up is the
> signal handler writing to the pipe we're selecting on, but we will never
> run the signal handler until select exits
>
> Duh, makes sense, have to thi
On 30 November 2012 21:38, Eduardo Habkost wrote:
> cpu_reset() is not that well-defined, otherwise we wouldn't have this on
> linux-user:
>
> #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
> cpu_reset(ENV_GET_CPU(env));
> #endif
>
> (I have no idea why we have that #
> this blocks forever, because the thing that would wake it up is the
signal handler writing to the pipe we're selecting on, but we will never
run the signal handler until select exits
Duh, makes sense, have to think about this. Thank you for great analysis
:)
Apparently have to dig into qemu's c
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