Heinz Graalfs writes:
> Rusty, here is Conny's virtio spec amendment.
>
> Cornelia Huck (1):
> virtio-ccw: Add secondary indicators.
Technically, you should have signed this off too.
But applied anyway,
Rusty.
Hi,
> http://cgit.freedesktop.org/~jwrdegoede/qemu/log/?h=usb-for-gerd
>
> Except for the "ehci: Don't process too much frames in 1 timer tick"
> patch as you've already added v2 of that :)
>
> If you want I can re-spin and send them as patches to the list.
Phew, usb backlog is merged. Can y
On 09/11/12 20:57, Aurelien Jarno wrote:
> usbredir is only used by system emulation, so add the libraries to
> libs_softmmu instead of LIBS.
Patch added to usb patch queue.
thanks,
Gerd
Il 12/09/2012 01:50, Michael S. Tsirkin ha scritto:
> +static void lsilogic_abort_command(LsilogicCmd *cmd)
> +{
> +if (cmd->req) {
> +scsi_req_cancel(cmd->req);
> +cmd->req = NULL;
> +}
> +}
This only needs to be cmd->req = NULL.
>
> +if (cmd) {
> +lsilogic_a
On Mon, Sep 10, 2012 at 04:38:51PM +1000, David Gibson wrote:
> The XICS interrupt controller used on the pseries machine currently has no
> reset handler. We can get away with this under some circumstances, but
> it's not correct, and can cause failures if the XICS happens to be in the
> wrong st
On 11.09.2012 19:53, Jan Kiszka wrote:
> Our one and only BIOS depends on a writable shadowed BIOS in the ISA
> range. As we have no interface to control the write property, make that
> region writable by default.
We've a long-standing bug --
http://bugs.debian.org/605525
https://bugs.launchpad.
On Mon, Sep 10, 2012 at 03:27:45PM +0200, Andreas Färber wrote:
> Am 10.09.2012 04:30, schrieb David Gibson:
> > cpu_physical_memory_write_rom(), despite the name, can also be used to
> > write images into RAM - and will often be used that way if the machine
> > uses load_image_targphys() into RAM
On 11.09.2012 22:57, Aurelien Jarno wrote:
> usbredir is only used by system emulation, so add the libraries to
> libs_softmmu instead of LIBS.
Fwiw, original code breaks user-static build - not it only
tries to link with unused library but also some distros
does not package/provide static (.a) li
Am 11.09.2012 19:57, schrieb Paolo Bonzini:
Il 11/09/2012 19:15, Stefan Weil ha scritto:
latest MinGW-w64 supports _gmtime32_s, but MinGW does not,
so this solution won't link with MinGW.
Do we need to support anything but latest MinGW-w64?
Paolo
Good question.
Pro:
* For 64 bit support, w
On Tue, Sep 11, 2012 at 02:34:09PM +0200, Markus Armbruster wrote:
> Bharata B Rao writes:
>
> > From: Bharata B Rao
> >
> > Make inet_parse() non static.
> >
> > - Make inet_parse() non-static so that other subsystems like gluster
> > can use it to parse inet addresses. As a pre-requisite, de
于 2012-9-12 6:52, Eric Blake 写道:
On 09/11/2012 02:31 PM, Blue Swirl wrote:
On Mon, Sep 10, 2012 at 8:26 AM, Wenchao Xia wrote:
This patch contains type and defines used in APIs, one file for public usage
by user, one for libqblock internal usage.
+
+#if __GNUC__ >= 4
#if defined(__GNU
于 2012-9-12 4:32, Blue Swirl 写道:
On Mon, Sep 10, 2012 at 8:26 AM, Wenchao Xia wrote:
This patch contains error handling APIs, which user could call them to
get error details.
Signed-off-by: Wenchao Xia
---
libqblock/libqblock-error.c | 60 +++
l
All changed, thanks.
On Mon, Sep 10, 2012 at 8:26 AM, Wenchao Xia wrote:
This patch contains the major APIs in the library.
Important APIs:
1 QBroker. These structure was used to retrieve errors, every thread must
create one first, later maybe thread related staff could be added into i
Use correct acc value to index cpu_HI/cpu_LO rather than using a fix number.
Signed-off-by: Jia Liu
---
target-mips/translate.c | 126 +--
1 file changed, 99 insertions(+), 27 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.
Add MIPS ASE DSP Compare-Pick instructions.
Signed-off-by: Jia Liu
---
target-mips/dsp_helper.c | 500 ++
target-mips/helper.h | 52 +
target-mips/translate.c | 322 -
3 files changed, 872 insertions(+), 2 delet
Add MIPS ASE DSP Load instructions.
Signed-off-by: Jia Liu
---
target-mips/translate.c | 66 +++
1 file changed, 66 insertions(+)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index dcc0905..f7bb054 100644
--- a/target-mips/translat
Add 74kf and mips64dspr2-generic-cpu model for test.
Signed-off-by: Jia Liu
---
target-mips/translate_init.c | 55 ++
1 file changed, 55 insertions(+)
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index c39138f..c6ed0ea 100644
Add MIPS ASE DSP Branch instructions.
Signed-off-by: Jia Liu
---
target-mips/translate.c | 44
1 file changed, 40 insertions(+), 4 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index a983220..dcc0905 100644
--- a/targe
On Wed, Sep 12, 2012 at 5:02 AM, Eduardo Habkost wrote:
> commit 66d5499b3754b83c09487259c08fe2ce73188a59 broke the support for
> comma-separated target lists on the --target-list option. e.g.:
>
> $ ./configure --target-list=x86_64-linux-user,x86_64-softmmu
> [...]
> ERROR: Target 'x86_64-l
i do not know. could be similar. I am doing architecture research. i
need traces of memory access for programming running under a full
system environment, so i wrote this.
i do nto seem to be able to access the linked provided from the link
you give me though.
https://projects.gso.ac.upc.edu/proj
Add MIPS ASE DSP resources access check.
Signed-off-by: Jia Liu
---
linux-user/main.c |6 ++
target-mips/cpu.h | 27 +--
target-mips/helper.c|3 +++
target-mips/translate.c | 23 +++
4 files changed, 57 insertions(+), 2
Add MIPS ASE DSP Accumulator and DSPControl Access instructions.
Signed-off-by: Jia Liu
---
target-mips/dsp_helper.c | 1009 ++
target-mips/helper.h | 52 +++
target-mips/translate.c | 425 +++
3 files changed, 1486 insertions(+
Delete DSP r1 & DSP r2 from TODO file.
Signed-off-by: Jia Liu
---
target-mips/TODO |2 --
1 file changed, 2 deletions(-)
diff --git a/target-mips/TODO b/target-mips/TODO
index 2a3546f..15d67cd 100644
--- a/target-mips/TODO
+++ b/target-mips/TODO
@@ -6,8 +6,6 @@ General
- Unimplemented ASEs
Add MIPS ASE DSP Bit/Manipulation instructions.
Signed-off-by: Jia Liu
---
target-mips/dsp_helper.c | 75 +++
target-mips/helper.h |7 ++
target-mips/translate.c | 229 +-
3 files changed, 310 insertions(+), 1 deletion(-)
diff
Add MIPS ASE DSP GPR-Based Shift instructions.
Signed-off-by: Jia Liu
---
target-mips/dsp_helper.c | 941 ++
target-mips/helper.h | 62 +++
target-mips/translate.c | 359 ++
3 files changed, 1362 insertions(+)
diff --git a/tar
Add internal functions using by MIPS ASE DSP instructions.
Signed-off-by: Jia Liu
---
target-mips/Makefile.objs |2 +-
target-mips/dsp_helper.c | 1100 +
2 files changed, 1101 insertions(+), 1 deletion(-)
create mode 100644 target-mips/dsp_helper
> I have created a set of instrument API on QEMU. one can write client
> programs that compile into shared library. the shared library is then
> loaded into qemu and extract statistics out of QEMU.
Instrument API? Same as what Liuis did?
Regards,
chenwj
[1] http://lists.gnu.org/archive/html/qe
Queued to microblaze-devs.
Thanks,
Peter
On Mon, Sep 10, 2012 at 10:20 AM, wrote:
> From: Chris Wulff
>
> Signed-off-by: Chris Wulff -by: Chris Wulff
>
Reviewed-by: Peter Crosthwaite
> ---
> hw/xilinx_timer.c |3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/hw
On Tue, 2012-09-11 at 19:27 +, Blue Swirl wrote:
> On Mon, Sep 10, 2012 at 12:20 AM, wrote:
> > From: Chris Wulff
> >
> > +/*
> > + * Xilinx ethernetlite device
> > + */
> > +static void xilinx_ethlite_probe(void *fdt, int node)
> > +{
> > +uint32_t eth_addr = fdt_get_int_from_array(fdt,
On Sun, 2012-09-09 at 20:20 -0400, crwu...@gmail.com wrote:
> From: Chris Wulff
>
> Signed-off-by: Chris Wulff
> ---
> device_tree.c | 88
> +
> device_tree.h | 18
> 2 files changed, 106 insertions(+)
>
> diff --git a/d
Are you able to reproduce this either with an Ubuntu guest, or on a
12.04 (Precise) host?
** Changed in: qemu-kvm (Ubuntu)
Status: New => Incomplete
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bu
** Changed in: qemu-kvm (Ubuntu)
Status: Incomplete => New
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/917824
Title:
qemu loops/hangs on extending qcow2-diskspace
Status in QEMU:
New
St
On Tue, Sep 11, 2012 at 11:15:50AM -0500, Anthony Liguori wrote:
> Jan Kiszka writes:
> > On 2012-09-11 05:02, Kevin O'Connor wrote:
> >> The easiest way to fix this is to change QEMU to boot with the area
> >> read-write. There's no real gain in booting with the memory read-only
> >> as the firs
Hi Chris,
This needs to be reviewed along with the petalogix implementation, but a
few top level comments.
Regards,
Peter
On Sun, 2012-09-09 at 20:20 -0400, crwu...@gmail.com wrote:
> From: Chris Wulff
>
> Signed-off-by: Chris Wulff
> ---
> default-configs/microblaze-softmmu.mak |1 +
>
Hi Chris,
On Sun, 2012-09-09 at 20:19 -0400, crwu...@gmail.com wrote:
> From: Chris Wulff
>
> This set of patches adds support for the Altera NiosII soft-core processor,
> along with the hardware drivers needed to boot linux. I have tested the
> soft-mmu
> target and can boot to a shell with uC
On 09/11/2012 03:56 PM, Xin Tong wrote:
> Some of the files in the instrumentation module depends on TCGv. i
> just want to find a way to include the tcg-op.h. it is not easy as it
> is architecture dependent.
It's not. Look at some of the other files in tcg/.
r~
Somehow the original patch set never arrived here. Replying indirectly...
> On Sun, Sep 09, 2012 at 08:19:59PM -0400, crwu...@gmail.com wrote:
>> diff --git a/target-nios2/exec.h b/target-nios2/exec.h
...
>> +static inline int cpu_has_work(CPUState *env)
>> +{
>> +return env->interrupt_reques
On Tue, Sep 11, 2012 at 9:12 AM, Richard Henderson wrote:
> On 09/10/2012 08:17 PM, Xin Tong wrote:
>> I have 2 questions about TCGv.
>>
>> 1. if DEBUG is enabled on TCGv, TCGv is wrapped in a C struct. and
>> would it not be very expensive to pass TCGv by copy for all the
>> tcg_gen_xxx function
On 09/11/2012 02:31 PM, Blue Swirl wrote:
> On Mon, Sep 10, 2012 at 8:26 AM, Wenchao Xia
> wrote:
>> This patch contains type and defines used in APIs, one file for public
>> usage
>> by user, one for libqblock internal usage.
>>
>> +
>> +#if __GNUC__ >= 4
>
> #if defined(__GNUC__) && __GNUC
On 09/11/2012 02:34 PM, Aurelien Jarno wrote:
> Minor nitpick: it's better to write:
>
>tcg_gen_add_tl(addr, addr, dc->cpu_R[instr->a]);
>
> as the code generator on non-RISC hosts usually generate a slightly tiny
> better code.
You know... we already swap operands for constants. It wou
From: Jan Kiszka
This variable is no longer bound to irqchip, and the IOCTL sets the IRQ
level, does not directly inject it. No functional changes.
Reviewed-by: Peter Maydell
Signed-off-by: Jan Kiszka
Signed-off-by: Marcelo Tosatti
---
kvm-all.c | 10 +-
1 files changed, 5 insertio
From: Peter Maydell
Move the init of the irqchip_inject_ioctl field of KVMState out of
kvm_irqchip_create() and into kvm_init(), so that kvm_set_irq()
can be used even when no irqchip is created (for architectures
that support async interrupt notification even without an in
kernel irqchip).
Sign
From: Jan Kiszka
Flush pending coalesced MMIO before performing mapping or state changes
that could affect the event orderings or route the buffered requests to
a wrong region.
Signed-off-by: Jan Kiszka
Signed-off-by: Marcelo Tosatti
---
memory.c |1 +
1 files changed, 1 insertions(+), 0
From: Jan Kiszka
Simplify the code as we are using now only a subset of the original
features of memory_region_update_topology.
Signed-off-by: Jan Kiszka
Signed-off-by: Marcelo Tosatti
---
memory.c | 39 +++
1 files changed, 11 insertions(+), 28 deletions
From: Jan Kiszka
Wrap also simple operations consisting only of a single step with
memory_region_transaction_begin/commit. This allows to perform
additional steps like coalesced MMIO flushing from a single place.
This requires dropping some micro-optimizations: The skipping of
topology updates a
From: Jan Kiszka
The memory subsystem will now take care of flushing whenever affected
regions are accessed or the memory mapping changes.
Signed-off-by: Jan Kiszka
Signed-off-by: Marcelo Tosatti
---
kvm-all.c |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/kvm-all.c
From: Peter Maydell
Rather than hardcoding the list of architectures in the kernel
header update script, just import headers for every architecture
which supports KVM (with a blacklist exception for ia64 which
has KVM headers but is dead). This reduces the number of QEMU
files which need to be up
From: Jan Kiszka
In preparation of stopping to flush coalesced MMIO unconditionally on
vmexits, mark VGA MMIO and PIO regions as synchronous /wrt coalesced
MMIO and flush the buffer explicitly on PIO accesses that do not use
generic memory regions yet.
Signed-off-by: Jan Kiszka
Signed-off-by: M
The following changes since commit e0a1e32dbc41e6b2aabb436a9417dfd32177a3dc:
Merge branch 'usb.64' of git://git.kraxel.org/qemu (2012-09-11 18:06:56 +0200)
are available in the git repository at:
git://git.kernel.org/pub/scm/virt/kvm/qemu-kvm.git uq/master
Jan Kiszka (7):
memory: Flus
From: Jan Kiszka
Instead of flushing pending coalesced MMIO requests on every vmexit,
this provides a mechanism to selectively flush when memory regions
related to the coalesced one are accessed. This first of all includes
the coalesced region itself but can also applied to other regions, e.g.
of
On 09/11/2012 12:11 PM, Blue Swirl wrote:
> PSW_MASK_64 bit could be added to TB flags and that could be checked
> during translation, then the mask needs to be applied only when the
> mode is active. Whether that actually improves performance depends on
> how often the bit is changed. Also all PSW
On 11.09.2012, at 21:05, Scott Wood wrote:
> On 09/11/2012 06:33 AM, Alexander Graf wrote:
>> On 09/07/2012 08:58 PM, Scott Wood wrote:
>>> I wasn't suggesting that they be different devices. I was suggesting
>>> that this isn't a property of the PCI controller, but rather of some
>>> other en
On Mon, Sep 10, 2012 at 2:20 PM, Gerd Hoffmann wrote:
> Display works, requires truecolor framebuffer with 16 or 32 bpp on the
> host. 32bpp is recommended. The framebuffer is used as-is, qemu
> doesn't try to switch modes. With LCD displays mode switching is pretty
> pointless IMHO, also it wo
On Mon, Sep 10, 2012 at 8:26 AM, Wenchao Xia wrote:
> This patch contains error handling APIs, which user could call them to
> get error details.
>
> Signed-off-by: Wenchao Xia
> ---
> libqblock/libqblock-error.c | 60
> +++
> libqblock/libqblock-erro
On Mon, Sep 10, 2012 at 8:26 AM, Wenchao Xia wrote:
> This patch contains type and defines used in APIs, one file for public usage
> by user, one for libqblock internal usage.
>
> Signed-off-by: Wenchao Xia
> ---
> libqblock/libqblock-internal.h | 50
> libqblock/libqblock-types.h
This remove the fallback to std-vga in case, as availability of the
requested vga device is now tested in vl.c, and returns an error message
to the user.
Acked-by: Richard Henderson
Signed-off-by: Aurelien Jarno
---
hw/alpha_dp264.c |2 +-
hw/alpha_pci.c | 24
h
Check for qxl availability in vl.c. This will allow to remove #ifdef
CONFIG_SPICE .. #endif later in this series
Cc: Anthony Liguori
Cc: Gerd Hoffmann
Signed-off-by: Aurelien Jarno
---
vl.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/vl.c b/vl.c
index f7e
As a bonus it allows new vga card types (including none).
Cc: Alexander Graf
Signed-off-by: Aurelien Jarno
---
hw/ppc_oldworld.c |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/ppc_oldworld.c b/hw/ppc_oldworld.c
index 8267eb4..2c4a478 100644
--- a/hw/ppc_oldworld.c
+
On Mon, Sep 10, 2012 at 8:26 AM, Wenchao Xia wrote:
> This patch contains the major APIs in the library.
> Important APIs:
> 1 QBroker. These structure was used to retrieve errors, every thread must
> create one first, later maybe thread related staff could be added into it.
> 2 QBlockState.
Signed-off-by: Aurelien Jarno
---
hw/mips_malta.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index c39dee5..632b466 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -33,7 +33,6 @@
#include "mips.h"
#include "mips_cpudev
Keep the case to prevent some vga card to be selected.
Cc: Alexander Graf
Cc: David Gibson
Signed-off-by: Aurelien Jarno
---
hw/spapr.c |7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/hw/spapr.c b/hw/spapr.c
index 80735d6..8b0c390 100644
--- a/hw/spapr.c
+++ b/hw/
This function create a ISA VGA device according to the value of
vga_interface_type. It returns a ISADevice (and not a DeviceState).
Signed-off-by: Aurelien Jarno
---
hw/isa-bus.c | 20
hw/isa.h |2 ++
2 files changed, 22 insertions(+)
diff --git a/hw/isa-bus.c b/h
As a bonus it allows new vga card types (including none).
Cc: Alexander Graf
Signed-off-by: Aurelien Jarno
---
hw/ppc_newworld.c |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/ppc_newworld.c b/hw/ppc_newworld.c
index 84af948..b8d3c9c 100644
--- a/hw/ppc_newworld.c
+
Signed-off-by: Aurelien Jarno
---
vl.c |8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/vl.c b/vl.c
index ba2fa9f..6ca27f5 100644
--- a/vl.c
+++ b/vl.c
@@ -3606,8 +3606,12 @@ int main(int argc, char **argv, char **envp)
exit(1);
/* If no default VGA i
This function create a PCI VGA device according to the value of
vga_interface_type. It returns a PCIDevice (and not a DeviceState).
Cc: Anthony Liguori
Signed-off-by: Aurelien Jarno
---
hw/pci.c | 18 ++
hw/pci.h |3 +++
2 files changed, 21 insertions(+)
diff --git a/hw/p
And get rid of qdev_exists().
Signed-off-by: Aurelien Jarno
---
hw/qdev.c |5 -
hw/qdev.h |1 -
vl.c |7 ---
3 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/hw/qdev.c b/hw/qdev.c
index b5a52ac..0eb30a2 100644
--- a/hw/qdev.c
+++ b/hw/qdev.c
@@ -52,11 +52,6
As a bonus it allows new vga card types (including none).
Acked-by: Blue Swirl
Signed-off-by: Aurelien Jarno
---
hw/sun4u.c |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index cca090f..137a7c6 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -39,7 +
This patch series tries to simplify ISA/PCI video card initialization
and to avoid having the same (buggy) code more or less duplicated in
various machines.
It creates a new isa_vga_init() and a new pci_vga_init() functions that
take care of initializing the requested ISA/PCI video card. It avoid
This better explains what is this function about. Adjust all callers.
Cc: Richard Henderson
Cc: Alexander Graf
Cc: Andreas Färber
Cc: David Gibson
Cc: Anthony Liguori
Acked-by: Blue Swirl
Acked-by: Andreas Färber
Signed-off-by: Aurelien Jarno
---
hw/alpha_pci.c|2 +-
hw/mips_malta
usbredir is only used by system emulation, so add the libraries to
libs_softmmu instead of LIBS.
Cc: Michael Tokarev
Cc: Gerd Hoffmann
Signed-off-by: Aurelien Jarno
---
configure |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index 7656c32..cf2621a
Now that all machines call isa_vga_init() or pci_vga_init(), some unused
code can be removed.
Cc: Anthony Liguori
Signed-off-by: Aurelien Jarno
---
hw/cirrus_vga.c |6 --
hw/pc.h | 13 -
hw/vga-pci.c|6 --
hw/vga-pci.h| 12
hw/vmware_
On Mon, Sep 10, 2012 at 12:20 AM, wrote:
> From: Chris Wulff
>
> Signed-off-by: Chris Wulff
> ---
> hw/Makefile.objs |5 ++
> hw/altera.h| 34
> hw/altera_timer.c | 198 +++
> hw/altera_uart.c | 218
> ++
On 09/06/12 16:05, Eduardo Habkost wrote:
The -cpu configuration interface is based on a list of feature names or
properties, on a single namespace, so there's no need to mention on
which CPUID leaf/register each flag is located.
Signed-off-by: Eduardo Habkost
---
target-i386/cpu.c | 8 -
On 09/06/12 16:05, Eduardo Habkost wrote:
Instea of using a hardcoded hex constant, define CPUID_EXT2_AMD_ALIASES
as the set of CPUID[8000_0001].EDX bits that on AMD are the same as the
bits of CPUID[1].EDX.
Signed-off-by: Eduardo Habkost
Reviewed-By: Igor Mammedov
---
target-i386/cpu.h | 1
On 09/06/12 16:05, Eduardo Habkost wrote:
Instead of having duplicate feature names on the ext2_feature array for
the AMD feature bit aliases, we keep the feature names only on the
feature_name[] array, and copy the corresponding bits to
cpuid_ext2_features in case the CPU vendor is AMD.
This w
On 09/06/12 16:05, Eduardo Habkost wrote:
Both constants have the same value, but CPUID_EXT2_AMD_ALIASES is
defined without using magic numbers.
Signed-off-by: Eduardo Habkost
---
target-i386/cpu.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/tar
As a bonus it allows new vga card types (including none).
Acked-by: Andreas Färber
Signed-off-by: Aurelien Jarno
---
hw/ppc_prep.c |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 1fa7609..1544430 100644
--- a/hw/ppc_prep.c
+++ b/hw/pp
The CONFIG_SPICE is now tested in vl.c and thus not needed anymore.
Cc: Anthony Liguori
Signed-off-by: Aurelien Jarno
---
hw/pc.c | 35 ++-
1 file changed, 6 insertions(+), 29 deletions(-)
diff --git a/hw/pc.c b/hw/pc.c
index e3d4631..562d288 100644
--- a/hw/p
This better explains what is this function about. Adjust all callers.
Cc: Anthony Liguori
Signed-off-by: Aurelien Jarno
---
hw/mips_r4k.c |2 +-
hw/pc.c |2 +-
hw/pc.h |2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c
ind
On 09/06/12 16:05, Eduardo Habkost wrote:
Bit 10 of CPUID[8000_0001].EDX is not defined as an alias of
CPUID[1].EDX[10], so do not duplicate it on
kvm_arch_get_supported_cpuid().
Signed-off-by: Eduardo Habkost
Reviewed-By: Igor Mammedov
---
target-i386/kvm.c | 2 +-
1 file changed, 1 insert
Signed-off-by: Aurelien Jarno
---
hw/mips_r4k.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c
index 2115f7f..967a76e 100644
--- a/hw/mips_r4k.c
+++ b/hw/mips_r4k.c
@@ -281,7 +281,7 @@ void mips_r4k_init (ram_addr_t ram_size,
}
}
On 09/05/12 16:41, Eduardo Habkost wrote:
Make source code lines shorter.
Signed-off-by: Eduardo Habkost
---
target-i386/cpu.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 73302d8..e13e6d5 100644
--- a/target-
On 09/10/12 09:40, Igor Mammedov wrote:
On Wed, 5 Sep 2012 17:41:10 -0300
Eduardo Habkost wrote:
Those models are maintained by QEMU and may require compatibility code
to be added when making some changes. Keeping the data in the C source
code should make it simpler to handle those details.
On 09/07/12 16:54, Igor Mammedov wrote:
it will allow to use property setters there later.
Signed-off-by: Igor Mammedov
--
v2:
style change, add braces (reqested by Blue Swirl)
---
target-i386/cpu.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a
On Mon, Sep 10, 2012 at 12:20 AM, wrote:
> From: Chris Wulff
>
> Signed-off-by: Chris Wulff
> ---
> default-configs/nios2-linux-user.mak |1 +
> default-configs/nios2-softmmu.mak|6 +
> hw/labx_nios2_devicetree.c | 665
> ++
> hw/nios2/Ma
On Mon, Sep 10, 2012 at 12:20 AM, wrote:
> From: Chris Wulff
>
> Signed-off-by: Chris Wulff
> ---
> default-configs/microblaze-softmmu.mak |1 +
> hw/labx_microblaze_devicetree.c| 597
>
> hw/microblaze/Makefile.objs|3 +-
> 3 file
On 09/11/2012 06:33 AM, Alexander Graf wrote:
> On 09/07/2012 08:58 PM, Scott Wood wrote:
>> I wasn't suggesting that they be different devices. I was suggesting
>> that this isn't a property of the PCI controller, but rather of some
>> other entity to which the PCI controller connects. So maybe
On Sun, Sep 9, 2012 at 9:05 PM, Richard Henderson wrote:
> Signed-off-by: Richard Henderson
> ---
> target-s390x/helper.h | 4 +-
> target-s390x/insn-data.def | 4 ++
> target-s390x/mem_helper.c | 119
> ++---
> target-s390x/translate.c | 42
commit 66d5499b3754b83c09487259c08fe2ce73188a59 broke the support for
comma-separated target lists on the --target-list option. e.g.:
$ ./configure --target-list=x86_64-linux-user,x86_64-softmmu
[...]
ERROR: Target 'x86_64-linux-user,x86_64-softmmu' not recognised
$
This patch restores th
On Mon, Sep 10, 2012 at 06:00:54PM -0500, Anthony Liguori wrote:
> "Daniel P. Berrange" writes:
>
> > From: "Daniel P. Berrange"
> >
> > Allow passing of '--target-list=' to configure to request that
> > all targets are to be disabled. This allows for doing a very
> > fast tools-only build of th
This is the second version of this series, trying to get rid of manual
NaN propagation for PPC vector functions, aka altivec (note that the
same work is still to be done on the FPU).
The first patch in this series provides from the "target-xtensa:
implement FP coprocessor option" series. I don't r
Commit e024e881bb1a8b5085026589360d26ed97acdd64 provided a pickNaN()
function for PowerPC, implementing the correct NaN propagation rules.
Therefore there is no need to test the operands manually, we can rely
on the softfloat code to do that.
Cc: Alexander Graf
Signed-off-by: Aurelien Jarno
---
Use the new softfloat float32_muladd() function to implement the vmaddfp
and vnmsubfp instructions. As a bonus we can get rid of the call to the
HANDLE_NAN3 macro, as the NaN handling is directly done at the softfloat
level.
Cc: Alexander Graf
Signed-off-by: Aurelien Jarno
---
target-ppc/int_he
From: Max Filippov
Flags passed into float{32,64}_muladd are treated as bits; assign
independent bits to float_muladd_negate_* to allow precise control over
what gets negated in float{32,64}_muladd.
Cc: Alexander Graf
Cc: Peter Maydell
Reviewed-by: Aurelien Jarno
Signed-off-by: Max Filippov
Use the new softfloat float32_min() and float32_max() to implement the
vminfp and vmaxfp instructions. As a bonus we can get rid of the call to
the HANDLE_NAN2 macro, as the NaN handling is directly done at the
softfloat level.
Cc: Alexander Graf
Signed-off-by: Aurelien Jarno
---
target-ppc/int
We can finally get rid of the ugly HANDLE_NAN{1,2,3} macros.
Cc: Alexander Graf
Signed-off-by: Aurelien Jarno
---
target-ppc/int_helper.c | 21 -
1 file changed, 21 deletions(-)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 6f9beff..f39b4f6 100644
-
Andreas Färber a écrit :
Am 01.08.2012 17:48, schrieb Hervé Poussineau:
Anthony Liguori a écrit :
Hervé Poussineau writes:
Anthony Liguori a écrit :
On 07/06/2012 04:53 PM, Hervé Poussineau wrote:
QEMU exit (which can be guest triggered) can be replaced by:
-device isa-debugexit,iobase=0x5
Are there any other requirements that need to be taken care of to enable
execution of QEMU guests under separate unprivileged user IDs (ie. DAC
isolation)?
At this point, this patch series (Per-guest configurable user/group for
QEMU processes) is upstream, allowing libvirt to execute guests un
Il 11/09/2012 19:15, Stefan Weil ha scritto:
> latest MinGW-w64 supports _gmtime32_s, but MinGW does not,
> so this solution won't link with MinGW.
Do we need to support anything but latest MinGW-w64?
Paolo
On Tue, Sep 11, 2012 at 07:46:13AM +0200, Gerd Hoffmann wrote:
> On 09/10/12 19:49, Anthony Liguori wrote:
> > Andreas Färber writes:
> >
> >> Am 10.09.2012 15:37, schrieb Gerd Hoffmann:
> >>> Hi,
> >>>
> | hw/usb/hcd-xhci.c: In function ‘xhci_fire_ctl_transfer’:
> | hw/usb/hcd-xhci.c
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