Am 15.10.2011 23:52, schrieb Max Filippov:
On Mon, Oct 10, 2011 at 2:25 AM, Max Filippov wrote:
Max Filippov (7):
target-xtensa: increase xtensa options accuracy
target-xtensa: remove hand-written xtensa cores implementations
target-xtensa: implement external interrupt mapping
target-xt
Hi *,
I have the following question regarding qemu binary translation of
target-i386 (and maybe other targets):
As far as I understood the code, when a basic block is executed, there
is no event which can interrupt the execution until the bbl reaches its
end and the control flow is then back at q
Introduce overlay_tool.h that defines core configuration blocks from
data available in the linux architecture variant overlay.
Overlay data is automatically generated in the core configuration
process by Tensilica tools and can be directly converted to qemu xtensa
core description by overlay_tool.
This is to get aligned with the linux name for this machine.
Signed-off-by: Max Filippov
---
Makefile.target |2 +-
hw/xtensa_dc232b.c| 116 -
hw/xtensa_sim.c | 116 +
tests/xten
This is Diamond 232L Standard Core Rev.B (LE), implemented through
linux/gdb overlay.
Signed-off-by: Max Filippov
---
v1 -> v2 changes: fix stylistical issues in core-isa.h
---
Makefile.target|1 +
target-xtensa/core-dc232b.c| 28 ++
target-xtensa/core-
Please apply it after 'target-xtensa: add overlay parsing header' series.
Max Filippov (2):
hw: add OpenCores 10/100 Mbps Ethernet controller
target-xtensa: add Avnet LX60/LX110/LX200 boards
Makefile.objs|1 +
Makefile.target |1 +
default
This is OpenCores Ethernet MAC + subset of National Semiconductors
DP83838C PHY.
OpenCores Ethernet MAC project: http://opencores.org/project,ethmac
Signed-off-by: Max Filippov
---
Makefile.objs |1 +
hw/opencores_eth.c | 728
trace-
These boards carry similar hardware: SDRAM (48M for LX110, 64M for LX60,
96M for LX200), 16 Mbyte FLASH, FPGA, 10/100 Mbps Ethernet PHY and 16550
UART. FPGA may be loaded with almost any Tensilica processor. It is also
used to implement Ethernet MAC, e.g. OpenCores 10/100 Mbps Ethernet MAC
and LED/
Signed-off-by: Max Filippov
---
Makefile.target |1 -
hw/xtensa_sample.c| 107 ---
target-xtensa/gdb-config-dc232b.c | 261 -
target-xtensa/gdb-config-sample-xtensa-core.c | 375 --
This is FSF big endian core implemented through linux overlay.
Signed-off-by: Max Filippov
---
v1 -> v2 changes:
- remove GDB register definitions due to their GPL3 license;
- fix stylistical issues in core-isa.h
---
Makefile.target |1 +
target-xtensa/core-fsf.c
Max Filippov (7):
target-xtensa: increase xtensa options accuracy
target-xtensa: remove hand-written xtensa cores implementations
target-xtensa: implement external interrupt mapping
target-xtensa: extract core configuration from overlay
target-xtensa: add dc232b core
target-xtensa: add
Xtensa cores may have different mapping of external interrupt pins to
internal IRQ numers. Implement API to acquire core IRQ by its external
interrupt number.
Signed-off-by: Max Filippov
---
hw/xtensa_pic.c | 12
target-xtensa/cpu.h |3 +++
2 files changed, 15 insertions(+
- add separate options for each operation in the MISC_OP;
- add an option for MULSH/MULUH;
- put S32C1I under conditional store option.
Signed-off-by: Max Filippov
---
target-xtensa/cpu.h |6 +-
target-xtensa/translate.c | 14 +++---
2 files changed, 12 insertions(+), 8 d
> On Mon, Oct 10, 2011 at 2:27 AM, Max Filippov wrote:
> > Max Filippov (2):
> > hw: add OpenCores 10/100 Mbps Ethernet controller
> > target-xtensa: add Avnet LX60/LX110/LX200 boards
>
> These patches depend on the 7-patch series. Please mention if the
> patch sets depend on other patch sets i
> On Mon, Oct 10, 2011 at 2:25 AM, Max Filippov wrote:
> > Max Filippov (7):
> > target-xtensa: increase xtensa options accuracy
> > target-xtensa: remove hand-written xtensa cores implementations
> > target-xtensa: implement external interrupt mapping
> > target-xtensa: extract core configura
Thanks, applied.
On Mon, Oct 10, 2011 at 2:25 AM, Max Filippov wrote:
> Signed-off-by: Max Filippov
> ---
> qemu-doc.texi | 55 +++
> qemu-tech.texi | 40 +---
> 2 files changed, 88 insertions(+), 7 del
Thanks, applied both patches.
On Mon, Oct 10, 2011 at 2:25 AM, Max Filippov wrote:
> Max Filippov (2):
> target-xtensa: implement MAC16 option
> target-xtensa: add MAC16 unit tests
>
> target-xtensa/cpu.h | 3 +
> target-xtensa/translate.c | 135 +-
> tests/xt
Thanks, applied.
On Mon, Oct 10, 2011 at 2:25 AM, Max Filippov wrote:
> QEMU timer is used to post CCOMPARE interrupt when the core is halted.
> If that CCOMPARE interrupt is masked off then the timer must be rearmed
> in the callback, otherwise it will be rearmed next time the core goes to
> hal
Thanks, applied both. I tested ARM and Sparc32 nographic modes which
IIRC were the problem previously, both seem to work fine.
On Fri, Sep 30, 2011 at 10:31 AM, Jan Kiszka wrote:
> This is conceptually cleaner and will allow us to drop the nographic
> timer. Moreover, it will be mandatory to full
On Mon, Oct 10, 2011 at 2:27 AM, Max Filippov wrote:
> Max Filippov (2):
> hw: add OpenCores 10/100 Mbps Ethernet controller
> target-xtensa: add Avnet LX60/LX110/LX200 boards
These patches depend on the 7-patch series. Please mention if the
patch sets depend on other patch sets instead of git
On Mon, Oct 10, 2011 at 2:25 AM, Max Filippov wrote:
> Max Filippov (7):
> target-xtensa: increase xtensa options accuracy
> target-xtensa: remove hand-written xtensa cores implementations
> target-xtensa: implement external interrupt mapping
> target-xtensa: extract core configuration from ov
On Fri, Oct 7, 2011 at 7:19 AM, Jan Kiszka wrote:
> Highlights of this series:
> - generic i8259, now part of hwlib
> - qdev conversion of i8259
> - fix for i8259 poll mode (and removal of PREP hack)
>
> The refactoring will also be important to instantiate i8259-kvm devices
> for in-kernel irq
On Sat, Oct 15, 2011 at 10:00:02AM +, Blue Swirl wrote:
> I don't understand why PC can't use the same way of loading initrd by
> QEMU to guest memory before boot as Sparc32 uses. It should even be
> possible to deduplicate the kernel and initrd images: improve the
> loader to use mmap() for lo
Dear Mr. Johannes Schindelin,
I needed your help in understanding and doing few modifications in VVFAT
(vvfat.c).
I am working for Samsung india for Linux mobile platform division.
We wanted to experiment on VVFAT and plan to integrate it for one of our Linux
mobile platform.
But before that we
On Tue, Oct 11, 2011 at 08:17:28AM -0500, Anthony Liguori wrote:
> On 10/11/2011 04:55 AM, Avi Kivity wrote:
> >On 10/11/2011 11:50 AM, Gleb Natapov wrote:
> >>But loading MBs of data through fw_cfg interface is just abusing it.
> >>You wouldn't use pio on real HW to move megabytes of data and expe
This is FSF big endian core implemented through linux/gdb overlay.
Signed-off-by: Max Filippov
---
v1 -> v2 change: remove GDB register definitions due to their GPL3 license
---
Makefile.target |1 +
target-xtensa/core-fsf.c | 22 +++
target-xtensa/core-fsf/core
Fix incorrect order of arguments, letting writes to NVRAM succeed.
It looks like guests never write to the device, only read from it, since the bug
originates back to 819385c58b319d9f80d676cefaed0610118f03ac.
Signed-off-by: Blue Swirl
---
hw/m48t59.c |2 +-
1 files changed, 1 insertions(+),
Remove now incorrect address base arithmetic, missed by
9936d6e42392f1440505dfa9df065eabd251cadf. Fixes Sparc64 boot.
Signed-off-by: Blue Swirl
---
hw/m48t59.c |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/hw/m48t59.c b/hw/m48t59.c
index f318e67..dba5796 100644
--- a/
On Sat, Oct 15, 2011 at 1:44 PM, Max Filippov wrote:
>> > Nack. GPLv3 is by design incompatible with GPLv2only (but not with
>> > GPLv2+ or IIRC BSD-like) licenses. Please only use code from GDB
>> > before v3 switch.
>>
>> Ok, let's drop this patch. Fortunately nothing really depends on it.
>> I
> > Nack. GPLv3 is by design incompatible with GPLv2only (but not with
> > GPLv2+ or IIRC BSD-like) licenses. Please only use code from GDB
> > before v3 switch.
>
> Ok, let's drop this patch. Fortunately nothing really depends on it.
> I could re-format xtensa-config.c from gdb-6.6, but register
> > diff --git a/target-xtensa/core-fsf/gdb-config.c
> > b/target-xtensa/core-fsf/gdb-config.c
> > new file mode 100644
> > index 000..6705d9c
> > --- /dev/null
> > +++ b/target-xtensa/core-fsf/gdb-config.c
> > @@ -0,0 +1,152 @@
> > +/* Configuration for the Xtensa architecture for GDB, the GN
The following changes since commit ebffe2afceb1a17b5d134b5debf553955fe5ea1a:
Merge remote-tracking branch 'qmp/queue/qmp' into staging (2011-10-10
08:21:46 -0500)
are available in the git repository at:
git://repo.or.cz/qemu/v9fs.git for-upstream-6
Aneesh Kumar K.V (7):
hw/9pfs: Use
On Tue, Oct 11, 2011 at 8:23 AM, Daniel P. Berrange wrote:
> On Mon, Oct 10, 2011 at 09:01:52PM +0200, Alexander Graf wrote:
>>
>> On 10.10.2011, at 20:53, Anthony Liguori wrote:
>>
>> > On 10/10/2011 12:08 PM, Daniel P. Berrange wrote:
>> >> With the attached patches applied to QEMU and SeaBios,
On Mon, Oct 10, 2011 at 2:49 PM, Anthony Liguori wrote:
> Due to:
>
> commit e3193601c84558c303b1773379da76fce80c0a56
> Author: Anthony Liguori
> Date: Fri Sep 2 12:34:47 2011 -0500
>
> qapi: use middle mode in QMP server
>
> It'll be necessary to do a make clean if you have a tree that
On Mon, Oct 10, 2011 at 2:26 AM, Max Filippov wrote:
> This is FSF big endian core implemented through linux/gdb overlay.
>
> Signed-off-by: Max Filippov
> ---
> Makefile.target | 1 +
> target-xtensa/core-fsf.c | 28 +++
> target-xtensa/core-fsf/core-isa.h
35 matches
Mail list logo
