Signed-off-by: Brad Hards
---
hw/usb-uhci.c | 58 ++--
hw/usb.h |6 +
2 files changed, 41 insertions(+), 23 deletions(-)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index 346db3e..210b918 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uh
On Fri, Apr 22, 2011 at 04:35:11PM +1000, ronnie sahlberg wrote:
> Ok, I am confused
And this time it's my fault, sorry.
> I have to set FUA if the WB(I guessed this meant write-back) flag is set?
> Not the opposite (I assume opposite of write-back is write-through) ?
Sorry, I meant exactly the
Ok, I am confused
On Fri, Apr 22, 2011 at 4:13 PM, Christoph Hellwig wrote:
> On Fri, Apr 22, 2011 at 04:08:57PM +1000, ronnie sahlberg wrote:
>> So I should set FUA when
>> BDRV_O_CACHE_WB==0 or BDRV_O_NOCACHE==1
>> right?
>
> At this point you need to set it if either the BDRV_O_CACHE_WB and
On 04/21/2011 03:50 AM, Jes Sorensen wrote:
On 04/18/11 17:02, Michael Roth wrote:
+static const char *ga_log_level_str(GLogLevelFlags level)
+{
+switch (level& G_LOG_LEVEL_MASK) {
+case G_LOG_LEVEL_ERROR: return "error";
+case G_LOG_LEVEL_CRITICAL: return "critical";
+
2011/4/22 Nguyễn Thái Ngọc Duy :
> @@ -288,6 +291,10 @@ static NetSocketState
> *net_socket_fd_init_dgram(VLANState *vlan,
>
> s = DO_UPCAST(NetSocketState, nc, nc);
>
> + s->mtu = mtu;
> + s->buf = qemu_malloc(s->mtu);
> + s->buf1 = qemu_malloc(s->mtu);
These need to be freed in net
On Fri, Apr 22, 2011 at 04:08:57PM +1000, ronnie sahlberg wrote:
> So I should set FUA when
> BDRV_O_CACHE_WB==0 or BDRV_O_NOCACHE==1
> right?
At this point you need to set it if either the BDRV_O_CACHE_WB and
BDRV_O_NOCACHE flags are set. And yes, the naming of the nocache
flag is rather confu
Thanks,
On Fri, Apr 22, 2011 at 2:08 PM, Christoph Hellwig wrote:
> On Fri, Apr 22, 2011 at 06:23:58AM +1000, ronniesahlb...@gmail.com wrote:
>> iSCSI block driver for QEMU
>>
>> Please find an updated iSCSI patch.
>> This patch adds setting FUA on all writes when the bit
>> BDRV_O_CACHE_WB is no
On Fri, Apr 22, 2011 at 06:23:58AM +1000, ronniesahlb...@gmail.com wrote:
> iSCSI block driver for QEMU
>
> Please find an updated iSCSI patch.
> This patch adds setting FUA on all writes when the bit
> BDRV_O_CACHE_WB is not set.
At this point you need to check for BDRV_O_CACHE_WB and BDRV_O_NOC
Also mention the default value 4096.
Signed-off-by: Nguyễn Thái Ngọc Duy
---
I have a driver that sends 4352 byte packets. Tested with tcp socket only.
There's also 4096 byte buffers in vde, but I don't use/test it.
net.c |4
net/socket.c| 54 +
On 21 April 2011 18:45, Stefan Weil wrote:
> Am 21.04.2011 15:10, schrieb Peter Maydell:
>> Add support for getting configure to print the list of all targets
>> that can be built, via the option '--target-list=?'.
> The qemu executable supports this use pattern (-cpu ?),
> but it's unusual for c
On Thu, Apr 21, 2011 at 9:45 PM, Igor Kovalenko
wrote:
> On Thu, Apr 21, 2011 at 7:44 PM, Laurent Desnogues
> wrote:
>> On Thu, Apr 21, 2011 at 4:57 PM, Artyom Tarasenko
>> wrote:
>>> On Tue, Apr 12, 2011 at 4:14 AM, Igor Kovalenko
>>> wrote:
>> Do you have public test case?
>> It is p
List,
This updated version of the patch adds setting FUA on all writes
unless the writeback flag is set.
regards
ronnie sahlberg
On 04/21/2011 09:10 AM, Jes Sorensen wrote:
On 04/18/11 17:02, Michael Roth wrote:
These apply on top of Anthony's glib tree, commit
03d5927deb5e6baebaade1b4c8ff2428a85e125c currently, and can also be obtained
from:
git://repo.or.cz/qemu/mdroth.git qga_v2
Patches 1-8 are general json/QAPI-rel
On Thu, Apr 21, 2011 at 10:49 PM, Christoph Hellwig wrote:
> On Thu, Apr 21, 2011 at 09:36:12PM +1000, ronnie sahlberg wrote:
>> There are some high-volume arrays that advertise support but fail any
>> cdb with FUA, FUA_NV bits set with sense, so it needs to be made optional.
>
> Which on would th
From: Ronnie Sahlberg
This patch adds a new block driver : block.iscsi.c
This driver interfaces with the multiplatform posix library
for iscsi initiator/client access to iscsi devices hosted at
git://github.com/sahlberg/libiscsi.git
The patch adds the driver to interface with the iscsi library.
iSCSI block driver for QEMU
Please find an updated iSCSI patch.
This patch adds setting FUA on all writes when the bit
BDRV_O_CACHE_WB is not set.
regards
ronnie sahlberg
From: Ronnie Sahlberg
Subject: iSCSI support for QEMU, update
In-Reply-To:
On Thu, Apr 21, 2011 at 7:44 PM, Laurent Desnogues
wrote:
> On Thu, Apr 21, 2011 at 4:57 PM, Artyom Tarasenko wrote:
>> On Tue, Apr 12, 2011 at 4:14 AM, Igor Kovalenko
>> wrote:
> Do you have public test case?
> It is possible to code this delay slot write test but real issue may
> b
On Thu, Apr 21, 2011 at 05:03:47PM +1000, David Gibson wrote:
> A few months ago, Eduard - Gabriel Munteanu posted a series of patches
> implementing support for emulating the AMD PCI IOMMU
> (http://lists.nongnu.org/archive/html/qemu-devel/2011-01/msg03196.html).
>
> In fact, this series implemen
Am 21.04.2011 15:10, schrieb Peter Maydell:
Add support for getting configure to print the list of all targets
that can be built, via the option '--target-list=?'.
Signed-off-by: Peter Maydell
---
Yes, you can get the list of targets by running configure without
any arguments and then scrolling
=
KVM Forum 2011: Call For Participation
August 15-16, 2011 - Hyatt Regency Vancouver - Vancouver, Canada
=
KVM is an industry leading open source hypervisor that provide
Yes, it was a git version conflict. Thanks.
Adnan
_
From: Isaku Yamahata [mailto:yamah...@valinux.co.jp]
To: Adnan Khaleel [mailto:ad...@khaleel.us]
Cc: Hu Tao [mailto:hu...@cn.fujitsu.com], qemu-devel@nongnu.org
Sent: Thu, 21 Apr 2011 11:38:36 -0500
Subject: Re: [Qemu-devel] [PATCH 00/
git clone works for me. Hmmm git installation issue?
My git is
$ git --version
git version 1.7.1.1
thanks,
On Thu, Apr 21, 2011 at 11:12:37AM -0500, Adnan Khaleel wrote:
> I still get the same error:
>
> akhaleel@depot5 qemu_0.14_q35 $ git clone
> http://people.valinux.co.jp/~yamahata
> /qemu/
I still get the same error:
akhaleel@depot5 qemu_0.14_q35 $ git clone
http://people.valinux.co.jp/~yamahata/qemu/q35/20110316/qemu
Getting alternates list for
http://people.valinux.co.jp/~yamahata/qemu/q35/20110316/qemu/
Getting pack list for
http://people.valinux.co.jp/~yamahata/qemu/q35/201
Newer Linux kernels assume the existence of the performance counter
cp15 registers. Provide a minimal implementation of these registers.
We support no events. This should be compliant with the ARM ARM,
except that we don't implement the cycle counter.
Signed-off-by: Peter Maydell
---
This is the
On Thu, Apr 21, 2011 at 4:57 PM, Artyom Tarasenko wrote:
> On Tue, Apr 12, 2011 at 4:14 AM, Igor Kovalenko
> wrote:
Do you have public test case?
It is possible to code this delay slot write test but real issue may
be corruption elsewhere.
>
> The test case is trivial: it's just th
On 2011-04-21 16:10, Yaniv Kaul wrote:
> Fedora 15beta/x64, latest git:
> [ykaul@ykaul qemu]$ make
> CCx86_64-softmmu/kvm.o
> /home/ykaul/qemu/target-i386/kvm.c: In function ‘kvm_get_xsave’:
> /home/ykaul/qemu/target-i386/kvm.c:953:29: error: variable ‘fop’ set but
> not used [-Werror=unused-
On Thu, Apr 21, 2011 at 3:10 PM, Yaniv Kaul wrote:
> Fedora 15beta/x64, latest git:
> [ykaul@ykaul qemu]$ make
> CC x86_64-softmmu/kvm.o
> /home/ykaul/qemu/target-i386/kvm.c: In function ‘kvm_get_xsave’:
> /home/ykaul/qemu/target-i386/kvm.c:953:29: error: variable ‘fop’ set but not
> used [-We
On Tue, Apr 12, 2011 at 4:14 AM, Igor Kovalenko
wrote:
>>> Do you have public test case?
>>> It is possible to code this delay slot write test but real issue may
>>> be corruption elsewhere.
The test case is trivial: it's just the two instructions, branch and wrpr.
> In theory there could be mul
On 04/21/2011 07:48 AM, Brian Wheeler wrote:
> On Thu, 2011-04-21 at 15:43 +0200, Tristan Gingold wrote:
>> On Apr 21, 2011, at 3:37 PM, Brian Wheeler wrote:
>>
>>> On Thu, 2011-04-21 at 14:31 +0200, Tristan Gingold wrote:
On Apr 20, 2011, at 5:54 PM, Richard Henderson wrote:
> On 04/
On Thu, 2011-04-21 at 15:43 +0200, Tristan Gingold wrote:
> On Apr 21, 2011, at 3:37 PM, Brian Wheeler wrote:
>
> > On Thu, 2011-04-21 at 14:31 +0200, Tristan Gingold wrote:
> >> On Apr 20, 2011, at 5:54 PM, Richard Henderson wrote:
> >>
> >>> On 04/20/2011 08:46 AM, Tristan Gingold wrote:
>
On 04/18/11 17:02, Michael Roth wrote:
> These apply on top of Anthony's glib tree, commit
> 03d5927deb5e6baebaade1b4c8ff2428a85e125c currently, and can also be obtained
> from:
> git://repo.or.cz/qemu/mdroth.git qga_v2
>
> Patches 1-8 are general json/QAPI-related fixes. Anthony, please conside
Fedora 15beta/x64, latest git:
[ykaul@ykaul qemu]$ make
CCx86_64-softmmu/kvm.o
/home/ykaul/qemu/target-i386/kvm.c: In function ‘kvm_get_xsave’:
/home/ykaul/qemu/target-i386/kvm.c:953:29: error: variable ‘fop’ set but
not used [-Werror=unused-but-set-variable]
cc1: all warnings being treate
On 18 April 2011 16:34, Peter Maydell wrote:
> Since mmap() with MAP_FIXED will map over the top of existing mappings,
> it's a bad idea to use it to implement brk(), because brk() with a
> large size is likely to overwrite important things like qemu itself
> or the host libc. So we drop MAP_FIXED
On 04/21/2011 04:46 AM, Jes Sorensen wrote:
On 04/18/11 17:02, Michael Roth wrote:
These apply on top of Anthony's glib tree, commit
03d5927deb5e6baebaade1b4c8ff2428a85e125c currently, and can also be obtained
from:
git://repo.or.cz/qemu/mdroth.git qga_v2
Patches 1-8 are general json/QAPI-rel
On Apr 21, 2011, at 3:37 PM, Brian Wheeler wrote:
> On Thu, 2011-04-21 at 14:31 +0200, Tristan Gingold wrote:
>> On Apr 20, 2011, at 5:54 PM, Richard Henderson wrote:
>>
>>> On 04/20/2011 08:46 AM, Tristan Gingold wrote:
Right, but you could create an ev67 machine with a single PCI
con
On Thu, 2011-04-21 at 14:31 +0200, Tristan Gingold wrote:
> On Apr 20, 2011, at 5:54 PM, Richard Henderson wrote:
>
> > On 04/20/2011 08:46 AM, Tristan Gingold wrote:
> >> Right, but you could create an ev67 machine with a single PCI
> >> controller (or put all the devices on the same PCI controll
On 04/21/11 15:15, Michael Roth wrote:
> On 04/21/2011 03:44 AM, Jes Sorensen wrote:
>> and again I'll stop. Basically there really should be no references
>> to pthread_*
>
> This is on the guest side of things where I'm trying to use GLib
> wherever possible to keep things somewhat portable:
On 04/21/2011 03:44 AM, Jes Sorensen wrote:
On 04/18/11 17:02, Michael Roth wrote:
diff --git a/qga/guest-agent-worker.c b/qga/guest-agent-worker.c
new file mode 100644
index 000..e3295da
--- /dev/null
+++ b/qga/guest-agent-worker.c
@@ -0,0 +1,173 @@
+/*
+ * QEMU Guest Agent worker thread in
Add support for getting configure to print the list of all targets
that can be built, via the option '--target-list=?'.
Signed-off-by: Peter Maydell
---
Yes, you can get the list of targets by running configure without
any arguments and then scrolling up to find the target list in
the screenful o
On 04/21/2011 03:30 AM, Jes Sorensen wrote:
On 04/18/11 17:02, Michael Roth wrote:
diff --git a/qmp-core.c b/qmp-core.c
index 9f3d182..dab50a1 100644
--- a/qmp-core.c
+++ b/qmp-core.c
@@ -937,7 +937,15 @@ void qmp_async_complete_command(QmpCommandState *cmd,
QObject *retval, Error *er
qem
On Thu, Apr 21, 2011 at 09:36:12PM +1000, ronnie sahlberg wrote:
> There are some high-volume arrays that advertise support but fail any
> cdb with FUA, FUA_NV bits set with sense, so it needs to be made optional.
Which on would that be? Linux uses the FUA bit if the device advertises support
via
On Apr 20, 2011, at 5:54 PM, Richard Henderson wrote:
> On 04/20/2011 08:46 AM, Tristan Gingold wrote:
>> Right, but you could create an ev67 machine with a single PCI
>> controller (or put all the devices on the same PCI controller).
>
> Even the lowly ds10 has two hoses.
>
> I'll admit I hadn
On Thu, Apr 21, 2011 at 12:36 PM, ronnie sahlberg
wrote:
> I understand.
>
> Let me re-send a patch tomorrow that can optionally enable/force FUA
> bits for write.
> There are some high-volume arrays that advertise support but fail any
> cdb with FUA, FUA_NV bits set with sense, so it needs to be
Hello,
On 4/11/11, Dmitry Eremin-Solenikov wrote:
> Please pull the following changeset that makes PCMCIA subsystem to use
> QBus and Qdev for managing devices. Currently the only implementation
> of PCMCIA host is a PXA2xx host and the only possible PCMCIA device is
> IDE MicroDrive (dscm1).
On 4/20/11, Aurelien Jarno wrote:
> On Tue, Apr 19, 2011 at 06:56:45PM +0400, Dmitry Eremin-Solenikov wrote:
>> Basic implementation of DEC/Intel SA-1100/SA-1110 chips emulation.
>> Implemented:
>> - IRQs
>> - GPIO
>> - PPC
>> - RTC
>> - UARTs (no IrDA/etc.)
>> - OST reused from pxa25x
>>
>>
Am 21.04.2011 13:36, schrieb ronnie sahlberg:
> Stephan,
>
> I understand.
>
> Let me re-send a patch tomorrow that can optionally enable/force FUA
> bits for write.
> There are some high-volume arrays that advertise support but fail any
> cdb with FUA, FUA_NV bits set with sense, so it needs to
Stephan,
I understand.
Let me re-send a patch tomorrow that can optionally enable/force FUA
bits for write.
There are some high-volume arrays that advertise support but fail any
cdb with FUA, FUA_NV bits set with sense, so it needs to be made optional.
regards
ronnie sahlberg
On Thu, Apr 21, 2
On Thu, 21 Apr 2011, ZhouPeng wrote:
> Thank you for your review.
>
> Does this means the xen-upsteam-qemu will give up xenstore?
>
> Many features of xen except for vncpasswd
> may need that xl send||receive msg to||from xen-qemu.
> I think some other part of xen may need to read xenstore which
From: Jes Sorensen
Signed-off-by: Jes Sorensen
---
Makefile |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/Makefile b/Makefile
index a7c1503..bebe3bd 100644
--- a/Makefile
+++ b/Makefile
@@ -301,6 +301,7 @@ distclean: clean
for d in $(TARGET_DIRS) libhw32 libhw
On Thu, Apr 21, 2011 at 12:12 PM, ronnie sahlberg
wrote:
> On Thu, Apr 21, 2011 at 8:58 PM, Stefan Hajnoczi wrote:
>> On Thu, Apr 21, 2011 at 10:28 AM, ronnie sahlberg
>> wrote:
>>> On Thu, Apr 21, 2011 at 7:09 PM, Christoph Hellwig wrote:
We only claim WCE=1 to the guest if cache=writebac
On Thu, Apr 21, 2011 at 12:39 AM, Benjamin Poirier
wrote:
> Prevents a compilation failure when DEBUG_RTL8139 is defined:
>
> CC libhw32/rtl8139.o
> cc1: warnings being treated as errors
> hw/rtl8139.c: In function ‘rtl8139_cplus_transmit_one’:
> hw/rtl8139.c:1960: error: format ‘%8lx’ expects
On Thu, Apr 21, 2011 at 8:58 PM, Stefan Hajnoczi wrote:
> On Thu, Apr 21, 2011 at 10:28 AM, ronnie sahlberg
> wrote:
>> On Thu, Apr 21, 2011 at 7:09 PM, Christoph Hellwig wrote:
>>> We only claim WCE=1 to the guest if cache=writeback or cache=none are
>>> set. So ignoring the issue of having a
On Thu, Apr 21, 2011 at 10:28 AM, ronnie sahlberg
wrote:
> On Thu, Apr 21, 2011 at 7:09 PM, Christoph Hellwig wrote:
>> We only claim WCE=1 to the guest if cache=writeback or cache=none are
>> set. So ignoring the issue of having a cache on the initiator side
>> you must implement stable writes
Christoph,
I think you misread my test.
My test is pure reading :
sudo time dd if=/dev/sda of=/dev/null bs=1M
There are no writes involved at all in this test, only a huge number
of READ10 being sent to the target,
or in the case of when using QEMU+openiscsi-mounted-lun sometimes
being served ou
On 04/18/11 17:02, Michael Roth wrote:
> These apply on top of Anthony's glib tree, commit
> 03d5927deb5e6baebaade1b4c8ff2428a85e125c currently, and can also be obtained
> from:
> git://repo.or.cz/qemu/mdroth.git qga_v2
>
> Patches 1-8 are general json/QAPI-related fixes. Anthony, please conside
On 21.04.2011, at 09:03, David Gibson wrote:
> A few months ago, Eduard - Gabriel Munteanu posted a series of patches
> implementing support for emulating the AMD PCI IOMMU
> (http://lists.nongnu.org/archive/html/qemu-devel/2011-01/msg03196.html).
>
> In fact, this series implemented a general D
On Thu, Apr 21, 2011 at 7:09 PM, Christoph Hellwig wrote:
>> In my patch, there are NO data integrity issues.
>> Data is sent out on the wire immediately as the guest issues the write.
>> Once the guest issues a flush call, the flush call will not terminate
>> until the SYNCCACHE10 task has comple
> In my patch, there are NO data integrity issues.
> Data is sent out on the wire immediately as the guest issues the write.
> Once the guest issues a flush call, the flush call will not terminate
> until the SYNCCACHE10 task has completed.
No guest will even issue a cache flush, as we claim to be
Please re-read my post or read the patch.
It has O_DIRECT like behaviour in that it will not pollute the hosts cache.
This for the simple reason that the host is not aware that there is
any block i/o happening.
In my patch, there are NO data integrity issues.
Data is sent out on the wire immediat
On 04/18/11 17:02, Michael Roth wrote:
> +static const char *ga_log_level_str(GLogLevelFlags level)
> +{
> +switch (level & G_LOG_LEVEL_MASK) {
> +case G_LOG_LEVEL_ERROR: return "error";
> +case G_LOG_LEVEL_CRITICAL: return "critical";
> +case G_LOG_LEVEL_WARNING:
On Thu, Apr 21, 2011 at 06:43:10PM +1000, Ronnie Sahlberg wrote:
> Some basic tests thatve been performed show it to be significantly faster
> than an out-of-the-box open-iscsi mounted LUN being accessed by default
> QEMU i/o options.
Which isn't a useful comparism. qemu's default is the braindea
On 04/18/11 17:02, Michael Roth wrote:
> diff --git a/qga/guest-agent-worker.c b/qga/guest-agent-worker.c
> new file mode 100644
> index 000..e3295da
> --- /dev/null
> +++ b/qga/guest-agent-worker.c
> @@ -0,0 +1,173 @@
> +/*
> + * QEMU Guest Agent worker thread interfaces
> + *
> + * Copyright
This patch adds a new block driver : block.iscsi.c
This driver interfaces with the multiplatform posix library
for iscsi initiator/client access to iscsi devices hosted at
git://github.com/sahlberg/libiscsi.git
The patch adds the driver to interface with the iscsi library.
It also updated the conf
Please find attached a new version of the patch for iSCSI support.
iSCSI support is automaticallt detected and activated during configure/build
if the libiscsi library is available on the build host.
This library is available at : https://github.com/sahlberg/libiscsi
This new version contains tw
On 04/18/11 17:02, Michael Roth wrote:
> diff --git a/qmp-core.c b/qmp-core.c
> index 9f3d182..dab50a1 100644
> --- a/qmp-core.c
> +++ b/qmp-core.c
> @@ -937,7 +937,15 @@ void qmp_async_complete_command(QmpCommandState *cmd,
> QObject *retval, Error *er
> qemu_free(cmd);
> }
>
> +extern Qm
On Thu, Apr 21, 2011 at 12:57 AM, Paolo Bonzini wrote:
> On 04/21/2011 05:40 AM, Cheng Renquan wrote:
>>
>> I'm trying to use qemu-kvm to run Fedora15-beta with gnome3,
>> but it told me graphics hardware failed to run gnome3 specific
>> features and it fallback to gnome2;
>
> Sorry, none of the c
On 04/18/11 17:02, Michael Roth wrote:
> Fix spurious errors due to not initializing Error pointer to NULL before
> checking for errors.
>
> Signed-off-by: Michael Roth
> ---
> qemu-sockets.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/qemu-sockets.c b/qemu-so
Am 20.04.2011 20:13, schrieb Blue Swirl:
> On Wed, Apr 20, 2011 at 2:30 PM, Kevin Wolf wrote:
>> Signed-off-by: Kevin Wolf
>> ---
>> hw/ide/atapi.c | 115
>> +++
>> 1 files changed, 48 insertions(+), 67 deletions(-)
>>
>> diff --git a/hw/ide/
On 04/20/2011 07:47 PM, Антон Кочков wrote:
Yes. first thing working ok.
And second fails.
I'm using Intel iCore 7 (see attached dmesg output and kernel config -
host dmesg and host config)
Also, as this is probably kernel-kvm module bug, i'm open
https://bugzilla.kernel.org/show_bug.cgi?id=337
On 04/21/2011 05:40 AM, Cheng Renquan wrote:
I'm trying to use qemu-kvm to run Fedora15-beta with gnome3,
but it told me graphics hardware failed to run gnome3 specific
features and it fallback to gnome2;
Sorry, none of the cards provided by KVM (including the SPICE-specific
QXL card) currentl
A few months ago, Eduard - Gabriel Munteanu posted a series of patches
implementing support for emulating the AMD PCI IOMMU
(http://lists.nongnu.org/archive/html/qemu-devel/2011-01/msg03196.html).
In fact, this series implemented a general DMA/IOMMU layer which can
be used by any device model, and
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