Maciej W. Rozycki wrote:
The PDQ DMA engine requires a different byte-swapping mode for big-endian
hosts; also the MAC address which is read from a register through PIO has
to be byte-swapped. These changes have been verified with DEFPA-DC (PCI)
boards and a Broadcom BCM91250A (MIPS CPU based
The PDQ DMA engine requires a different byte-swapping mode for big-endian
hosts; also the MAC address which is read from a register through PIO has
to be byte-swapped. These changes have been verified with DEFPA-DC (PCI)
boards and a Broadcom BCM91250A (MIPS CPU based) host.
Signed-off-by: Macie
On Mon, Oct 23, 2006 at 01:53:17PM +0100, Maciej W. Rozycki wrote:
> + data = cpu_to_le32(data);
This is rather ugly and not provable by static typechecking. Please
always use spearate variables/structs for device and host endian values,
and run the resulting driver through sparse to make sur
The PDQ DMA engine requires a different byte-swapping mode for big-endian
hosts; also the MAC address which is read from a register through PIO has
to be byte-swapped. These changes have been verified with DEFPA-DC (PCI)
boards and a Broadcom BCM91250A (MIPS CPU based) host.
Signed-off-by: Ma
