On 08/19/2016 11:45 PM, Andrew Lunn wrote:
>> Nice improvement.
>
> Thanks
>
>> But what's so special about 8?
>
> When talking to Marvell Switch chips, there are two different headers
> which can be added. The DSA header is 4 bytes, and the EDSA header is
> 8 bytes. However, if there is already
> Nice improvement.
Thanks
> But what's so special about 8?
When talking to Marvell Switch chips, there are two different headers
which can be added. The DSA header is 4 bytes, and the EDSA header is
8 bytes. However, if there is already a VLAN header, when using EDSA,
it will replace the VLAN h
Hi Andrew,
From: Andrew Lunn
Sent: Friday, August 19, 2016 7:39 PM
To: Claudiu Manoil
Cc: Zefir Kurtisi; netdev@vger.kernel.org; claudiu.man...@freescale.com
Subject: Re: [PATCH] gianfar: prevent fragmentation in DSA environments
> >> -#define GFAR_RXB_SIZE 1536
> &g
> I don't fully understand why GFAR_RXB_SIZE has to be lower than
> that, preventing the HW using all available memory - the freescale
> guys most probably do.
That will be because the cache invalidates in the DMA API are
expensive. There is no point invalidating the whole 2K if you never
make use
> >> -#define GFAR_RXB_SIZE 1536
> >> +/* prevent fragmenation by HW in DSA environments */
> >> +#define GFAR_RXB_SIZE (1536 + RXBUF_ALIGNMENT)
> >
> >Hi Zefir
> >
> >Using RXBUF_ALIGNMENT suggests this has something to do with
> >alignment, not extra headers.
> >
> >How about
> >
> >/* Prevent fr
On 08/19/2016 04:59 PM, Andrew Lunn wrote:
> On Fri, Aug 19, 2016 at 11:16:14AM +0200, Zefir Kurtisi wrote:
>> The eTSEC register MRBLR defines the maximum space in
>> the RX buffers and is set to 1536 by gianfar. This
>> reasonably covers the common use case where the MTU
>> is kept at default 150
>-Original Message-
>From: Andrew Lunn [mailto:and...@lunn.ch]
>Sent: Friday, August 19, 2016 5:59 PM
>To: Zefir Kurtisi
>Cc: netdev@vger.kernel.org; claudiu.man...@freescale.com
>Subject: Re: [PATCH] gianfar: prevent fragmentation in DSA environments
>
>On Fri, Au
On Fri, Aug 19, 2016 at 11:16:14AM +0200, Zefir Kurtisi wrote:
> The eTSEC register MRBLR defines the maximum space in
> the RX buffers and is set to 1536 by gianfar. This
> reasonably covers the common use case where the MTU
> is kept at default 1500.
>
> Alas, if the eTSEC is attached to a DSA e
The eTSEC register MRBLR defines the maximum space in
the RX buffers and is set to 1536 by gianfar. This
reasonably covers the common use case where the MTU
is kept at default 1500.
Alas, if the eTSEC is attached to a DSA enabled switch,
the DSA header extension causes every maximum sized
frame to
