From: Tien Hock Loh
This adds support for TSE PCS that uses SGMII adapter when the phy-mode of
the dwmac is set to sgmii.
Signed-off-by: Tien Hock Loh
Acked-by: Rob Herring
---
v2:
- Refactored the TSE PCS out from the dwmac-socfpga.c file
- Added binding documentation for TSE PCS sgmii adapt
From: Tien Hock Loh
This adds support for TSE PCS that uses SGMII adapter when the phy-mode of
the dwmac is set to sgmii.
Signed-off-by: Tien Hock Loh
---
v2:
- Refactored the TSE PCS out from the dwmac-socfpga.c file
- Added binding documentation for TSE PCS sgmii adapter
v3:
- Added missing
From: Tien Hock Loh
This adds support for TSE PCS that uses SGMII adapter when the phy-mode of
the dwmac is set to sgmii.
Signed-off-by: Tien Hock Loh
Acked-by: Giuseppe Cavallaro
Acked-by: Rob Herring
---
v2:
- Refactored the TSE PCS out from the dwmac-socfpga.c file
- Added binding documen
From: Tien Hock Loh
This adds support for TSE PCS that uses SGMII adapter when the phy-mode of
the dwmac is set to sgmii
Signed-off-by: Tien Hock Loh
---
v2:
- Refactored the TSE PCS out from the dwmac-socfpga.c file
- Added binding documentation for TSE PCS sgmii adapter
v3:
- Added missing l
From: Tien Hock Loh
This adds support for TSE PCS that uses SGMII adapter when the phy-mode of
the dwmac is set to sgmii
Signed-off-by: Tien Hock Loh
---
v2:
- Refactored the TSE PCS out from the dwmac-socfpga.c file
- Added binding documentation for TSE PCS sgmii adapter
v3:
- Added missing l
From: Tien Hock Loh
This adds support for TSE PCS that uses SGMII adapter when the phy-mode of
the dwmac is set to sgmii
Signed-off-by: Tien Hock Loh
---
v2:
- Refactored the TSE PCS out from the dwmac-socfpga.c file
- Added binding documentation for TSE PCS sgmii adapter
---
.../devicetree/b
From: Tien Hock Loh
Adds SGMII support for dwmac-socfpga to enable the SGMII PHY when phy-mode
of the dwmac is set to sgmii.
Signed-off-by: Tien Hock Loh
---
.../net/ethernet/stmicro/stmmac/dwmac-socfpga.c| 339 -
1 file changed, 329 insertions(+), 10 deletions(-)
diff
SGMII_ADAPTER_ENABLE 0x
+#define LINK_TIMER 20
+#define AUTONEGO_TIMER 20
+
+thloh
struct socfpga_dwmac {
int interface;
u32 reg_offset;
@@ -49,18 +87,17 @@ struct socfpga_dwmac