Re: [EXT] Re: Fwd: net: fec: rx descriptor ring out of order

2020-11-19 Thread Kegl Rohit
On Sun, Nov 15, 2020 at 8:48 AM Andy Duan wrote: > > From: Kegl Rohit Sent: Sunday, November 15, 2020 1:37 AM > > On Sat, Nov 14, 2020 at 2:58 AM Andy Duan wrote: > > > > > > From: Kegl Rohit Sent: Friday, November 13, 2020 > > > 8:21 PM > > &

Re: [EXT] Re: Fwd: net: fec: rx descriptor ring out of order

2020-11-14 Thread Kegl Rohit
On Sat, Nov 14, 2020 at 2:58 AM Andy Duan wrote: > > From: Kegl Rohit Sent: Friday, November 13, 2020 8:21 PM > > On Fri, Nov 13, 2020 at 8:33 AM Kegl Rohit wrote: > > > > > > > What are the addresses of the ring entries? > > > > I bet there is so

Re: Fwd: net: fec: rx descriptor ring out of order

2020-11-13 Thread Kegl Rohit
On Fri, Nov 13, 2020 at 8:33 AM Kegl Rohit wrote: > > > What are the addresses of the ring entries? > > I bet there is something wrong with the cache coherency and/or > > flushing. > > > > So the MAC hardware has done the write but (somewhere) it > > isn

Re: Fwd: net: fec: rx descriptor ring out of order

2020-11-12 Thread Kegl Rohit
> What are the addresses of the ring entries? > I bet there is something wrong with the cache coherency and/or > flushing. > > So the MAC hardware has done the write but (somewhere) it > isn't visible to the cpu for ages. CMA memory is disabled in our kernel config. So the descriptors allocated wi

Re: net: fec: rx descriptor ring out of order

2020-11-12 Thread Kegl Rohit
On Thu, Nov 12, 2020 at 12:10 PM David Laight wrote: > > From: Eric Dumazet > > Sent: 12 November 2020 10:42 > > > > On 11/12/20 7:52 AM, Kegl Rohit wrote: > > > On Wed, Nov 11, 2020 at 11:18 PM Fabio Estevam wrote: > > >> > > &g

Re: [EXT] Fwd: net: fec: rx descriptor ring out of order

2020-11-11 Thread Kegl Rohit
On Thu, Nov 12, 2020 at 2:29 AM Andy Duan wrote: > > From: Kegl Rohit Sent: Wednesday, November 11, 2020 > 10:27 PM > > Hello! > > > > We are using a imx6q platform. > > The fec interface is used to receive a continuous stream of custom / raw > > ethernet

Re: net: fec: rx descriptor ring out of order

2020-11-11 Thread Kegl Rohit
On Wed, Nov 11, 2020 at 11:18 PM Fabio Estevam wrote: > > On Wed, Nov 11, 2020 at 11:27 AM Kegl Rohit wrote: > > > > Hello! > > > > We are using a imx6q platform. > > The fec interface is used to receive a continuous stream of custom / > > raw ether

Re: Fwd: net: fec: rx descriptor ring out of order

2020-11-11 Thread Kegl Rohit
On Wed, Nov 11, 2020 at 6:52 PM David Laight wrote: > > > On 11/11/20 3:27 PM, Kegl Rohit wrote: > > > Hello! > > > > > > We are using a imx6q platform. > > > The fec interface is used to receive a continuous stream of custom / > > > raw eth

Fwd: net: fec: rx descriptor ring out of order

2020-11-11 Thread Kegl Rohit
Hello! We are using a imx6q platform. The fec interface is used to receive a continuous stream of custom / raw ethernet packets. The packet size is fixed ~132 bytes and they get sent every 250µs. While testing I observed spontaneous packet delays from time to time. After digging down deeper I thi

Re: [EXT] net: ethernet: freescale: fec: copybreak handling throughput, dma_sync_* optimisations allowed?

2020-07-06 Thread Kegl Rohit
nnection reliability (packet content, sequence, ...)? On Thu, Jul 2, 2020 at 11:14 AM Andy Duan wrote: > > From: Kegl Rohit Sent: Thursday, July 2, 2020 3:39 PM > > On Thu, Jul 2, 2020 at 6:18 AM Andy Duan wrote: > > > That should ensure the whole area is not dirty. > >

Re: [EXT] net: ethernet: freescale: fec: copybreak handling throughput, dma_sync_* optimisations allowed?

2020-07-02 Thread Kegl Rohit
On Thu, Jul 2, 2020 at 6:18 AM Andy Duan wrote: > > From: Kegl Rohit Sent: Thursday, July 2, 2020 2:45 AM > > fec_enet_copybreak(u32 length, ...) uses > > > > dma_sync_single_for_cpu(&fep->pdev->dev, > > fec32_to_cpu(bdp->cbd_bufaddr), FEC_ENET_RX_FRSIZ

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2020-07-01 Thread Kegl Rohit
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