le to set the
larger MTU required to support this.)
Signed-off-by: Jonathan McDowell
---
drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
b/drivers/net/ethernet/stmicro/stmmac/d
kernel.org
Signed-off-by: Jonathan McDowell
---
drivers/net/dsa/qca8k.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index 53064e0e1618..5bdac669a339 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
On Thu, Oct 29, 2020 at 11:32:36AM +0800, DENG Qingfang wrote:
> On Thu, Oct 29, 2020 at 2:31 AM Vladimir Oltean wrote:
> >
> > On Thu, Oct 29, 2020 at 02:12:21AM +0800, DENG Qingfang wrote:
...
> > > +static int
> > > +mt7530_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
> > > +{
On Fri, Aug 14, 2020 at 11:20:54AM +0300, Vadym Kochan wrote:
> On Thu, Aug 13, 2020 at 09:03:22AM +0100, Jonathan McDowell wrote:
> > On Mon, Jul 27, 2020 at 03:22:37PM +0300, Vadym Kochan wrote:
> > > Marvell Prestera 98DX326x integrates up to 24 ports of 1GbE with 8
> >
On Mon, Jul 27, 2020 at 03:22:37PM +0300, Vadym Kochan wrote:
> Marvell Prestera 98DX326x integrates up to 24 ports of 1GbE with 8
> ports of 10GbE uplinks or 2 ports of 40Gbps stacking for a largely
> wireless SMB deployment.
>
> The current implementation supports only boards designed for the Ma
to receiving all multicast packets, internally
setting ALLMULTI.
Use the new fallback support in the dwmac1000 driver to correctly
achieve the same with the mainline IPQ806x driver. Confirmed to fix IPv6
functionality on an RB3011 router.
Cc: sta...@vger.kernel.org
Signed-off-by: Jonathan
of the vendor driver (nss-gmac from the
qsdk) shows that it does not enable the multicast filter and instead
falls back to allmulti.
Extend the base dwmac1000 driver to fall back when there's no suitable
hardware filter, and update the ipq806x platform to request this.
Jonathan McDowe
ff-by: Jonathan McDowell
---
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index efc6ec1b8027..fc8759f146c7 100644
--- a/driver
evice correctly treats this as no tag
Signed-off-by: Jonathan McDowell
---
drivers/net/dsa/qca8k.c | 181
drivers/net/dsa/qca8k.h | 27 ++
2 files changed, 208 insertions(+)
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index 3ebc4da
Rather than using a magic value of 1 when configuring the port VIDs add
a QCA8K_PORT_VID_DEF define and use that instead. Also fix up the
bitmask in the process; the top 4 bits are reserved so this wasn't a
problem, but only masking 12 bits is the correct approach.
Signed-off-by: Jon
On Tue, Jul 28, 2020 at 07:34:57PM +0300, Vladimir Oltean wrote:
> Hi Jonathan,
>
> On Sun, Jul 26, 2020 at 03:56:11PM +0100, Jonathan McDowell wrote:
> > This adds full 802.1q VLAN support to the qca8k, allowing the use of
> > vlan_filtering and more complicated bridging s
sensible errnos on failure rather than -1 (rmk)
- Style cleanups based on Florian's feedback
- Silently allow VLAN 0 as device correctly treats this as no tag
Signed-off-by: Jonathan McDowell
---
drivers/net/dsa/qca8k.c | 191 ++--
drivers/net/dsa/qca8k.h
On Thu, Jul 23, 2020 at 01:58:47AM +0300, Vladimir Oltean wrote:
> On Wed, Jul 22, 2020 at 03:36:38PM -0700, Florian Fainelli wrote:
> > On 7/22/20 12:38 PM, Jonathan McDowell wrote:
> > > On Tue, Jul 21, 2020 at 10:26:07AM -0700, Florian Fainelli wrote:
> > >>
On Tue, Jul 21, 2020 at 10:26:07AM -0700, Florian Fainelli wrote:
> On 7/21/20 10:16 AM, Jonathan McDowell wrote:
> > This adds full 802.1q VLAN support to the qca8k, allowing the use of
> > vlan_filtering and more complicated bridging setups than allowed by
> > ba
On Tue, Jul 21, 2020 at 09:48:18PM +0100, Russell King - ARM Linux admin wrote:
> On Tue, Jul 21, 2020 at 06:16:24PM +0100, Jonathan McDowell wrote:
> > This adds full 802.1q VLAN support to the qca8k, allowing the use of
> > vlan_filtering and more complicated bridging setups
: Jonathan McDowell
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index a5566de82853..cce05493075f 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -408,6 +408,104 @@ qca8k_fdb_flush(struct qca8k_priv *priv)
mutex_unlock(&priv->reg_mutex);
}
+sta
This switch has a single max frame size configuration register, so we
track the requested MTU for each port and apply the largest.
v2:
- Address review feedback from Vladimir Oltean
Signed-off-by: Jonathan McDowell
---
drivers/net/dsa/qca8k.c | 31 +++
drivers/net
On Sat, Jul 18, 2020 at 01:38:08PM +0300, Vladimir Oltean wrote:
> On Sat, Jul 18, 2020 at 10:35:55AM +0100, Jonathan McDowell wrote:
> > This switch has a single max frame size configuration register, so we
> > track the requested MTU for each port and apply the largest.
> &g
This switch has a single max frame size configuration register, so we
track the requested MTU for each port and apply the largest.
Signed-off-by: Jonathan McDowell
---
drivers/net/dsa/qca8k.c | 38 ++
drivers/net/dsa/qca8k.h | 3 +++
2 files changed, 41
On Fri, Jul 17, 2020 at 01:38:22AM +0300, Vladimir Oltean wrote:
> On Thu, Jul 16, 2020 at 03:09:25PM -0700, Jakub Kicinski wrote:
> > On Mon, 13 Jul 2020 21:50:26 +0100 Matthew Hagan wrote:
> > > +- qca,sgmii-rxclk-falling-edge: If present, sets receive clock phase to
> > > +
stmmac: Do not accept invalid MTU values")
started using the TX FIFO size to verify what counts as a valid MTU
request for the stmmac driver. This is unset for the ipq806x variant.
Looking at older patches for this it seems the RX + TX buffers can be
up to 8k, so set appropriately.
Signed-off-b
Signed-off-by: Jonathan McDowell
---
drivers/net/dsa/qca8k.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index 11d1c290d90f..4acad5fa0c84 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -647,7 +647,7
enabled.
Tested with a device where the CPU connection is RGMII (i.e. the common
current use case) + one where the CPU connection is SGMII. I don't have
any devices where the SGMII interface is brought out to something other
than the CPU.
Signed-off-by: Jonathan McDowell
---
drivers/net/dsa/qc
configuration options
Jonathan McDowell (3):
net: dsa: qca8k: Switch to PHYLINK instead of PHYLIB
net: dsa: qca8k: Improve SGMII interface handling
net: dsa: qca8k: Minor comment spelling fix
drivers/net/dsa/qca8k.c | 341
drivers/net/dsa/qca8k.h | 1
Update the driver to use the new PHYLINK callbacks, removing the
legacy adjust_link callback.
Signed-off-by: Jonathan McDowell
---
drivers/net/dsa/qca8k.c | 306 +++-
1 file changed, 210 insertions(+), 96 deletions(-)
diff --git a/drivers/net/dsa/qca8k.c b
On Mon, Jun 15, 2020 at 11:45:16AM -0600, Rob Herring wrote:
> On Fri, Jun 05, 2020 at 07:10:02PM +0100, Jonathan McDowell wrote:
> > This patch documents the qca8k's SGMII related properties that allow
> > configuration of the SGMII port.
> >
> >
On Sat, Jun 13, 2020 at 11:10:49PM +0300, Vladimir Oltean wrote:
> On Sat, 13 Jun 2020 at 14:32, Jonathan McDowell wrote:
> >
> > This patch improves the handling of the SGMII interface on the QCA8K
> > devices. Previously the driver did no configuration of the port, even i
enabled.
Tested with a device where the CPU connection is RGMII (i.e. the common
current use case) + one where the CPU connection is SGMII. I don't have
any devices where the SGMII interface is brought out to something other
than the CPU.
Signed-off-by: Jonathan McDowell
---
drivers/net/dsa/qc
k for PHY_INTERFACE_MODE_1000BASEX when setting SGMII
port mode.
- Address Vladimir's review comments
v3:
- Move phylink changes to separate patch
- Address rmk review comments
v2:
- Switch to phylink
- Avoid need for device tree configuration options
Jonathan McDowell (2):
net: dsa: qca8k: Switch to PHYLI
Update the driver to use the new PHYLINK callbacks, removing the
legacy adjust_link callback.
Signed-off-by: Jonathan McDowell
---
drivers/net/dsa/qca8k.c | 308 +++-
1 file changed, 211 insertions(+), 97 deletions(-)
diff --git a/drivers/net/dsa/qca8k.c b
On Thu, Jun 11, 2020 at 09:55:23AM +0100, Russell King - ARM Linux admin wrote:
> On Wed, Jun 10, 2020 at 08:14:03PM +0100, Jonathan McDowell wrote:
> > Update the driver to use the new PHYLINK callbacks, removing the
> > legacy adjust_link callback.
>
> Looks good, there
On Wed, Jun 10, 2020 at 08:31:11PM -0700, Florian Fainelli wrote:
> On 6/10/2020 12:15 PM, Jonathan McDowell wrote:
> > This patch improves the handling of the SGMII interface on the QCA8K
> > devices. Previously the driver did no configuration of the port, even if
> > it
On Thu, Jun 11, 2020 at 11:58:43AM +0300, Vladimir Oltean wrote:
> Hi Jonathan,
>
> On Wed, 10 Jun 2020 at 23:19, Jonathan McDowell wrote:
> >
> > Update the driver to use the new PHYLINK callbacks, removing the
> > legacy adjust_link callback.
> >
>
enabled.
Tested with a device where the CPU connection is RGMII (i.e. the common
current use case) + one where the CPU connection is SGMII. I don't have
any devices where the SGMII interface is brought out to something other
than the CPU.
Signed-off-by: Jonathan McDowell
---
drivers/net/dsa/qc
Update the driver to use the new PHYLINK callbacks, removing the
legacy adjust_link callback.
Signed-off-by: Jonathan McDowell
---
drivers/net/dsa/qca8k.c | 309 +++-
1 file changed, 212 insertions(+), 97 deletions(-)
diff --git a/drivers/net/dsa/qca8k.c b
tree configuration options
Jonathan McDowell (2):
net: dsa: qca8k: Switch to PHYLINK instead of PHYLIB
net: dsa: qca8k: Improve SGMII interface handling
drivers/net/dsa/qca8k.c | 337
drivers/net/dsa/qca8k.h | 13 ++
2 files changed, 252 insertions(+), 98 dele
On Sat, Jun 06, 2020 at 11:59:09AM +0100, Jonathan McDowell wrote:
> I'll go away and roll a v2 moving qca8k over to phylink and then using
> that to auto select the appropriate SGMII mode. Thanks for the feedback.
Ok, take 2. I've switched the driver over to phylink which has
On Sat, Jun 06, 2020 at 02:43:56PM +0100, Russell King - ARM Linux admin wrote:
> On Sat, Jun 06, 2020 at 11:59:09AM +0100, Jonathan McDowell wrote:
> > So the device in question is a 7 port stand alone switch chip. There's a
> > single SGMII port which is configurable between
On Sat, Jun 06, 2020 at 09:37:41AM +0100, Russell King - ARM Linux admin wrote:
> On Sat, Jun 06, 2020 at 08:49:16AM +0100, Jonathan McDowell wrote:
> > On Fri, Jun 05, 2020 at 08:38:43PM +0200, Andrew Lunn wrote:
> > > On Fri, Jun 05, 2020 at 07:10:58PM +0100, Jonathan McDowell
On Fri, Jun 05, 2020 at 08:38:43PM +0200, Andrew Lunn wrote:
> On Fri, Jun 05, 2020 at 07:10:58PM +0100, Jonathan McDowell wrote:
> > The QCA8337(N) has an SGMII port which can operate in MAC, PHY or BASE-X
> > mode depending on what it's connected to (e.g. CPU vs external
This patch documents the qca8k's SGMII related properties that allow
configuration of the SGMII port.
Signed-off-by: Jonathan McDowell
---
Documentation/devicetree/bindings/net/dsa/qca8k.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/ne
7;s in use, and
device tree support for configuring the connection details.
Signed-off-by: Jonathan McDowell
---
drivers/net/dsa/qca8k.c | 44 -
drivers/net/dsa/qca8k.h | 12 +++
2 files changed, 55 insertions(+), 1 deletion(-)
diff --git a/drive
to an external phy, or to a CPU, or to an SFP cage)
as well as allowing for autonegotiation to be disabled and a delay
configured.
Tested on a MikroTik RB3011; the second switch is connected to the CPU
via SGMII.
Jonathan McDowell (2):
dt-bindings: net: dsa: qca8k: document SGMII properties
org/t/support-for-mikrotik-rb3011uias-rm/4064/257
correctly enables the clock; we have already configured the source just
before this.
Tested on a MikroTik RB3011.
Signed-off-by: Jonathan McDowell
---
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
b/drivers/net/ethernet/st
On Wed, Jan 03, 2018 at 11:11:29AM +0900, Joonsoo Kim wrote:
> On Tue, Jan 02, 2018 at 11:25:01AM +0100, Rafael J. Wysocki wrote:
> > On Tue, Jan 2, 2018 at 3:54 AM, Joonsoo Kim wrote:
> > > On Fri, Dec 29, 2017 at 04:36:59PM +, Jonathan McDowell wrote:
> > >>
On Fri, Dec 22, 2017 at 09:21:09AM +0900, Joonsoo Kim wrote:
> On Fri, Dec 08, 2017 at 03:11:59PM +0000, Jonathan McDowell wrote:
> > I've been sitting on this for a while and should have spent time to
> > investigate sooner, but it's been an odd failure mode that
I'm trying to add support for the bluetooth device on Toshiba laptops
using rfkill. The device is controlled only via software and doesn't
exist at all unless enabled, at which point it appears on the USB bus.
However, doing something along the lines of:
toshiba_bluetooth_rfkill = rfkill_allocate
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