On 17.07.20 22:39, Florian Fainelli wrote:
On 7/17/2020 1:29 PM, Matthew Hagan wrote:
On 16/07/2020 23:09, Jakub Kicinski wrote:
On Mon, 13 Jul 2020 21:50:26 +0100 Matthew Hagan wrote:
Add names and decriptions of additional PORT0_PAD_CTRL properties.
Signed-off-by: Matthew Hagan
---
D
On 17.07.20 22:29, Matthew Hagan wrote:
On 16/07/2020 23:09, Jakub Kicinski wrote:
On Mon, 13 Jul 2020 21:50:26 +0100 Matthew Hagan wrote:
Add names and decriptions of additional PORT0_PAD_CTRL properties.
Signed-off-by: Matthew Hagan
---
Documentation/devicetree/bindings/net/dsa/qca8k.t
se that a device enables conntrack helper via
command "echo 1 > /proc/sys/net/netfilter/nf_conntrack_helper",
the status of IPS_HELPER_BIT will not present any change, and
consequently it loses the checking ability in the context.
Signed-off-by: Henry Yen
Reviewed-by: Ryder Lee
Tes
On 03/12/2018 15:00, René van Dorst wrote:
Quoting Bjørn Mork :
Greg Ungerer writes:
The following change helped alot, but I still get some problems under
sustained load and some types of port setups. Still trying to figure
out what exactly is going on.
--- a/linux/drivers/net/ethernet/med
On 21/07/18 21:13, Hauke Mehrtens wrote:
+#define MC_ENTRY(val, msk, ns, out, len, type, flags, ipv4_len) \
+ { val, msk, (ns << 10 | out << 4 | len >> 1),\
+ (len & 1) << 15 | type << 13 | flags << 9 | ipv4_len << 8 }
+static const struct gswip_pce_microcode gswip_pce_micr
On 21/07/18 21:13, Hauke Mehrtens wrote:
+ * Copyright (C) 2012 John Crispin
that is not my mail addr :-)
John
On 06/09/17 02:47, Andrew Lunn wrote:
Should this be done at the DSA level, or at the driver level? Do any
chips do broadcast flooding in hardware already? Hence they currently
see broadcast duplication? If i add a broadcast mdb at the DSA level,
and the chip is already hard wired to flooding
On 10/08/17 08:42, Eric Dumazet wrote:
On Wed, 2017-08-09 at 22:52 -0700, David Miller wrote:
From: John Crispin
Date: Wed, 9 Aug 2017 14:41:15 +0200
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root cause of this is that skb_hash will
named 'dsa_ptr'
ops = skb->dev->dsa_ptr->tag_ops;
^
make[3]: *** [net/core/flow_dissector.o] Error 1
Signed-off-by: John Crispin
---
net/core/flow_dissector.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c
On 10/08/17 08:42, Eric Dumazet wrote:
On Wed, 2017-08-09 at 22:52 -0700, David Miller wrote:
From: John Crispin
Date: Wed, 9 Aug 2017 14:41:15 +0200
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root cause of this is that skb_hash will
We need to access this struct from within the flow_dissector to fix
dissection for packets coming in on DSA devices.
Signed-off-by: Muciri Gatimu
Signed-off-by: Shashidhar Lakkavalli
Signed-off-by: John Crispin
---
include/net/dsa.h | 7 +++
net/dsa/dsa_priv.h | 7 ---
2 files
ter
John Crispin (4):
net-next: dsa: move struct dsa_device_ops to the global header file
net-next: dsa: add flow_dissect callback to struct dsa_device_ops
net-next: tag_mtk: add flow_dissect callback to the ops struct
net-next: dsa: fix flow dissection
include/net/dsa.h |
-by: John Crispin
---
net/core/flow_dissector.c | 12
1 file changed, 12 insertions(+)
diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c
index 0cc672aba1f0..5b5be9577257 100644
--- a/net/core/flow_dissector.c
+++ b/net/core/flow_dissector.c
@@ -4,6 +4,7 @@
#incl
offset of the network header.
Signed-off-by: Muciri Gatimu
Signed-off-by: Shashidhar Lakkavalli
Signed-off-by: John Crispin
---
include/net/dsa.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/net/dsa.h b/include/net/dsa.h
index 65d7804c6f69..7f46b521313e 100644
--- a/include
hashing function properly.
Signed-off-by: Muciri Gatimu
Signed-off-by: Shashidhar Lakkavalli
Signed-off-by: John Crispin
---
net/dsa/tag_mtk.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/net/dsa/tag_mtk.c b/net/dsa/tag_mtk.c
index 2f32b7ea3365
The MT7623 has several DMA rings. Inside the SW path, the core will use
the PDMA when receiving traffic. While bringing up the HW path we noticed
that the PPE requires the QDMA RX to also be brought up as it uses this
ring internally for its flow scheduling.
John Crispin (2):
net-next: mediatek
Trivial patch fixing 2 typos.
Signed-off-by: John Crispin
---
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 4594862e5a9b
This patch is in preparation for adding HW flow and QoS offloading. For
those features to work, the driver needs to bring up the first QDMA RX
ring. This ring is used by the PPE offloading HW.
Signed-off-by: John Crisp in
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 36 +
: Shashidhar Lakkavalli
Signed-off-by: Muciri Gatimu
Signed-off-by: John Crispin
---
drivers/net/dsa/mt7530.c | 38 ++
drivers/net/dsa/mt7530.h | 1 +
2 files changed, 39 insertions(+)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index
and submitting a lot of patches for the driver while
Nelson was looking into the aspects more on hardware additions and details
such as introducing PDMA with Hardware LRO to the driver. Also update
John's up-to-date mail address in the patch.
Cc: John Crispin
Signed-off-by: Sean Wang
Signe
On 26/07/17 17:10, Andrew Lunn wrote:
On Fri, Jul 21, 2017 at 10:58:12AM +0200, John Crispin wrote:
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root cause of this is that skb_hash will call the
flow_dissector. At this point the skb still
or each function it appears in
and similar follow-on errors as seen in arm allmodconfig builds.
Cc: Sean Wang
Cc: Felix Fietkau
Cc: John Crispin
Cc: Matthias Brugger
Cc: linux-media...@lists.infradead.org
Signed-off-by: Paul Gortmaker
---
[Seen on current linux-next, where similar implici
On 21/07/17 17:56, Paolo Abeni wrote:
Hi,
On Fri, 2017-07-21 at 17:20 +0200, John Crispin wrote:
In order to make HW flow offloading work in latest MediaTek silicon we need
to propagate part of the RX DMS descriptor to the upper layers populating
the flow offload engines HW tables. This
the required information and make it persistent for the lifecycle of the
skb and its clones.
Signed-off-by: John Crispin
---
include/linux/skbuff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 4093552be1de..db9576cd946b 100644
--- a
is later required by the upper layers to populate the flow offloading
engines HW tables properly. This patch sets the skb_shared_info's dma_desc
field so that we can use the value later on.
Signed-off-by: John Crispin
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 4
1 file chang
still using NF hooks and
I plan to rebase it and send it upstream once the flow table offloading
patches that folks are working on are upstream.
I am right now trying to get rid of the remaning hacks in the code and
wanted to know if this series would be a feasible solution.
John
John Crispin
We need to access this struct from within the flow_dissector to fix
dissection for packets coming in on DSA devices.
Signed-off-by: John Crispin
---
include/net/dsa.h | 7 +++
net/dsa/dsa_priv.h | 7 ---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/include/net/dsa.h b
The MT7530 inserts the 4 magic header in between the 802.3 address and
protocol field. The patch defines these header such that the flow_disector
can properly parse the packet and thus allows hashing to function properly.
Signed-off-by: John Crispin
---
net/dsa/tag_mtk.c | 6 --
1 file
the dsa tag driver thus fixing dissection, hashing and RPS.
Signed-off-by: John Crispin
---
net/core/flow_dissector.c | 12
1 file changed, 12 insertions(+)
diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c
index fc5fc4594c90..1268ae75c3b3 100644
--- a/net/c
Adding these 2 new fields allows a DSA device to indicate the offsets of
the 802.3 header caused by the insertion of the switches tag.
Signed-off-by: John Crispin
---
include/net/dsa.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/net/dsa.h b/include/net/dsa.h
index
situation happening.
Signed-off-by: Sean Wang
Thanks, i ran into the same problem last week and was going to send a
fix shortly.
Acked-by: John Crispin
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/ethernet/mediatek
On 20/06/17 23:52, Andrew Lunn wrote:
On Tue, Jun 20, 2017 at 07:37:35PM +0200, John Crispin wrote:
On 20/06/17 16:01, Andrew Lunn wrote:
On Tue, Jun 20, 2017 at 10:06:54AM +0200, John Crispin wrote:
RPS and probably other kernel features are currently broken on some if not
all DSA devices
On 20/06/17 19:30, Florian Fainelli wrote:
On 06/20/2017 07:01 AM, Andrew Lunn wrote:
On Tue, Jun 20, 2017 at 10:06:54AM +0200, John Crispin wrote:
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root cause of this that skb_hash will call the
On 20/06/17 16:01, Andrew Lunn wrote:
On Tue, Jun 20, 2017 at 10:06:54AM +0200, John Crispin wrote:
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root cause of this that skb_hash will call the
flow_disector.
Hi John
What is the call path
On 20/06/17 15:54, Andrew Lunn wrote:
On Tue, Jun 20, 2017 at 10:06:55AM +0200, John Crispin wrote:
The MT7530 inserts the 4 magic header in between the 802.3 address and
protocol field. The patch defines these header such that the flow_disector
can properly parse the packet and thus allows
hem in order to be able to create the real hash of
the connection.
Signed-off-by: John Crispin
---
include/net/dsa.h | 6 ++
net/core/flow_dissector.c | 12
2 files changed, 18 insertions(+)
diff --git a/include/net/dsa.h b/include/net/dsa.h
index 58969b9a0
The MT7530 inserts the 4 magic header in between the 802.3 address and
protocol field. The patch defines these header such that the flow_disector
can properly parse the packet and thus allows hashing to function properly.
Signed-off-by: John Crispin
---
drivers/net/dsa/mt7530.c | 2 ++
1 file
each other under heavy load.
Signed-off-by: John Crispin
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 79 ++---
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 5 +-
2 files changed, 54 insertions(+), 30 deletions(-)
diff --git a/drivers/net/ethernet/mediatek
The get_rps_cpu() function will not do any RPS on the data flow when no
queue is setup and always use the current cpu where the IRQ was handled
to also handle the backlog. As we only have one physical queue we always
set this to 0 unconditionally.
Signed-off-by: John Crispin
---
drivers/net
The PDMA engine used for RX allows IRQ aggregation. The patch sets up the
corresponding registers to aggregate 4 IRQs into one. Using aggregation
reduces the load on the core handling to a quarter thus reducing IRQ
latency and increasing RX performance by around 10%.
Signed-off-by: John Crispin
throughput. Additionally the IRQ mask register is now locked
independently for RX and TX. RX IRQ aggregation is also added. With all
these patches applied we can almost triple the throughput.
While at it we also add PHY status change reporting for GMACs connecting
directly to a PHY.
John Crispin
Currently PHY status changes are only printed for DSA ports. This patch
adds code to also print status changes for non-fixed links.
Signed-off-by: John Crispin
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/ethernet/mediatek
next-20170530]
[cannot apply to v4.12-rc3]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/John-Crispin/Documentation-devicetree-add-multiple-cpu-port-DSA-binding/20170530-224954
config: x86_64
to connect to an external PHY.
Signed-off-by: John Crispin
---
drivers/net/dsa/mt7530.c | 45 +
drivers/net/dsa/mt7530.h | 1 -
2 files changed, 29 insertions(+), 17 deletions(-)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index
dle to the host interface it
connects to. Each user port can have a phandle to a cpu port which
should be used for traffic between the port and the CPU. Thus simple
load sharing over the two CPU ports can be achieved.
Signed-off-by: John Crispin
---
include/net/dsa.h | 21 -
net/
Extend the DSA binding documentation, adding the new property required
when there is more than one CPU port attached to the switch.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Signed-off-by: John Crispin
---
Documentation/devicetree/bindings/net/dsa/dsa.txt | 61 ++-
1
On 23/03/17 15:09, Felix Fietkau wrote:
On 2017-03-23 09:06, Sean Wang wrote:
Hi Andrew,
The purpose for the regmap table registered is to
provide a way which helps us to look up a specific
register on the switch through regmap-debugfs.
And not all ranges of register is defined
so I only
On 13/03/17 17:11, sean.w...@mediatek.com wrote:
From: Sean Wang
MT7530 is a 7-ports Gigabit Ethernet Switch that could be found on
Mediatek router platforms such as MT7623A or MT7623N which includes 7-port
Gigabit Ethernet MAC and 5-port Gigabit Ethernet PHY. Among these ports,
The port from
and
upstream the DSA driver. There are no users of this binding yet. It should
be safe to fix this now before it is too late and we need to provide
backward compatibility for the mt7623-eth compat string.
Reported-by: Sean Wang
Signed-off-by: John Crispin
---
Documentation/devicetree/bindings
and
upstream the DSA driver. There are no users of this binding yet. It should
be safe to fix this now before it is too late and we need to provide
backward compatibility for the mt7623-eth compat string.
Reported-by: Sean Wang
Signed-off-by: John Crispin
---
drivers/net/ethernet/mediatek
) has been
called:
Fix this by disabling NAPI first then freeing resource, and make sure
that we also cancel the restart taks before doing the resource freeing.
Fixes: beb0babfb77e ("korina: disable napi on close and restart")
Reported-by: Alexandros C. Couloumbis
Tested-by: John Cr
: dsa: Refactor DT probing of a switch port
net-next: dsa: Add support for multiple cpu ports.
John Crispin (1):
net-next: dsa: qca8k: add support for multiple cpu ports
Documentation/devicetree/bindings/net/dsa/dsa.txt | 67 +-
drivers/net/dsa/qca8k.c
n now have a phandle to the host interface it
connects to. Each user port can have a phandle to a cpu port which
should be used for traffic between the port and the CPU. Thus simple
load sharing over the two CPU ports can be achieved.
Signed-off-by: John Crispin
Signed-off-by: Andrew Lunn
---
i
From: Andrew Lunn
Extend the DSA binding documentation, adding the new properties required
when there is more than one CPU port attached to the switch.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Signed-off-by: Andrew Lunn
---
Documentation/devicetree/bindings/net/dsa/dsa.txt | 67 ++
/leave logic needs a small fix to work with having a cpu port other
than 0.
Signed-off-by: John Crispin
---
drivers/net/dsa/qca8k.c | 135 +++
drivers/net/dsa/qca8k.h |2 -
2 files changed, 78 insertions(+), 59 deletions(-)
diff --git a/drivers/net/dsa
From: Andrew Lunn
Move the DT probing of a switch port into a function of its own, since
it is about to get more complex. Add better error handling as well.
Signed-off-by: Andrew Lunn
---
net/dsa/dsa.c | 138 ++---
1 file changed, 102 insert
On 16/12/2016 10:24, Volodymyr Bendiuga wrote:
> Hi all,
>
> Does this mean we all agree on implementing caching
> mechanism in net/dsa layer? If yes, then I can start
> working on it immediately.
>
> Regards,
> Volodymyr
i think that the brcm approach is better as at least on QCA you can also
On 15/12/2016 18:21, Vivien Didelot wrote:
> Hi Volodymyr,
>
> Volodymyr Bendiuga writes:
>
>> Hi Andrew,
>>
>> I have tested the approach you wrote in previous mails, the one
>> with setting next.mac to address we are looking for -1. It seems
>> to be as slow as the original implementation, u
On 14/12/2016 12:00, Andrew Lunn wrote:
> On Wed, Dec 14, 2016 at 11:35:30AM +0100, John Crispin wrote:
>>
>>
>> On 14/12/2016 11:31, Andrew Lunn wrote:
>>> On Wed, Dec 14, 2016 at 11:01:54AM +0100, John Crispin wrote:
>>>> Hi Andrew,
>>>>
On 14/12/2016 12:00, Andrew Lunn wrote:
> On Wed, Dec 14, 2016 at 11:35:30AM +0100, John Crispin wrote:
>>
>>
>> On 14/12/2016 11:31, Andrew Lunn wrote:
>>> On Wed, Dec 14, 2016 at 11:01:54AM +0100, John Crispin wrote:
>>>> Hi Andrew,
>>>>
On 14/12/2016 11:31, Andrew Lunn wrote:
> On Wed, Dec 14, 2016 at 11:01:54AM +0100, John Crispin wrote:
>> Hi Andrew,
>>
>> switches supported by qca8k have 2 gmacs that we can wire an external
>> mii interface to. Usually this is used to wire 2 of the SoCs MACs t
Hi Andrew,
switches supported by qca8k have 2 gmacs that we can wire an external
mii interface to. Usually this is used to wire 2 of the SoCs MACs to the
switch. Thw switch itself is aware of one of the MACs being the cpu port
and expects this to be port/mac0. Using the other will break the
hardwa
On 18/10/2016 15:24, Andrew Lunn wrote:
>> Hi Andrew
>>
>> i am testing on v4.4 which did not have a phy_disconnect() call. this
>> seems to have been fixed by cda5c15b so please ignore this patch
>
> Hi John
>
> All patches must be against net-next, or net if it is a fix. Anything
> else is wr
On 18/10/2016 14:29, Andrew Lunn wrote:
> On Tue, Oct 18, 2016 at 02:12:40PM +0200, John Crispin wrote:
>> The shutdown code only stopped the PHYs but does not diconnect them
>> properly. This could lead to null pointer deref related kernel oopses
>> during reboot
The shutdown code only stopped the PHYs but does not diconnect them
properly. This could lead to null pointer deref related kernel oopses
during reboot. Fix this by calling phy_disconnect() after the PHYs are
stopped.
Signed-off-by: John Crispin
---
net/dsa/slave.c |4 +++-
1 file changed
ot;);
> return -ENODEV;
> }
>
> dev_info(eth->dev, "chip id = %d\n", *chip_id);
>
> return 0;
> }
> ...
> static int mtk_probe(struct platform_device *pdev)
> {
> ...
> err = mtk_get_chip_id(eth,
Hi Nelson,
comment inline
On 03/10/2016 09:18, Nelson Chang wrote:
> Because hw lro started to be supported from MT7623, the proper way to check if
> the feature is capable is to judge by the chip id instead of by the dtsi.
>
> Signed-off-by: Nelson Chang
> ---
> drivers/net/ethernet/mediatek/
Hi Nelson,
comments inline
On 03/10/2016 09:18, Nelson Chang wrote:
> The driver gets the chip id by ETHSYS_CHIPID0_3/ETHSYS_CHIPID4_7 registers
> in mtk_probe().
>
> Signed-off-by: Nelson Chang
> ---
> drivers/net/ethernet/mediatek/mtk_eth_soc.c | 27 +++
> drivers/net
Only 1 of the 3 drivers currently has a set_addr() operation. Make the
set_addr() callback optional to reduce the amount of empty stubs inside
the drivers.
Signed-off-by: John Crispin
---
net/dsa/dsa.c |8 +---
net/dsa/dsa2.c |8 +---
2 files changed, 10 insertions(+), 6
The set_addr() callback is now optional. Remove the empty stub that b53
has.
Signed-off-by: John Crispin
---
drivers/net/dsa/b53/b53_common.c |6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/net/dsa/b53/b53_common.c b/drivers/net/dsa/b53/b53_common.c
index 0afc2e5..1a492c0
The Marvell driver is the only one that actually sets the switches HW
address. All other drivers have an empty stub. fix this by making the
callback optional.
John Crispin (4):
net-next: dsa: fix duplicate invocation of set_addr()
net-next: dsa: make the set_addr() operation optional
net
commit 83c0afaec7b730b ("net: dsa: Add new binding implementation")
has a duplicate invocation of the set_addr() operation callback. Remove one
of them.
Signed-off-by: John Crispin
---
net/dsa/dsa2.c |4
1 file changed, 4 deletions(-)
diff --git a/net/dsa/dsa2.c b/net/dsa/ds
The set_addr() callback is now optional. Remove the empty stub that qca8k
has.
Signed-off-by: John Crispin
---
drivers/net/dsa/qca8k.c |8
1 file changed, 8 deletions(-)
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index 7f3f178..4788a89 100644
--- a/drivers/net
On 15/09/2016 22:42, Ido Schimmel wrote:
> On Thu, Sep 15, 2016 at 08:58:50PM +0200, John Crispin wrote:
>> Hi,
>>
>> While adding MDB support to the qca8k dsa driver I found that ipv4 mcast
>> groups don't always get propagated to the dsa driver. In my setup the
Hi,
While adding MDB support to the qca8k dsa driver I found that ipv4 mcast
groups don't always get propagated to the dsa driver. In my setup there
are 2 clients connected to the switch, both running a mdns client. The
.port_mdb_add() callback is properly called for 33:33:00:00:00:FB but
01:00:5E
Add device-tree binding for ar8xxx switch families.
Cc: devicet...@vger.kernel.org
Signed-off-by: John Crispin
---
Changes in V2
* fixup example to include phy nodes and corresponding phandles
* add a note explaining why we need to phy nodes
Changes in V3
* add note stating that the cpu port is
interface. Most of the extra callbacks of the DSA
subsystem are already supported, such as bridge offloading, stp, fdb.
Signed-off-by: John Crispin
---
Changes in V2
* add proper locking for the FDB table
* remove udelay when changing the page. neither datasheet nore SDK code
requires a sleep
* fixed several minor issues to the port setup and arp learning
* changed the namespacing as this driver to qca8k
The driver has so far only been tested on qca8337/N. It should work on other QCA
switches such as the qca8327 with minor changes.
John Crispin (3):
Documentation: devicetree: add qca8k
Fainelli
Signed-off-by: John Crispin
---
Changes in V2
* fix some comments
* remove dead code
* rename variable from phy->reg
include/net/dsa.h |1 +
net/dsa/Kconfig|3 ++
net/dsa/Makefile |1 +
net/dsa/dsa.c |3 ++
net/dsa/dsa_priv.h |2 +
net/dsa/tag_qca.c |
On 14/09/2016 12:39, John Crispin wrote:
> +static void
> +qca8k_fdb_add(struct dsa_switch *ds, int port,
> + const struct switchdev_obj_port_fdb *fdb,
> + struct switchdev_trans *trans)
> +{
> + struct qca8k_priv *priv = qca8k_to_priv(ds);
> +
Add support for the 2-bytes Qualcomm tag that gigabit switches such as
the QCA8337/N might insert when receiving packets, or that we need
to insert while targeting specific switch ports. The tag is inserted
directly behind the ethernet header.
Signed-off-by: John Crispin
---
* fix some comments
interface. Most of the extra callbacks of the DSA
subsystem are already supported, such as bridge offloading, stp, fdb.
Signed-off-by: John Crispin
---
Changes in V2
* add proper locking for the FDB table
* remove udelay when changing the page. neither datasheet nore SDK code
requires a sleep
Add device-tree binding for ar8xxx switch families.
Cc: devicet...@vger.kernel.org
Signed-off-by: John Crispin
---
Changes in V2
* fixup ecample to include phy nodes and corresponding phandles
* add a note explaining why we need to phy nodes
.../devicetree/bindings/net/dsa/qca8k.txt
* fixed several minor issues to the port setup and arp learning
* changed the namespacing as this driver to qca8k
The driver has so far only been tested on qca8337/N. It should work on other QCA
switches such as the qca8327 with minor changes.
John Crispin (3):
Documentation: devicetree: add qca8k
On 13/09/2016 21:07, Andrew Lunn wrote:
>> Since the former alternative is prefered, we may want to remove the
>> latter soon from DSA. If this phy_port_map is needed for that case, it'd
>> be preferable not to add it.
>
> O.K, so maybe we should solve it the device tree way:
>
>
>&mdi
On 13/09/2016 19:09, Florian Fainelli wrote:
> On 09/13/2016 08:59 AM, Andrew Lunn wrote:
>>> Hi Andrew,
>>>
>>> this function does indeed duplicate the functionality of
>>> phy_ethtool_get_eee() with the small difference, that e->eee_active is
>>> also set which phy_ethtool_get_eee() does not se
On 13/09/2016 18:21, Vivien Didelot wrote:
> Hi John,
>
> John Crispin writes:
>
>> @@ -237,6 +237,7 @@ struct switchdev_obj;
>> struct switchdev_obj_port_fdb;
>> struct switchdev_obj_port_mdb;
>> struct switchdev_obj_port_vlan;
>> +struct sw
On 13/09/2016 03:23, Andrew Lunn wrote:
> So lets see if i have this right.
>
> Port 0 has no internal phy.
> Port 1 has an internal PHY at MDIO address 0.
> Port 2 has an internal PHY at MDIO address 1.
> ...
> Port 5 has an internal PHY ad MDIO address 4.
> Port 6 has no internal PHY.
Hi Andr
On 13/09/2016 02:40, Andrew Lunn wrote:
>> > +static int
>> > +qca8k_get_eee(struct dsa_switch *ds, int port,
>> > +struct ethtool_eee *e)
>> > +{
>> > + struct qca8k_priv *priv = qca8k_to_priv(ds);
>> > + struct ethtool_eee *p = &priv->port_sts[qca8k_phy_to_port(port)].eee;
>> > + u32
Add SWITCHDEV_OBJ_ID_IPV4_FIB support to the DSA layer.
Signed-off-by: John Crispin
---
Changes in V2
* rebase on latest net-next to fix compile errors
Changes in V3
* fix subject prefix. this needs to go into the next tree
Documentation/networking/dsa/dsa.txt | 18 +++
include
Add SWITCHDEV_OBJ_ID_IPV4_FIB support to the DSA layer.
Signed-off-by: John Crispin
---
Changes in V2
* rebase on latest net-next to fix compile errors
Documentation/networking/dsa/dsa.txt | 18 +++
include/net/dsa.h| 13 +++
net/dsa/slave.c
On 12/09/2016 16:00, Andrew Lunn wrote:
> Hi John
>
>> +if (!ds->drv->ipv4_fib_prepare || !ds->drv->ipv4_fib_add)
>
> drv recently got renamed to ops, which is what 0-day is complaining
> about.
>
> Andrew
>
i based this on a net-next from 5-6 days ago, will rebase/resend tomorrow.
Add SWITCHDEV_OBJ_ID_IPV4_FIB support to the DSA layer.
Signed-off-by: John Crispin
---
Documentation/networking/dsa/dsa.txt | 18 +++
include/net/dsa.h| 13 +++
net/dsa/slave.c | 41 ++
3 files
Add device-tree binding for ar8xxx switch families.
Cc: devicet...@vger.kernel.org
Signed-off-by: John Crispin
---
.../devicetree/bindings/net/dsa/qca8k.txt | 53
1 file changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/dsa
interface. Most of the extra callbacks of the DSA
subsystem are already supported, such as bridge offloading, stp, fdb.
Signed-off-by: John Crispin
---
drivers/net/dsa/Kconfig |9 +
drivers/net/dsa/Makefile |1 +
drivers/net/dsa/qca8k.c | 969
* fixed several minor issues to the port setup and arp learning
* changed the namespacing as this driver to qca8k
The driver has so far only been tested on qca8337/N. It should work on other QCA
switches such as the qca8327 with minor changes.
John Crispin (3):
Documentation: devicetree: add qca8k
Add support for the 2-bytes Qualcomm tag that gigabit switches such as
the QCA8337/N might insert when receiving packets, or that we need
to insert while targeting specific switch ports. The tag is inserted
directly behind the ethernet header.
Signed-off-by: John Crispin
---
include/net/dsa.h
meone
with more overview of how NAPI should be used might want to comment on this.
Tested-by: John Crispin
> ---
> drivers/net/ethernet/mediatek/mtk_eth_soc.c | 31
> -
> 1 file changed, 17 insertions(+), 14 deletions(-)
>
> diff --git a/dri
n using
more than 1 gmac.
Acked-by: John Crispin
> ---
> drivers/net/ethernet/mediatek/mtk_eth_soc.c | 11 ++-
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
> b/drivers/net/ethernet/mediatek/mtk_eth_soc.
On 25/08/2016 12:44, Sean Wang wrote:
> 1) mtk_stop() must be called to stop for freeing DMA resources
> acquired and restoring state changed by mtk_open() when module
> removal.
>
> 2) group clock disabled related function into mtk_hw_deinit which
> could be reused with others functionality suc
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