On Thu, Dec 3, 2015 at 1:19 AM, wrote:
> From: Igal Liberman
>
> This patch adds the Ethernet MAC driver supporting the three
> different types of MACs: dTSEC, tGEC and mEMAC.
>
> Signed-off-by: Igal Liberman
[...]
> +
> +MODULE_LICENSE("Dual BSD/GPL");
> +
> +MODULE_AUTHOR("Emil Medve ");
I
On Mon, Aug 17, 2015 at 2:18 PM, David Miller wrote:
>
> From:
> Date: Fri, 14 Aug 2015 12:23:40 +0800
>
> > From: Shaohui Xie
> >
> > Currently, if phy state is PHY_RUNNING, we always register a CHANGE
> > when phy works in polling or interrupt ignored, this will make the
> > adjust_link being
On Feb 22, 2008, at 09:55, Anton Vorontsov wrote:
When user disabled autonegotiation via ethtool, and no link is
detected,
phylib will place phy into forcing mode, and then will start calling
phy_force_reduction(). This will break user expectations. For example,
user asks for fixed speed 1000
MII_M_PHY_CR 0
+#define MII_M_SOFTWARE_RESET 0x8000
You don't need to do this. There are already constants for both of
those values. That's a standard register.
MODULE_DESCRIPTION("Marvell PHY driver");
MODULE_AUTHOR("Andy Fl
From: Becky Bruce <[EMAIL PROTECTED]>
Change all dma op invocations in gianfar.c to actually pass in the
device pointer. Currently, the value is ignored, but it will be
used going forward as we implement archdata for 32-bit powerpc.
Signed-off-by: Becky Bruce <[EMAIL PROTECTED]>
Ac
The PHY Lib now uses mutexes instead of spin_locks. ucc_geth
and gianfar both grab the locks in their mdio_reset functions,
so they need to use mutex_(un)lock instead. This was not caught
until someone tested it on an SMP system.
Signed-off-by: Andy Fleming <[EMAIL PROTECTED]>
---
drive
Jeff, Dave, any chance we can get this one in for 2.6.25? It will
allow a number of other drivers to start using PHY Lib.
I'm sure Nate can resend if needed.
On Jan 3, 2008, at 17:36, Nate Case wrote:
PHY read/write functions can potentially sleep (e.g., a PHY accessed
via I2C). The followi
them from an interrupt context.
* Use work queue for PHY state machine handling since
it can potentially sleep
* Change phydev lock from spinlock to mutex
Signed-off-by: Nate Case <[EMAIL PROTECTED]>
Ok, I've tested this on my system and it works.
Acked-by: Andy Flem
On Dec 28, 2007, at 11:31, Ionut Nicu wrote:
Prevent unloading mii bus driver module when other modules have
references to some
phydevs on that bus. Added a new member (module owner) to struct
mii_bus and added
code to increment the mii bus owner module usage count on
phy_connect and decre
abstraction layer.
I 've tetsted this with the macb driver.
Signed-off-by: Rini van Zetten <[EMAIL PROTECTED]>
Acked-by: Andy Fleming <[EMAIL PROTECTED]>
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yption key:
Power Management:off
Signed-off-by: David Woodhouse <[EMAIL PROTECTED]>
d'oh!
Acked-by: Andy Fleming <[EMAIL PROTECTED]>
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 9bc1177..7c9e6e3 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net
mment is that we might want to have
support for checking preamble suppression support in the PHY Lib,
itself.
Acked-by: Andy Fleming <[EMAIL PROTECTED]>
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More ma
device's release function, thus
we're getting rid of this badness.
Also small hidden bug fixed, hope none other introduced. ;-)
Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>
Acked-by: Andy Fleming <[EMAIL PROTECTED]>
Andy
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On Aug 17, 2007, at 01:54, Domen Puncer wrote:
Writing BMCR_RESET bit will reset MII_BMCR to default values. This is
clearly not what we want.
Signed-off-by: Domen Puncer <[EMAIL PROTECTED]>
Acked-by: Andy Fleming <[EMAIL PROTECTED]>
I could have sworn there was a patch t
On Jul 18, 2007, at 02:00, pradeep singh wrote:
On 7/18/07, Andy Fleming <[EMAIL PROTECTED]> wrote:
- if (err)
+ if (err < 0)
return err;
but would that mean, if phy_read returns > 0 it is a success?
Yes. phy_read() retu
phy_read() returns a negative number if there's an error, but the
error-checking code in the Vitesse driver's config_intr function
triggers if phy_read() returns non-zero. Correct that.
Signed-off-by: Andy Fleming <[EMAIL PROTECTED]>
---
I made a really stupid mistake in the 4 pa
bug on the 8641D HPCN board where the Vitesse PHY doesn't use the delay
for RGMII.
Signed-off-by: Andy Fleming <[EMAIL PROTECTED]>
---
arch/powerpc/sysdev/fsl_soc.c |9 +
drivers/net/gianfar.c | 12 +++-
include/linux/fsl_devices.h |1 +
3 files changed
The TSEC/eTSEC automatically detect their PHY interface type, unless
the type is RGMII-ID (RGMII with internal delay). In that situation,
it just detects RGMII. In order to fix this, we need to pass in rgmii-id
if that is the connection type.
Signed-off-by: Andy Fleming <[EMAIL PROTEC
or a silly race condition. So rather than change the PHY Lib, we change
the Vitesse driver so it always clears interrupts before disabling them.
Further, the ack function only clears the interrupt if interrupts are
enabled.
Signed-off-by: Andy Fleming <[EMAIL PROTECTED]>
Signed-off-by: York
The Vitesse PHY on the 8641D needs to be set up with internal delay to
work in RGMII mode. So we add skew when it is set to RGMII_ID mode.
Signed-off-by: Andy Fleming <[EMAIL PROTECTED]>
Signed-off-by: Haruki Dai <[EMAIL PROTECTED]>
Signed-off-by: Haiying Wang <[EMAIL PROTECTED
://opensource.freescale.com/pub/scm/linux-2.6-85xx.git netdev
Andy Fleming (4):
Fix Vitesse 824x PHY interrupt acking
Add phy-connection-type to gianfar nodes
Fix Vitesse RGMII-ID support
Fix RGMII-ID handling in gianfar
Documentation/powerpc/booting-without-of.txt |6 +++
arch
On Jun 11, 2007, at 02:53, Mark Zhan wrote:
Current MII bitbang bus driver hard-codes the phy mask of mii_bus to
~0x09, which is actually specific to the FSL boards. This patch will
make the bitbang driver to generate MII bus phy_mask dynamically,
by the
PHY irq info provided by the platform
On May 11, 2007, at 05:58, Matvejchikov Ilya wrote:
Signed-off-by: Matvejchikov Ilya <[EMAIL PROTECTED]>
Acked-by: Andy Fleming <[EMAIL PROTECTED]>
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rtman <[EMAIL PROTECTED]>
Acked-by: Andy Fleming <[EMAIL PROTECTED]>
---
I think I copied that code from elsewhere without truly understanding
it.
*bows head in shame*
As such, I have no objection to this patch unless someone says it
breaks their board. :)
driver
On Apr 13, 2007, at 09:53, David Hollis wrote:
On Wed, 2007-04-11 at 16:42 -0500, Kim Phillips wrote:
On Wed, 11 Apr 2007 03:03:56 +0200
Lennert Buytenhek <[EMAIL PROTECTED]> wrote:
There may not be as much, but there definitely are still cases where
there are devices that may have one of th
On Mar 2, 2007, at 11:42, Shan Lu wrote:
Changelog:
Function `phy_mii_ioctl' returns physical device's information
based on
user requests. When requested to return the basic mode control
register
information (BMCR), the original implementation only returns the
physical device's duplex info
itself as gfar_{receive/transmit/error}() do it anyway.
While at it, also clarify/cleanup debug messages in gfar_error()...
Signed-off-by: Sergei Shtylyov <[EMAIL PROTECTED]>
Acked-by: Andy Fleming <[EMAIL PROTECTED]>
---
The patch survived netperf stressing on MPC8540ADS realt
On Jan 26, 2007, at 08:36, Maciej W. Rozycki wrote:
Kumar,
I've got a BCM5461 that requires this fix to be able to force the
speeds
on the PHY. Not sure if its needed on the other variants or not.
The
problem is the genphy_config_aneg resets the PHY when forcing the
speed
and once we r
On Feb 9, 2007, at 15:33, Kumar Gala wrote:
Convert network devices to use struct device instead of
class_device. Greg
missed this one in his cleanup path.
Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
Acked-by: Andy Fleming <[EMAIL PROTECTED]>
Jeff, please get this into
>From Andy Fleming <[EMAIL PROTECTED]>
Changes include:
* New support for 88e1145
* New support for 88e111s
* Fixing 88e1101 driver to not match non-88e1101 PHYs
* Increases in feature support across Marvell PHY product line
* Fixes a bunch of whitespace issues found by Lindent
Sign
nt 4 (different signedness)
Signed-off-by: Randy Dunlap <[EMAIL PROTECTED]>
Acked-by: Andy Fleming <[EMAIL PROTECTED]>
Oops, I thought I had fixed that before submission.
---
drivers/net/phy/phy_device.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- linux-262
On Dec 21, 2006, at 22:07, Benjamin Herrenschmidt wrote:
Hi Andy !
I've been looking at porting various drivers (EMAC, sungem,
spider_net, ...) to the generic PHY stuff. However, I have one
significant problem here.
One of the things I've been trying to do lately with EMAC and that I
plan to
On Dec 5, 2006, at 00:03, Benjamin Herrenschmidt wrote:
I believe that this fiber enabling can be done by defining
config_init in the phy_driver struct.
struct phy_driver {
/* Called to initialize the PHY,
* including after a reset */
int (*config_init)(struct phy
On Nov 30, 2006, at 12:07, Maciej W. Rozycki wrote:
On Mon, 23 Oct 2006, Maciej W. Rozycki wrote:
I'm not too enthusiastic about requiring the ethernet drivers to
call
phy_disconnect in a separate thread after "close" is called.
Assuming there's
not some sort of "squash work queue" functi
i->bus_id, &fs_adjust_link, 0,
+ PHY_INTERFACE_MODE_MII);
else {
printk("No phy bus ID specified in BSP code\n");
return -EINVAL;
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index a06d8d1..4fb9d96 100644
--- a/
On Nov 8, 2006, at 00:16, Kumar Gala wrote:
On Nov 8, 2006, at 12:10 AM, Andy Fleming wrote:
Most PHYs connect to an ethernet controller over a GMII or MII
interface. However, a growing number are connected over
different interfaces, such as RGMII or SGMII.
The ethernet driver will tell
DIRECT 0x4100
+#define MII_M_PHY_LED_COMBINE 0x411c
+
MODULE_DESCRIPTION("Marvell PHY driver");
MODULE_AUTHOR("Andy Fleming");
MODULE_LICENSE("GPL");
@@ -64,7 +77,7 @@ static int marvell_config_intr(struct ph
{
int err;
- if(phydev-
PHY_INTERFACE_MODE_MII);
else {
printk("No phy bus ID specified in BSP code\n");
return -EINVAL;
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index a06d8d1..80e4aec 100644
--- a/drivers/net/gianfar.c
+++ b/driv
On Nov 6, 2006, at 05:19, Vitaly Wool wrote:
The patch inlined below adds NET_POLL_CONTROLLER support for
gianfar network driver.
drivers/net/gianfar.c | 34 ++
1 file changed, 34 insertions(+)
Signed-off-by: Vitaly Wool <[EMAIL PROTECTED]>
Index: powerpc
5 04:58:46.0 +
+++ linux-mips-2.6.18-20060920/drivers/net/phy/phy.c 2006-10-03
14:19:21.0 +
@@ -7,6 +7,7 @@
* Author: Andy Fleming
*
* Copyright (c) 2004 Freescale Semiconductor, Inc.
+ * Copyright (c) 2006 Maciej W. Rozycki
*
* This program is free software; you c
* genphy_update_link is now exported
* Added a fix from [EMAIL PROTECTED] which changes forcing so it
only updates the link. Otherwise, it never tries the lower
values, since it is always overwriting the speed/duplex values
with the current ones, rather than the intended ones.
* Fixed a bug
On May 4, 2006, at 04:17, Herbert Valerio Riedel wrote:
Hello,
I've tried to adapt the PHY detection code to allow for dynamic
runtime
configuration (with fallback to search for the 2nd MAC PHY on the 1st
MAC's MII bus), as well as selectable static PHY configuration through
Kconfig (e.g. f
On May 3, 2006, at 11:34, Herbert Valerio Riedel wrote:
hello *
On Tue, 2006-05-02 at 11:20 -0500, Mark Schank wrote:
At 08:23 AM 5/2/06 +0200, Herbert Valerio Riedel wrote:
On Mon, 2006-05-01 at 15:09 -0500, Mark Schank wrote:
The Cogent CSB655 used the Broadcom Dual Phy. They eventually
Signed-off-by: Andy Fleming <[EMAIL PROTECTED]>
---
drivers/net/gianfar.c | 56
+-
drivers/net/gianfar.h | 67 +++
+-
drivers/net/gianfar_ethtool.c | 20 +---
drivers/net/gianfar_sysfs.c
-off-by: Andy Fleming <[EMAIL PROTECTED]>
>From nobody Mon Sep 17 00:00:00 2001
From: Andrew Fleming <[EMAIL PROTECTED]>
Date: Thu Apr 6 20:18:31 2006 -0500
Subject: [PATCH] * Split gianfar locks into two types: TX and RX
* Made it so gfar_start() now clears RHALT
* Fixed a bu
On Dec 12, 2005, at 13:41, Dale Farnsworth wrote:
In article <[EMAIL PROTECTED]> you write:
On Mon, Dec 12, 2005 at 11:54:06AM -0700, Dale Farnsworth wrote:
+#ifdef CONFIG_NET_POLL_CONTROLLER
+/*
+ * Polling - used by netconsole and other diagnostic tools
+ * to allow network i/o with interr
This seems to have gotten lost, so I'll resend.
Signed-off-by: Andy Fleming <[EMAIL PROTECTED]>
* Added sysfs support to gianfar for modifying FIFO and stashing parameters
* Updated driver to support 10 Mbit, full duplex operation
* Improved comments throughout
* Cleaned up an
On Sep 9, 2005, at 05:10, Bogdan Costescu wrote:
On Thu, 8 Sep 2005, Andy Fleming wrote:
Is the cost of an extra read every minute really too high?
You probably didn't look at the code. The MII registers are not
exposed in the PCI space, they need to be accessed through a s
On Sep 8, 2005, at 10:42, Bogdan Costescu wrote:
On Thu, 8 Sep 2005, Tommy Christensen wrote:
Personally, I'd prefer the delay to be < 10 seconds.
If you sample every 60 seconds ? Teach Shannon how to do it ;-)
If you mean to reduce the sampling period, there is a very good
reason not t
2) Call your mdio bus initialization function from your USB probe
function.
If I have multiple devices, should I wind up having a separate MDIO
bus
for each? If so, this would make sense for handling the registration.
My theory is one bus per master (mostly). As I understand it, each
e this isn't
necessary, since it's a lot like #3, in that it means that the
current mdio bus code probably needs serious work.
HTH,
Andy Fleming
--
David Hollis <[EMAIL PROTECTED]>
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This patch adds back the code that was taken out, thus re-enabling:
* The PHY Layer to initialize without crashing
* Drivers to actually connect to PHYs
* The entire PHY Control Layer
This patch is used by the gianfar driver, and other drivers which are in
development.
Signed-off-by: Andy
dead code. Certainly it's all used by the gianfar ethernet driver
(once updated to use the PHY Layer). I'd be happy to work with you
to get this code up to... um... code.
Andy Fleming
Freescale Open Source Team
-
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Hmmm
I just did an update, and tried applying first the PHY Layer patch,
and then the Gianfar PHY Layer patch. It worked fine for me.
Did you apply the the 7/28 patch: [PATCH] sysfs feature enablement
for gianfar?
Because that patch would screw up the PHY patch for gianfar (I sent
a
ement
for gianfar".
Signed-off-by: Andy Fleming <[EMAIL PROTECTED]>
* Merged stashing/sysfs/exact match support into PHY tree
---
commit c65b921e4720850c7532f95caf2dc9341b26efa2
tree 8822bc37587224d6dd54ea3aae070f45b123e55d
parent d58caeb7c62c4f2b6c6f81ad6ee4537f0ba5ba60
author A
lower threshold of fifo bytes
Also added is support for using the eTSEC exact-match registers to filter
multicast addresses until they overflow.
Signed-off-by: Andy Fleming <[EMAIL PROTECTED]>
Index: Documentation/networking/gianf
On Jul 27, 2005, at 13:08, Randy Dunlap wrote:
On Jul 25, 2005, at 16:06, Francois Romieu wrote:
+int mdiobus_register(struct mii_bus *bus)
+{
+int i;
+int err = 0;
+
+spin_lock_init(&bus->mdio_lock);
+
+if (NULL == bus || NULL == bus->name ||
+NULL == bus->re
On Jul 25, 2005, at 16:06, Francois Romieu wrote:
[snip]
+config DAVICOM_PHY
+bool "Drivers for Davicom PHYs"
+depends on PHYLIB
+---help---
+ Currently supports dm9161e and dm9131
[snip]
Yeah, I resisted splitting the patch up for this reason. Suffice it
to say, you
This patch contains the PHY drivers
diff --git a/drivers/net/phy/cicada.c b/drivers/net/phy/cicada.c
new file mode 100644
--- /dev/null
+++ b/drivers/net/phy/cicada.c
@@ -0,0 +1,134 @@
+/*
+ * drivers/net/phy/cicada.c
+ *
+ * Driver for Cicada PHYs
+ *
+ * Author: Andy Fleming
+ *
+ * Copyright
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