Am 06.08.2014 17:20, schrieb Ilia Mirkin:
> On Wed, Aug 6, 2014 at 11:15 AM, Roland Scheidegger
> wrote:
>> Am 06.08.2014 17:03, schrieb Ilia Mirkin:
>>> On Wed, Aug 6, 2014 at 10:52 AM, Roland Scheidegger
>>> wrote:
Am 06.08.2014 13:00, schrieb Marek Olšák:
> On Wed, Aug 6, 2014 at 4:
On Wed, Aug 6, 2014 at 11:15 AM, Roland Scheidegger wrote:
> Am 06.08.2014 17:03, schrieb Ilia Mirkin:
>> On Wed, Aug 6, 2014 at 10:52 AM, Roland Scheidegger
>> wrote:
>>> Am 06.08.2014 13:00, schrieb Marek Olšák:
On Wed, Aug 6, 2014 at 4:02 AM, Ilia Mirkin wrote:
> On Tue, Aug 5, 2014
Am 06.08.2014 17:03, schrieb Ilia Mirkin:
> On Wed, Aug 6, 2014 at 10:52 AM, Roland Scheidegger
> wrote:
>> Am 06.08.2014 13:00, schrieb Marek Olšák:
>>> On Wed, Aug 6, 2014 at 4:02 AM, Ilia Mirkin wrote:
On Tue, Aug 5, 2014 at 5:25 PM, Roland Scheidegger
wrote:
> From a gallium
On Wed, Aug 6, 2014 at 10:52 AM, Roland Scheidegger wrote:
> Am 06.08.2014 13:00, schrieb Marek Olšák:
>> On Wed, Aug 6, 2014 at 4:02 AM, Ilia Mirkin wrote:
>>> On Tue, Aug 5, 2014 at 5:25 PM, Roland Scheidegger
>>> wrote:
From a gallium perspective, indirect temp regs are already working
Am 06.08.2014 13:00, schrieb Marek Olšák:
> On Wed, Aug 6, 2014 at 4:02 AM, Ilia Mirkin wrote:
>> On Tue, Aug 5, 2014 at 5:25 PM, Roland Scheidegger
>> wrote:
>>> From a gallium perspective, indirect temp regs are already working - so
>>> something like
>>> MOV TEMP[0], TEMP[TEMP[1].x] should wo
On Wed, Aug 6, 2014 at 4:02 AM, Ilia Mirkin wrote:
> On Tue, Aug 5, 2014 at 5:25 PM, Roland Scheidegger wrote:
>> From a gallium perspective, indirect temp regs are already working - so
>> something like
>> MOV TEMP[0], TEMP[TEMP[1].x] should work.
>> Indirect registers are supported for inputs,
Am 06.08.2014 04:02, schrieb Ilia Mirkin:
> On Tue, Aug 5, 2014 at 5:25 PM, Roland Scheidegger wrote:
>> From a gallium perspective, indirect temp regs are already working - so
>> something like
>> MOV TEMP[0], TEMP[TEMP[1].x] should work.
>> Indirect registers are supported for inputs, outputs, t
On Tue, Aug 5, 2014 at 5:25 PM, Roland Scheidegger wrote:
> From a gallium perspective, indirect temp regs are already working - so
> something like
> MOV TEMP[0], TEMP[TEMP[1].x] should work.
> Indirect registers are supported for inputs, outputs, temps, constants,
> and immediates even, but the
From a gallium perspective, indirect temp regs are already working - so
something like
MOV TEMP[0], TEMP[TEMP[1].x] should work.
Indirect registers are supported for inputs, outputs, temps, constants,
and immediates even, but the indirect reg itself must come from a temp
or address reg (I am not 10
On Tue, Aug 5, 2014 at 3:23 PM, Ilia Mirkin wrote:
> On Tue, Aug 5, 2014 at 4:14 PM, Bryan Cain wrote:
> > On Mon, Aug 4, 2014 at 11:54 PM, Ilia Mirkin
> wrote:
> >>
> >> Another apporach I've tried is to just use a TEMP register as the
> >> indirect offset here. Unfortunately this gets destroy
Using TEMPs instead of address registers seems to be the best choice
here. It will need a CAP though, because some drivers will never
support it. It might be quite a lot of work though.
Marek
On Tue, Aug 5, 2014 at 10:10 PM, Ilia Mirkin wrote:
> *needed*? No, I can't. However without changing a
On Tue, Aug 5, 2014 at 4:14 PM, Bryan Cain wrote:
> On Mon, Aug 4, 2014 at 11:54 PM, Ilia Mirkin wrote:
>>
>> Another apporach I've tried is to just use a TEMP register as the
>> indirect offset here. Unfortunately this gets destroyed by
>> st_glsl_to_tgsi's various optimizations which assume tha
On Mon, Aug 4, 2014 at 11:54 PM, Ilia Mirkin wrote:
> Another apporach I've tried is to just use a TEMP register as the
> indirect offset here. Unfortunately this gets destroyed by
> st_glsl_to_tgsi's various optimizations which assume that temp
> registers can't be reladdr's and so messes up the
*needed*? No, I can't. However without changing a bunch of stuff
around, doing something like
TEX TEMP[ADDR[0].x], SAMP[reladdr], coord, etc
Is going to be tricky. It'd be a little dangerous to use ADDR[1] there
since it's meant to be the dimension, and you could easily have, with
tessellation,
Could you please show us an example in TGSI where a 3rd address
register is needed?
Thanks,
Marek
On Tue, Aug 5, 2014 at 6:54 AM, Ilia Mirkin wrote:
> Hello,
>
> I'm in the process of working out the details of adding dynamic
> sampler support to mesa/st as part of ARB_gpu_shader5. Unfortunatel
On Tue, Aug 5, 2014 at 10:28 AM, Roland Scheidegger wrote:
> Am 05.08.2014 06:54, schrieb Ilia Mirkin:
>> Hello,
>>
>> I'm in the process of working out the details of adding dynamic
>> sampler support to mesa/st as part of ARB_gpu_shader5. Unfortunately
>> I've run into a bit of a roadblock.
>>
>
Am 05.08.2014 06:54, schrieb Ilia Mirkin:
> Hello,
>
> I'm in the process of working out the details of adding dynamic
> sampler support to mesa/st as part of ARB_gpu_shader5. Unfortunately
> I've run into a bit of a roadblock.
>
> One approach I've tried is to load the indirect sampler index int
Hello,
I'm in the process of working out the details of adding dynamic
sampler support to mesa/st as part of ARB_gpu_shader5. Unfortunately
I've run into a bit of a roadblock.
One approach I've tried is to load the indirect sampler index into an
address register and then use that as the offset. H
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