You're seeing the expected result. gallivm current implementation is geared
towards TGSI -> CPU SIMD processing for both draw and llvmpipe modules. SSE
has 128 bits, therefore, in SOA mode, it can process four instances of a TGSI
shader. This is defined in src/gallium/auxiliary/gallivm/lp_bld_
On Sun, Feb 13, 2011 at 2:45 PM, Christian König
wrote:
> Hi,
>
> I'm currently playing around a bit with the TGSI->LLVM IR conversion
> found in the llvmpipe/gallivm driver. While doing so I managed to hock
> into the r600g shader generation a call to lp_build_tgsi_soa and dumping
> the resulting
Hi,
I'm currently playing around a bit with the TGSI->LLVM IR conversion
found in the llvmpipe/gallivm driver. While doing so I managed to hock
into the r600g shader generation a call to lp_build_tgsi_soa and dumping
the resulting LLVM IR additionally to the TGSI and R600 assembler
representation.
