Re: [Mesa-dev] [PATCH 7/9] nir: Change bfm's semantics to match Intel/AMD/SM5.

2016-01-11 Thread Ian Romanick
On 01/11/2016 04:14 PM, Matt Turner wrote: > On Mon, Jan 11, 2016 at 4:01 PM, Ian Romanick wrote: >> On 01/11/2016 02:48 PM, Matt Turner wrote: >>> Intel/AMD's hardware instructions do not handle arguments of 32. >>> Constant evaluation should not produce a result different from the >>> hardware i

Re: [Mesa-dev] [PATCH 7/9] nir: Change bfm's semantics to match Intel/AMD/SM5.

2016-01-11 Thread Matt Turner
On Mon, Jan 11, 2016 at 4:01 PM, Ian Romanick wrote: > On 01/11/2016 02:48 PM, Matt Turner wrote: >> Intel/AMD's hardware instructions do not handle arguments of 32. >> Constant evaluation should not produce a result different from the >> hardware instruction. >> --- >> src/glsl/nir/nir_opcodes.p

Re: [Mesa-dev] [PATCH 7/9] nir: Change bfm's semantics to match Intel/AMD/SM5.

2016-01-11 Thread Ian Romanick
On 01/11/2016 02:48 PM, Matt Turner wrote: > Intel/AMD's hardware instructions do not handle arguments of 32. > Constant evaluation should not produce a result different from the > hardware instruction. > --- > src/glsl/nir/nir_opcodes.py | 9 ++--- > 1 file changed, 6 insertions(+), 3 deletio

[Mesa-dev] [PATCH 7/9] nir: Change bfm's semantics to match Intel/AMD/SM5.

2016-01-11 Thread Matt Turner
Intel/AMD's hardware instructions do not handle arguments of 32. Constant evaluation should not produce a result different from the hardware instruction. --- src/glsl/nir/nir_opcodes.py | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/glsl/nir/nir_opcodes.py b/src/g