Re: [Mesa-dev] [PATCH 6/6] R600: initial scheduler code

Hi Vincent, >From now on, please cc llvm-comm...@cs.uiuc.edu when you submit a patch. I'm cc'ing that list now. This looks OK to me at first glance, but I would like to test it with compute shaders before you merge it. On Mon, Feb 18, 2013 at 05:27:30PM +0100, Vincent Lejeune wrote: > From: Vad

[Mesa-dev] [PATCH 6/6] R600: initial scheduler code

From: Vadim Girlin This is a skeleton for a pre-RA MachineInstr scheduler strategy. Currently it only tries to expose more parallelism for ALU instructions (this also makes the distribution of GPR channels more uniform and increases the chances of ALU instructions to be packed together in a singl