Re: [Mesa-dev] [PATCH 4/4] i965/vec4: Generate better code for ir_triop_csel.

2014-10-16 Thread Matt Turner
On Wed, Oct 15, 2014 at 8:51 PM, Kenneth Graunke wrote: > Previously, we generated an extra CMP instruction: > >cmp.ge.f0(8)g6<1>D g1<0,4,1>F 0F >cmp.nz.f0(8)nullg6<4,4,1>D 0D >(+f0) sel(8)g5<1>F g1.4<0,4,1>Fg2<0,4,1>F > > The fir

Re: [Mesa-dev] [PATCH 4/4] i965/vec4: Generate better code for ir_triop_csel.

2014-10-16 Thread Matt Turner
On Thu, Oct 16, 2014 at 9:01 AM, Ian Romanick wrote: > On 10/15/2014 08:51 PM, Kenneth Graunke wrote: >> Previously, we generated an extra CMP instruction: >> >>cmp.ge.f0(8)g6<1>D g1<0,4,1>F 0F >>cmp.nz.f0(8)nullg6<4,4,1>D 0D >>(+f0) sel(8)g5<

Re: [Mesa-dev] [PATCH 4/4] i965/vec4: Generate better code for ir_triop_csel.

2014-10-16 Thread Ian Romanick
On 10/15/2014 08:51 PM, Kenneth Graunke wrote: > Previously, we generated an extra CMP instruction: > >cmp.ge.f0(8)g6<1>D g1<0,4,1>F 0F >cmp.nz.f0(8)nullg6<4,4,1>D 0D >(+f0) sel(8)g5<1>F g1.4<0,4,1>Fg2<0,4,1>F > > The first opera

[Mesa-dev] [PATCH 4/4] i965/vec4: Generate better code for ir_triop_csel.

2014-10-15 Thread Kenneth Graunke
Previously, we generated an extra CMP instruction: cmp.ge.f0(8)g6<1>D g1<0,4,1>F 0F cmp.nz.f0(8)nullg6<4,4,1>D 0D (+f0) sel(8)g5<1>F g1.4<0,4,1>Fg2<0,4,1>F The first operand is always a boolean, and we want to predicate the SEL on t