On Mon 16 Nov 2015, Ben Widawsky wrote:
> On Fri, Nov 13, 2015 at 12:29:47PM -0800, Chad Versace wrote:
> > On Wed 11 Nov 2015, Ben Widawsky wrote:
> > > Background: Prior to Skylake and since Ivybridge Intel hardware has had
> > > the
> > > ability to use a MCS (Multisample Control Surface) as au
On Fri, Nov 13, 2015 at 12:29:47PM -0800, Chad Versace wrote:
> On Wed 11 Nov 2015, Ben Widawsky wrote:
> > Background: Prior to Skylake and since Ivybridge Intel hardware has had the
> > ability to use a MCS (Multisample Control Surface) as auxiliary data in
> > "compression" operations on the sur
On Wed 11 Nov 2015, Ben Widawsky wrote:
> Background: Prior to Skylake and since Ivybridge Intel hardware has had the
> ability to use a MCS (Multisample Control Surface) as auxiliary data in
> "compression" operations on the surface. This reduces memory bandwidth. This
> hardware was either used
On Wed, Nov 11, 2015 at 02:10:57PM -0800, Ben Widawsky wrote:
> This subject used to say Add lossless compression to surface format TO table
>
> somehow, "to" got dropped. It's fixed locally.
>
Ignore this, subject looks fine to me and I'm an idiot.
[snip]
_
This subject used to say Add lossless compression to surface format TO table
somehow, "to" got dropped. It's fixed locally.
On Wed, Nov 11, 2015 at 02:06:16PM -0800, Ben Widawsky wrote:
> Background: Prior to Skylake and since Ivybridge Intel hardware has had the
> ability to use a MCS (Multisamp
Background: Prior to Skylake and since Ivybridge Intel hardware has had the
ability to use a MCS (Multisample Control Surface) as auxiliary data in
"compression" operations on the surface. This reduces memory bandwidth. This
hardware was either used for MSAA compression, and fast clear operations.
