Ian Romanick writes:
> There aren't any compressed formats that support 1D textures, so I
> don't think this can occur. Does the bspec say anything about
> compressed 1D textures?
Ah yes, you're right. I just copied it from brw_miptree_layout_2d
without really thinking it through. The SKL bspec
On Thu, Feb 19, 2015 at 1:12 AM, Matt Turner wrote:
> On Wed, Feb 18, 2015 at 3:34 PM, Erik Faye-Lund wrote:
>> On Wed, Feb 18, 2015 at 6:02 PM, Ian Romanick wrote:
>>> On 02/17/2015 06:03 AM, Neil Roberts wrote:
+ /* When this layout is used the horizontal alignment is fixed at 64
On Wed, Feb 18, 2015 at 3:34 PM, Erik Faye-Lund wrote:
> On Wed, Feb 18, 2015 at 6:02 PM, Ian Romanick wrote:
>> On 02/17/2015 06:03 AM, Neil Roberts wrote:
>>> + /* When this layout is used the horizontal alignment is fixed at 64 and
>>> the
>>> +* hardware ignores the value given in the
On Wed, Feb 18, 2015 at 6:02 PM, Ian Romanick wrote:
> On 02/17/2015 06:03 AM, Neil Roberts wrote:
>> + /* When this layout is used the horizontal alignment is fixed at 64 and
>> the
>> +* hardware ignores the value given in the surface state
>> +*/
>> + const unsigned int align_w = 6
On 02/17/2015 06:03 AM, Neil Roberts wrote:
> On Gen9+ the 1D miptree is laid out with all of the mipmap levels in a
> horizontal line.
> ---
> src/mesa/drivers/dri/i965/brw_tex_layout.c | 71
> --
> 1 file changed, 68 insertions(+), 3 deletions(-)
>
> diff --git a/sr
On Gen9+ the 1D miptree is laid out with all of the mipmap levels in a
horizontal line.
---
src/mesa/drivers/dri/i965/brw_tex_layout.c | 71 --
1 file changed, 68 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c
b/src/mesa/drivers/
