Re: [Mesa-dev] [PATCH 1/2] radeon/llvm: support for multiple const buffer

2012-12-17 Thread Vadim Girlin
AFAICS, your KC registers still represent the constant indices, same as Cxxx registers previously. The problem with such representation is that hw supports 16 buffers * 4096 constants per buffer = 65536 constants. So we'll need 65536 registers for full support, and it looks like a bit too much of r

[Mesa-dev] [PATCH 1/2] radeon/llvm: support for multiple const buffer

2012-12-17 Thread Vincent Lejeune
--- lib/Target/AMDGPU/AMDGPUIntrinsics.td | 2 +- .../AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp | 26 +++- lib/Target/AMDGPU/R600ISelLowering.cpp | 57 +++- lib/Target/AMDGPU/R600Instructions.td | 4 +- lib/Target/AMDGPU/R600RegisterInfo.td