Re: [Mesa-dev] [PATCH 0/8] Add DCC support.

2015-09-23 Thread Marek Olšák
FYI, I've reviewed all patches now. Marek On Sat, Sep 5, 2015 at 12:28 AM, Marek Olšák wrote: > Thank you very much. I'm impressed. > > Sorry, but this will take some time for me to review because I'm very > busy currently. I will have to check with internal documentation if > everything is corr

Re: [Mesa-dev] [PATCH 0/8] Add DCC support.

2015-09-04 Thread Marek Olšák
Thank you very much. I'm impressed. Sorry, but this will take some time for me to review because I'm very busy currently. I will have to check with internal documentation if everything is correct. The idea of not using DCC for scanout/shared buffers is great. Marek On Fri, Sep 4, 2015 at 9:47 PM

Re: [Mesa-dev] [PATCH 0/8] Add DCC support.

2015-09-04 Thread Axel Davy
On 04/09/2015 23:49, Bas Nieuwenhuizen wrote : With DRI2, my system always gives me SCANOUT framebuffers, even when the application is not running fullescreen, which means that decompression will not happen in this common case. Although I realize now that I am not sure that flag is always set wh

Re: [Mesa-dev] [PATCH 0/8] Add DCC support.

2015-09-04 Thread Bas Nieuwenhuizen
On Friday, September 04, 2015 05:00:47 PM Alex Deucher wrote: > On Fri, Sep 4, 2015 at 3:47 PM, Bas Nieuwenhuizen > > wrote: > > This patch series enables delta color compression (DCC) for Vulcanic > > Islands GPU's. This should reduce memory bandwidth to increase > > performance. > > > > I have

Re: [Mesa-dev] [PATCH 0/8] Add DCC support.

2015-09-04 Thread Alex Deucher
On Fri, Sep 4, 2015 at 3:47 PM, Bas Nieuwenhuizen wrote: > This patch series enables delta color compression (DCC) for Vulcanic > Islands GPU's. This should reduce memory bandwidth to increase > performance. > > I have found no documentation on this feature, so most of the work is > based on guess

[Mesa-dev] [PATCH 0/8] Add DCC support.

2015-09-04 Thread Bas Nieuwenhuizen
This patch series enables delta color compression (DCC) for Vulcanic Islands GPU's. This should reduce memory bandwidth to increase performance. I have found no documentation on this feature, so most of the work is based on guesswork, register names and Catalyst traces. Some benchmarks I've ran: