On Tue, 2017-01-03 at 07:48 -0800, Kenneth Graunke wrote:
> On Tuesday, January 3, 2017 2:02:19 PM PST Iago Toral wrote:
> >
> > On Tue, 2017-01-03 at 11:14 +, Chris Wilson wrote:
> > >
> > > On Tue, Jan 03, 2017 at 11:42:50AM +0100, Iago Toral Quiroga
> > > wrote:
> > > >
> > > >
> > > > E
On Tuesday, January 3, 2017 2:02:19 PM PST Iago Toral wrote:
> On Tue, 2017-01-03 at 11:14 +, Chris Wilson wrote:
> > On Tue, Jan 03, 2017 at 11:42:50AM +0100, Iago Toral Quiroga wrote:
> > >
> > > Enabling GL 4.0 in gen7 requires a bit of work because some
> > > hardware and kernel
> > > comb
On Tuesday, January 3, 2017 11:42:50 AM PST Iago Toral Quiroga wrote:
> Enabling GL 4.0 in gen7 requires a bit of work because some hardware and
> kernel
> combinations may not support all the features. Specifically, we need to know
> if the kernel can do pipelined register writes. Unfortunately,
On Tue, 2017-01-03 at 11:14 +, Chris Wilson wrote:
> On Tue, Jan 03, 2017 at 11:42:50AM +0100, Iago Toral Quiroga wrote:
> >
> > Enabling GL 4.0 in gen7 requires a bit of work because some
> > hardware and kernel
> > combinations may not support all the features. Specifically, we
> > need to k
On Tue, Jan 03, 2017 at 11:42:50AM +0100, Iago Toral Quiroga wrote:
> Enabling GL 4.0 in gen7 requires a bit of work because some hardware and
> kernel
> combinations may not support all the features. Specifically, we need to know
> if the kernel can do pipelined register writes. Unfortunately, th
Enabling GL 4.0 in gen7 requires a bit of work because some hardware and kernel
combinations may not support all the features. Specifically, we need to know
if the kernel can do pipelined register writes. Unfortunately, this requires
that we emit batches at screen creation time when we don't have a
