I see. Fair point.
Marek
On Thu, Apr 4, 2013 at 7:32 PM, Roland Scheidegger wrote:
> Well if the condition is just "any bit set" then it doesn't matter if
> the input is a float or int or whatever (of course, for floats, that
> definition is different than != zero, as it doesn't hold for negati
Well if the condition is just "any bit set" then it doesn't matter if
the input is a float or int or whatever (of course, for floats, that
definition is different than != zero, as it doesn't hold for negative zero).
That would be the same as for instance the bitwise instructions which
also don't ha
FWIW, I think UCMP is a misleading name. Whatever the name will be, it
should be prefixed with "I" or "U", because it's not a floating-point
opcode. How about UCND? :D
Marek
On Thu, Apr 4, 2013 at 6:23 PM, Jose Fonseca wrote:
> There might be some value in renaming UCMP to be MOVC though. I t
FWIW it looks like we could use that opcode a bit more in glsl to tgsi
translation. There's one use of it in st_glsl_to_tgsi.cpp (though
coupled with a USNE which I'm not sure is even necessary) but another
place states that "If TGSI had a UCMP instruction or similar, this extra
instruction would n
There might be some value in renaming UCMP to be MOVC though. I think
everybody here can agree that UCMP, though semantically correct, is misleading.
Jose
- Original Message -
> Hah, yea, I'm sorry, that's a good point. So movc is a bitcast to unsigned
> followed by ucmp. Alright, I'm w
Hah, yea, I'm sorry, that's a good point. So movc is a bitcast to unsigned
followed by ucmp. Alright, I'm withdrawing the patch.
z
- Original Message -
>
>
> - Original Message -
> > > > Erm, unsigned < 0 doesn't make sense.
> > >
> > > Ah indeed!
> > >
> > > > Definitely wha
- Original Message -
> > > Erm, unsigned < 0 doesn't make sense.
> >
> > Ah indeed!
> >
> > > Definitely what the description says:
> > > static void
> > > micro_ucmp(union tgsi_exec_channel *dst,
> > > const union tgsi_exec_channel *src0,
> > > const union tgsi_ex
On 04.04.2013 17:23, Jose Fonseca wrote:
>
> - Original Message -
>> On 04.04.2013 17:01, Jose Fonseca wrote:
>>> - Original Message -
> On 04.04.2013 03:45, Zack Rusin wrote:
>> It's part of SM4 (http://goo.gl/4IpeK). It's also fairly
>> painful to emulate without branc
> > Erm, unsigned < 0 doesn't make sense.
>
> Ah indeed!
>
> > Definitely what the description says:
> > static void
> > micro_ucmp(union tgsi_exec_channel *dst,
> > const union tgsi_exec_channel *src0,
> > const union tgsi_exec_channel *src1,
> > const union tgsi
- Original Message -
> On 04.04.2013 17:01, Jose Fonseca wrote:
> >
> > - Original Message -
> >>> On 04.04.2013 03:45, Zack Rusin wrote:
> It's part of SM4 (http://goo.gl/4IpeK). It's also fairly
> painful to emulate without branching. Most hardware
> supports it n
On 04.04.2013 17:01, Jose Fonseca wrote:
>
> - Original Message -
>>> On 04.04.2013 03:45, Zack Rusin wrote:
It's part of SM4 (http://goo.gl/4IpeK). It's also fairly
painful to emulate without branching. Most hardware
supports it natively and even llvm has a 'select' opcode
>
On 04.04.2013 16:53, Zack Rusin wrote:
>> On 04.04.2013 03:45, Zack Rusin wrote:
>>> It's part of SM4 (http://goo.gl/4IpeK). It's also fairly
>>> painful to emulate without branching. Most hardware
>>> supports it natively and even llvm has a 'select' opcode
>>> which can handle it without too much
- Original Message -
> > On 04.04.2013 03:45, Zack Rusin wrote:
> > > It's part of SM4 (http://goo.gl/4IpeK). It's also fairly
> > > painful to emulate without branching. Most hardware
> > > supports it natively and even llvm has a 'select' opcode
> > > which can handle it without too muc
> On 04.04.2013 03:45, Zack Rusin wrote:
> > It's part of SM4 (http://goo.gl/4IpeK). It's also fairly
> > painful to emulate without branching. Most hardware
> > supports it natively and even llvm has a 'select' opcode
> > which can handle it without too much hassle.
> >
> > diff --git a/src/galliu
On 04.04.2013 03:45, Zack Rusin wrote:
> It's part of SM4 (http://goo.gl/4IpeK). It's also fairly
> painful to emulate without branching. Most hardware
> supports it natively and even llvm has a 'select' opcode
> which can handle it without too much hassle.
>
> diff --git a/src/gallium/docs/source/
It's part of SM4 (http://goo.gl/4IpeK). It's also fairly
painful to emulate without branching. Most hardware
supports it natively and even llvm has a 'select' opcode
which can handle it without too much hassle.
Signed-off-by: Zack Rusin
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c |
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