Re: [Mesa-dev] [PATCH] i965: Use align1 mode for TCS barrier messages.

2017-01-15 Thread Kenneth Graunke
On Sunday, January 15, 2017 12:19:36 PM PST Jordan Justen wrote: > Maybe you should drop 'TCS' from the subject? I think TCS is the > reason for the change, but it doesn't only affect TCS barrier > messages, right? Well, scalar TCS and CS are already in align1 mode, so even though this is common c

Re: [Mesa-dev] [PATCH] i965: Use align1 mode for TCS barrier messages.

2017-01-15 Thread Jordan Justen
Maybe you should drop 'TCS' from the subject? I think TCS is the reason for the change, but it doesn't only affect TCS barrier messages, right? On 2017-01-15 01:45:45, Kenneth Graunke wrote: > In commit 7428e6f86ab5 we switched the barrier SEND message's > destination type to UW to avoid problems

[Mesa-dev] [PATCH] i965: Use align1 mode for TCS barrier messages.

2017-01-15 Thread Kenneth Graunke
In commit 7428e6f86ab5 we switched the barrier SEND message's destination type to UW to avoid problems in SIMD16 compute shaders. Tessellation control shaders also use barriers, and in vec4 mode, we were emitting them in align16 mode. The simulator warns that only UD, D, F, and DF are valid desti