On Fri, Jul 14, 2017 at 6:36 PM, Ian Romanick wrote:
> On 07/14/2017 06:35 PM, Ian Romanick wrote:
>> On 07/14/2017 12:19 PM, Matt Turner wrote:
>>> All CPUs that can be paired with a GPU supported by i965_dri.so supports
>>> SSE3. This allows us to ensure that some vectorized version of the tiled
On 07/14/2017 06:35 PM, Ian Romanick wrote:
> On 07/14/2017 12:19 PM, Matt Turner wrote:
>> All CPUs that can be paired with a GPU supported by i965_dri.so supports
>> SSE3. This allows us to ensure that some vectorized version of the tiled
>> memcpy path is enabled on 32-bit systems.
>
> Yes. It
On 07/14/2017 12:19 PM, Matt Turner wrote:
> All CPUs that can be paired with a GPU supported by i965_dri.so supports
> SSE3. This allows us to ensure that some vectorized version of the tiled
> memcpy path is enabled on 32-bit systems.
Yes. It might be worth noting in the commit message that eve
On Friday, July 14, 2017 12:19:39 PM PDT Matt Turner wrote:
> All CPUs that can be paired with a GPU supported by i965_dri.so supports
> SSE3. This allows us to ensure that some vectorized version of the tiled
> memcpy path is enabled on 32-bit systems.
>
> This also ensures that __builtin_ia32_cl
All CPUs that can be paired with a GPU supported by i965_dri.so supports
SSE3. This allows us to ensure that some vectorized version of the tiled
memcpy path is enabled on 32-bit systems.
This also ensures that __builtin_ia32_clflush is always usable.
Bugzilla: https://bugs.freedesktop.org/show_b
