so yeah, I am a bit blind today as this was already handled in the
patch. Moving the SvSemantic check inside something like
isCS2RSV(SvSemantic) might make it simplier for future system values
to be used with cs2r, but not really required right now. In either
case: Reviewed-by: Karol Herbst
On Th
playing a bout around with nvdisasm, there seems to be some
complications with certain sched opcodes. I think we should figure out
if this is simply nvdisasm crashing or if this is a real hardware
thing.
On Tue, Jul 17, 2018 at 9:26 PM, Rhys Perry wrote:
> After some testing and looking at traces
After some testing and looking at traces of the blob or nvcc output,
it seems the only system value CS2R is useful for is SV_CLOCK.
On Tue, Jul 17, 2018 at 1:09 PM, Karol Herbst wrote:
> that seems like a good enough improvement. I think looking onto other
> sysvals would be worthwhile as SV_CLOC
that seems like a good enough improvement. I think looking onto other
sysvals would be worthwhile as SV_CLOCK isn't used that often. The
invocation ID and related ones would be interesting to look into as
they are much more common.
On Tue, Jul 17, 2018 at 1:59 PM, Rhys Perry wrote:
> I'm getting
I'm getting ~28 cycles for the S2R and ~6 cycles (unsurprisingly) for the CS2R.
nvcc with SM30 seems to use the same instruction as the nvc0 emission code.
The SV_LANE* system values don't work with CS2R and I haven't looked
too deeply into the others.
On Tue, Jul 17, 2018 at 12:13 PM, Karol Her
interesting, do you have some numbers on that? Wondering if we could
switch more sysvals over to it and what about older gens?
On Tue, Jul 17, 2018 at 12:46 PM, Rhys Perry wrote:
> This instruction seems to be faster than S2R and requires no barrier,
> though the range of special registers it can
This instruction seems to be faster than S2R and requires no barrier,
though the range of special registers it can read from is limited.
Signed-off-by: Rhys Perry
---
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 14 +-
.../drivers/nouveau/codegen/nv50_ir_target_gm107.
