> trouble digging what was the reason for this?
> >
> > I'm not sure either. Daniel said it was a mistake.
> >
> > Adding the 63bd2ae7452d4 folks to the discussion. Ben, do you remember
> > the details?
>
> We decided to remove it since we decided that
t have any details on how it operates.
Syncpoints are only available on Tegra HW as far as I know, and are
used to implement some android synchronization method. We don't use
them, nor do I know any of their details off the top of my head.
The NVGPU driver source appears to indicate it makes
On 18-03-31 12:00:16, Chris Wilson wrote:
Quoting Kenneth Graunke (2018-03-30 19:20:57)
On Friday, March 30, 2018 7:40:13 AM PDT Chris Wilson wrote:
> For i915, we are proposing to use a quality-of-service parameter in
> addition to that of just a priority that usurps everyone. Due to our HW,
>
On 18-02-20 09:15:01, Antognolli, Rafael wrote:
On Tue, Feb 20, 2018 at 08:11:14AM -0800, Rafael Antognolli wrote:
On Fri, Feb 16, 2018 at 06:37:55PM -0800, Ben Widawsky wrote:
> On 18-02-16 13:44:00, Antognolli, Rafael wrote:
> > "This field controls the granularity of the re
antage of finer granularity
when preemption is available.
Does the kernel actually disable it? I thought the kernel just doesn't touch it
(I don't think it's whitelisted by the kernel either, it's just writable).
Signed-off-by: Rafael Antognolli
Cc: Ben Widawsky
---
This p
On 17-12-18 15:23:11, Antognolli, Rafael wrote:
We still have gpu hangs on Cannonlake when using push constants, so
disable them for now until we have a proper fix for these hangs.
v2: Add warning message when creating context too.
Signed-off-by: Rafael Antognolli
Cc: Ben Widawsky
Cc
Power8, Power8NV, and Power9 are supported on an equal footing
with X86.
Cc: "17.2" "17.3"
Signed-off-by: Ben Crocker
---
docs/llvmpipe.html | 20
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/docs/llvmpipe.html b/docs/llvmpipe.h
Language and spelling fixups in three places.
Cc: "17.2" "17.3"
Signed-off-by: Ben Crocker
---
docs/llvmpipe.html | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/docs/llvmpipe.html b/docs/llvmpipe.html
index 5f93c0b807..a36a31ece3 100644
---
IBM PPC64LE (Power8, Power8NV, and Power9) are supported on an equal
footing with X86.
Ben Crocker (2):
docs/llvmpipe.html: Add ppc64le as alternative architecture to x86.
docs/llvmpipe.html: Minor edits
docs/llvmpipe.html | 30 +-
1 file changed, 21 insertions
Cc: "17.2"
Signed-off-by: Ben Crocker
---
src/gallium/README.portability | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/README.portability b/src/gallium/README.portability
index cf6cc36afb..cdc02bb36d 100644
--- a/src/gallium/README.portability
- Original Message -
> From: "Nicolai Hähnle"
> To: "Ben Crocker" , mesa-dev@lists.freedesktop.org
> Cc: "Emil Velikov" , "17.2"
>
> Sent: Monday, October 2, 2017 5:40:31 AM
> Subject: Re: [Mesa-dev] [PATCH 2/4] gallivm:
In init_native_targets, allow the passing of additional options to
the LLC compiler via new GALLIVM_LLC_OPTIONS environmental control.
This option is available only #ifdef DEBUG, initially.
At top, add #include for LLVMParseCommandLineOptions()
declaration.
Cc: "17.2"
Signed-o
In gallivm_compile_module, fix a typo in the
debug_printf("Invoke as \"llc ..." message.
Cc: "17.2"
Signed-off-by: Ben Crocker
---
src/gallium/auxiliary/gallivm/lp_bld_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/gal
: ext_transform_feedback-max-varyings.
All changes tested via Piglit.
Cc: "17.2"
Signed-off-by: Ben Crocker
---
src/gallium/auxiliary/gallivm/lp_bld_misc.cpp | 37 ++-
1 file changed, 30 insertions(+), 7 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
b/s
generation is initially
available only #ifdef DEBUG.
Cc: "17.2"
Signed-off-by: Ben Crocker
---
src/gallium/auxiliary/util/u_cpu_detect.c | 32 +++
1 file changed, 24 insertions(+), 8 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_cpu_detect.c
b/s
Advance the minimum LLVM version for VSX code generation to 4.0.
New environmental controls:
GALLIVM_LLC_OPTIONS
GALLIVM_MATTRS
GALLIVM_VSX 0/1, default=1
GALLIVM_ALTIVEC 0/1, default=1
Ben Crocker (4):
gallivm: fix typo in debug_printf message
gallivm: allow additional
On 17-08-24 14:16:39, kevin.rogo...@intel.com wrote:
From: Kevin Rogovin
Special thanks to Eero Tamminen for reporting rasterizer
numbers being twice what it should be for 2xMSAA under
a benchmark.
Signed-off-by: Kevin Rogovin
---
src/mesa/drivers/dri/i965/intel_screen.c | 14 +++---
1
On 17-08-24 11:01:34, Matt Turner wrote:
Reviewed-by: Matt Turner
I'm blaming this one on someone else's rebase ;-)
Reviewed-by: Ben Widawsky
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailma
Sorry, please ignore this patch in favor of the sequence emailed
later today (23 Aug 2017).
-- Ben
- Original Message -
From: "Ben Crocker"
To: mesa-dev@lists.freedesktop.org
Cc: "17.2 17.1" , "Dave Airlie"
, "Ben Crocker"
Sent: Wednesday, A
s observed by Ray:
- draw-vertices
- draw-vertices-half-float
- draw-vertices-half-float_gles2
One regression remains:
- draw-vertices-2101010
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100613
Cc: "17.2" "17.1"
Signed-off-by: Ben Crocker
---
src/gallium/auxiliar
From: Ray Strode
lp_build_fetch_rgba_soa fetches a texel from a texture.
Part of that process involves first gathering the element
together from memory into a packed format, and then breaking
out the individual color channels into separate, parallel
arrays.
The code fails to account for endianes
The following patches, on top of Roland Scheidegger's commit
e827d9175675aaa6cfc0b981e2a80685fb7b3a74, reduce pre-Roland
Piglit failures from ~4000 to ~2000 on big-endian architectures
(PPC64, S390x).
Ben Crocker (1):
llvmpipe: lp_build_gather_elem_vec BE fix for 3x16 load
Ray Stro
s observed by Ray:
- draw-vertices
- draw-vertices-half-float
- draw-vertices-half-float_gles2
One regression remains:
- draw-vertices-2101010
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100613
Cc: "17.2" "17.1"
Signed-off-by: Ben Crocker
---
src/gallium/auxiliar
On 17-08-16 13:26:00, Jason Ekstrand wrote:
For non-CCS images, we were reporting just one plane even though they
may have multiple in the case of YUV.
Cc:
This has been wrong since it's initial implementation in 2014, ie. not stable
material IMO..
Reviewed-by: Ben Widawsky
---
src
_LINEAR 0
-#endif
-
static const __DRIconfigOptionsExtension brw_config_options = {
.base = { __DRI_CONFIG_OPTIONS, 1 },
.xml =
Both are:
Reviewed-by: Ben Widawsky
--
Ben Widawsky, Intel Open Source Technology Center
___
mesa-dev mailing list
mesa
On 17-07-07 09:28:08, Jason Ekstrand wrote:
On Thu, Jul 6, 2017 at 4:27 PM, Ben Widawsky wrote:
We don't yet have optimal MOCS settings, but we have enough to know how
to at least determine when we might have non-optimal settings within our
driver.
Signed-off-by: Ben Widawsky
---
src/
On 17-07-07 09:23:26, Jason Ekstrand wrote:
On Fri, Jul 7, 2017 at 3:34 AM, Chris Wilson
wrote:
Quoting Ben Widawsky (2017-07-07 00:27:01)
> drivers/gpu/drm/i915/i915_drv.c | 3 +++
> drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c | 13 +
>
On 17-07-07 11:34:48, Chris Wilson wrote:
Quoting Ben Widawsky (2017-07-07 00:27:01)
drivers/gpu/drm/i915/i915_drv.c | 3 +++
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c | 13 +
include/uapi/drm/i915_drm.h | 8
4 files changed, 22
mmit c9b0481bce24af032386701de0266eb5bc24e988
Author: Ben Widawsky
Date: Fri Apr 8 10:21:16 2016 -0700
i965: Use PTE mocs
Signed-off-by: Ben Widawsky
diff --git a/src/mesa/drivers/dri/i965/brw_mocs.c
b/src/mesa/drivers/dri/i965/brw_mocs.c
index 5df154eb86..b7bfdab671 100644
--- a/s
Signed-off-by: Ben Widawsky
---
src/intel/drm/i915_drm.h | 8
1 file changed, 8 insertions(+)
diff --git a/src/intel/drm/i915_drm.h b/src/intel/drm/i915_drm.h
index c26bf7c125..69e38ce89f 100644
--- a/src/intel/drm/i915_drm.h
+++ b/src/intel/drm/i915_drm.h
@@ -431,6 +431,14 @@ typedef
We don't yet have optimal MOCS settings, but we have enough to know how
to at least determine when we might have non-optimal settings within our
driver.
Signed-off-by: Ben Widawsky
---
src/intel/vulkan/anv_device.c | 12
src/intel/vulkan/anv_private.h
From: Ben Widawsky
Starting with GEN9, Memory Object Control State (MOCS) becomes an index
into a table as opposed to the direct programming within the command.
The table has 62 usable entries (ie 6 bits can represent all settings),
and each buffer type may use one of these 62 entries to
Hi Emil et al.,
- Original Message -
> From: "Emil Velikov"
> To: "Ben Crocker"
> Cc: "ML mesa-dev" , "Eric Engestrom"
>
> Sent: Thursday, June 22, 2017 11:11:32 AM
> Subject: Re: [PATCH] egl_dri2: swrastGetDrawableInfo:
rface and then glclear"
(/bin/egl-create-pbuffer-surface -auto)
that occurred intermittently, e.g. when the uninitialized x and y in
drisw_update_tex_buffer just happened to contain absurd non-zero values.
Signed-off-by: Ben Crocker
---
src/egl/drivers/dri2/platform_x11.c | 4 +++-
1 file
rface and then glclear"
(/bin/egl-create-pbuffer-surface -auto)
that occurred intermittently, e.g. when the uninitialized x and y in
drisw_update_tex_buffer just happened to contain absurd non-zero values.
Signed-off-by: Ben Crocker
---
src/egl/drivers/dri2/platform_x11.c | 2 ++
1 file
Lost track of this. People interested?
On 17-04-24 12:09:49, Emil Velikov wrote:
On 24 April 2017 at 11:56, Tapani Pälli wrote:
On 04/24/2017 01:52 PM, Emil Velikov wrote:
Hi Ben,
Just realised that the CrOS team might be interested in this as well -
adding Tomasz.
On 21 April 2017 at
Implement assembly language API acceleration for PPC64LE,
analogous to long-standing implementations for X86 and X86-64.
See also similar implementation in libglvnd.
Tested with Piglit.
Signed-off-by: Ben Crocker
---
configure.ac | 12 +++
src/mapi/Makefile.sources| 2
Signed-off-by: Ben Crocker
---
configure.ac | 12 +++
src/mapi/Makefile.sources| 3 +
src/mapi/entry.c | 12 ++-
src/mapi/entry_ppc64le_tls.h | 150 +++
src/mapi/entry_ppc64le_tsd.h | 208
On 17-05-10 23:15:29, Varad Gautam wrote:
From: Ben Widawsky
Modifiers will be obtained or guessed by the client and passed in during
image creation/import.
As of this patch, the modifiers aren't plumbed all the way down, this
patch simply makes sure the interface level stuff is correc
On 17-05-02 11:51:28, Francisco Jerez wrote:
Anuj Phogat writes:
On Mon, Apr 24, 2017 at 9:15 PM, Ben Widawsky wrote:
On 17-04-18 18:18:39, Francisco Jerez wrote:
Most, if not all of the unrelated changes that snuck in were due to rebase.
Anuj, would you mind fixing those? I tried my best
the 3.9 block, I
had reordered the last entry up and it was missing its comma. So much
for "cosmetic" changes being trivial and obvious :) .
Also, sorry also for the email address mixup here; it seems that git
send-email does not trigger my MTA's rel
Fix kmscube -A on i915 :P
On 17-04-28 14:17:34, Rob Clark wrote:
I guess this applies on top of one of Ben's in-flight patches?
Perhaps it can be squashed into that? (Otherwise remind me about this
when the modifiers patchset is merged)
BR,
-R
On Fri, Apr 28, 2017 at 12:18 PM, Lucas Stach wr
LLVMDemangle, LLVMGlobalISel, and LLVMDebugInfoMSF are new.
Also update the comment to add irreader to the list of components.
CC:
Reviewed-by: Chuck Atkins
Signed-off-by: Ben Boeckel
---
scons/llvm.py | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git
LLVMDemangle, LLVMGlobalISel, and LLVMDebugInfoMSF are new.
Also update the comment to add irreader to the list of components.
CC:
Reviewed-by: Chuck Atkins
Signed-off-by: Ben Boeckel
---
scons/llvm.py | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git
On 17-04-25 14:53:46, Anuj Phogat wrote:
On Mon, Apr 24, 2017 at 10:57 PM, Ben Widawsky wrote:
On 17-04-15 18:27:33, Jason Ekstrand wrote:
On April 14, 2017 5:37:55 PM Anuj Phogat wrote:
From: Ben Widawsky
This support was removed on gen9 (it worked before then) and was brought
back
On 17-04-15 18:27:33, Jason Ekstrand wrote:
On April 14, 2017 5:37:55 PM Anuj Phogat wrote:
From: Ben Widawsky
This support was removed on gen9 (it worked before then) and was brought back
for gen10.
Signed-off-by: Ben Widawsky
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +-
1
From: Ben Widawsky
V2: Squash the changes in one patch and rebased on master (Anuj).
Signed-off-by: Ben Widawsky
Signed-off-by: Anuj Phogat
---
src/intel/common/gen_l3_config.c | 43 ++--
1 file changed, 37 insertions(+), 6 deletions(-)
diff --git a/src/
t;Otherwise" is certainly not okay, but I like this. Feel free to nak of course.
Acked-by: Ben Widawsky
On April 24, 2017 6:16:14 PM Emil Velikov wrote:
From: Emil Velikov
To ease patch submission process a tiny bit.
Cc: Ben Widawsky
Suggested-by: Ben Widawsky
Signed-off-by: Emil Vel
Could do smarter stuff with the mappings. I decided not to.
Tested with kmscube. No current clients seem to use non-zero x0, y0, so
that's untested.
Cc: Tapani Pälli (AndroidIA?)
Cc: Emil Velikov
Signed-off-by: Ben Widawsky
---
src/mesa/drivers/dri/i965/intel_screen.c
---
configure.ac | 16
1 file changed, 16 insertions(+)
diff --git a/configure.ac b/configure.ac
index aa0ef36..33167e4 100644
--- a/configure.ac
+++ b/configure.ac
@@ -49,5 +49,21 @@ if test "x$HAVE_GST" = "xyes"; then
fi
AM_CONDITIONAL(ENABLE_GST, [test "x$HAVE_GST" = "xyes"]
Note: nothing happens here yet since LINEAR == 0.
---
configure.ac | 2 +-
drm-common.c | 37 +
2 files changed, 34 insertions(+), 5 deletions(-)
diff --git a/configure.ac b/configure.ac
index 33167e4..f564ef3 100644
--- a/configure.ac
+++ b/configure.ac
@@ -3
---
common.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/common.c b/common.c
index 4bf3c5a..e63bb39 100644
--- a/common.c
+++ b/common.c
@@ -31,10 +31,23 @@
static struct gbm gbm;
+#ifndef DRM_FORMAT_MOD_LINEAR
+#define DRM_FORMAT_MOD_LINEAR 0
+#endif
+static int
---
common.c | 13 -
common.h | 11 ++-
kmscube.c | 14 +++---
3 files changed, 29 insertions(+), 9 deletions(-)
diff --git a/common.c b/common.c
index e63bb39..eaaa9a4 100644
--- a/common.c
+++ b/common.c
@@ -31,9 +31,6 @@
static struct gbm gbm;
-#ifndef DRM_FO
---
common.h | 4
1 file changed, 4 insertions(+)
diff --git a/common.h b/common.h
index 2eceac7..f3d9d32 100644
--- a/common.h
+++ b/common.h
@@ -32,6 +32,10 @@
#include
#include
+#ifdef HAVE_CONFIG_H
+ #include "config.h"
+#endif
+
#ifndef EGL_KHR_platform_gbm
#define EGL_KHR_plat
This is helpful for debugging as you will bail early with an error
message instead of a random SIGSEGV (or something more obscure).
---
drm-atomic.c | 9 +
drm-legacy.c | 8
2 files changed, 17 insertions(+)
diff --git a/drm-atomic.c b/drm-atomic.c
index 27c6b1e..c06e52f 100644
-
gl_api api,
unsigned minor_version,
uint32_t flags,
bool notify_reset,
+ unsigned priority,
unsigned *error,
void *sharedContextPrivate)
{
LGTM on i965 (i915) and dri bits.
Acked-by: Ben Widawsky
--
Be
_LOW_BIT;
+ break;
+default:
+ bit = -1;
+ break;
+ }
unreachable()?
Either way:
Reviewed-by: Ben Widawsky
+
+if (bit < 0 ||
+!(dpy->Extensions.IMG_context_priority & (1 << bi
The API/entry point in mesa already checks the correct behavior,
however, it's possible to be handled by another implementation and those
implementations should not be able to abuse a weird combination of count
and pointer.
This fixes CID 1403193
Cc: Mark Janes
Signed-off-by: Ben Wid
On 17-04-06 20:12:35, Chris Wilson wrote:
IMG_context_priority
https://www.khronos.org/registry/egl/extensions/IMG/EGL_IMG_context_priority.txt
"This extension allows an EGLContext to be created with a priority
hint. It is possible that an implementation will not honour the
hint, especi
ation logic.
Does the Scons build require these tools, or would it be possible to get
it to instead use the pre-generated source files instead?
Thanks,
--Ben
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/ma
On 17-03-23 14:02:13, Daniel Stone wrote:
Hi Ben,
On 24 January 2017 at 06:21, Ben Widawsky wrote:
@@ -1018,9 +1018,18 @@ intel_from_planar(__DRIimage *parent, int plane, void
*loaderPrivate)
int width, height, offset, stride, dri_format, index;
struct intel_image_format *f
of
identifying no modifiers found (because 0 is LINEAR) (Jason)
v4: Remove the logic to prune unknown modifiers (like those from other
vendors) and simply handle is in select_best_modifier (Jason)
Requested-by: Jason Ekstrand
Signed-off-by: Ben Widawsky
Reviewed-by: Jason Ekstrand
---
src/mesa
On 17-03-21 14:15:05, Jason Ekstrand wrote:
On Tue, Mar 21, 2017 at 2:09 PM, Ben Widawsky wrote:
At image creation create a path for dealing with the linear modifier.
This works exactly like the old usage flags where __DRI_IMAGE_USE_LINEAR
was specified.
During development of this patch
89.10 MiB/s
Similar functionality was introduced and then reverted here:
commit 6a0d036483caf87d43ebe2edd1905873446c9589
Author: Ben Widawsky
Date: Thu Apr 21 20:14:58 2016 -0700
i965: Always use Y-tiled buffers on SKL+
v2: Use last set bit instead of first set bit in modifiers to address
bug found
of
identifying no modifiers found (because 0 is LINEAR) (Jason)
Requested-by: Jason Ekstrand
Signed-off-by: Ben Widawsky
Reviewed-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/intel_screen.c | 56 +---
1 file changed, 45 insertions(+), 11 deletions(-)
diff --git a
On 17-03-21 13:52:12, Jason Ekstrand wrote:
On Tue, Mar 21, 2017 at 1:45 PM, Ben Widawsky wrote:
This patch begins introducing how we'll actually handle the potentially
many modifiers coming in from the API, how we'll store them, and the
structure in the code to support it.
Pri
On 17-03-21 13:48:13, Jason Ekstrand wrote:
On Tue, Mar 21, 2017 at 1:45 PM, Ben Widawsky wrote:
At image creation create a path for dealing with the linear modifier.
This works exactly like the old usage flags where __DRI_IMAGE_USE_LINEAR
was specified.
During development of this patch
89.10 MiB/s
Similar functionality was introduced and then reverted here:
commit 6a0d036483caf87d43ebe2edd1905873446c9589
Author: Ben Widawsky
Date: Thu Apr 21 20:14:58 2016 -0700
i965: Always use Y-tiled buffers on SKL+
v2: Use last set bit instead of first set bit in modifiers to address
bug found
øgsberg
Signed-off-by: Ben Widawsky
Acked-by: Daniel Stone
Reviewed-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/intel_screen.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src/mesa/drivers/dri/i965/intel_screen.c
index 8bb3aca
All the plumbing is in place so the extension just needs to be
advertised.
Signed-off-by: Ben Widawsky
Reviewed-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/intel_screen.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src
. As a
result, 0 was repurposed to mean a modifier for a LINEAR layout.
NOTE: This patch was added for v3 of the patch series.
v2: Rework the algorithm for modifier selection to go from a bitmask
based selection to this priority value.
Requested-by: Jason Ekstrand
Signed-off-by: Ben Widawsky
surface (ie. stupid clients could be broken before
this patch, but in more ways than this).
Obviously, there are no modifiers being actually stored yet - so this
patch shouldn't do anything other than allow the API to get back 0 (or
the LINEAR modifier).
Signed-off-by: Ben Widawsky
Review
I intend to need to get to the devinfo structure, and storing the screen
is an easy way to do that.
It seems to be the consensus that you cannot share an image between
multiple screens.
Scape-goat: Rob Clark
Signed-off-by: Ben Widawsky
Reviewed-by: Eric Engestrom
Acked-by: Daniel Stone
Signed-off-by: Ben Widawsky
---
src/mesa/drivers/dri/i965/intel_screen.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src/mesa/drivers/dri/i965/intel_screen.c
index af9c9a45f3..b77933e100 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
Signed-off-by: Ben Widawsky
---
src/gbm/backends/dri/gbm_dri.c | 28
1 file changed, 28 insertions(+)
diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c
index a7ac149365..283a73454e 100644
--- a/src/gbm/backends/dri/gbm_dri.c
+++ b/src/gbm
before, Y-tiled (as well as X, and linear) modifier can be used for DRI
images at the end of this patch series in i965.
Jason has reviewed most of this already, but since I added a few patches I
thought it was necessary to resend the whole thing.
Ben Widawsky (8):
i965/dri: Disallow image with
On 17-03-21 08:07:22, Jason Ekstrand wrote:
On Tue, Mar 21, 2017 at 8:04 AM, Jason Ekstrand
wrote:
On Mon, Mar 20, 2017 at 8:35 PM, Ben Widawsky wrote:
This patch begins introducing how we'll actually handle the potentially
many modifiers coming in from the API, how we'll store
st X
tiled.
Cc: Kristian Høgsberg
Signed-off-by: Ben Widawsky
Acked-by: Daniel Stone
---
src/mesa/drivers/dri/i965/intel_screen.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src/mesa/drivers/dri/i965/intel_screen.c
index e4f858ed33..9d458c70
imilar functionality was introduced and then reverted here:
commit 6a0d036483caf87d43ebe2edd1905873446c9589
Author: Ben Widawsky
Date: Thu Apr 21 20:14:58 2016 -0700
i965: Always use Y-tiled buffers on SKL+
v2: Use last set bit instead of first set bit in modifiers to address
bug found
surface (ie. stupid clients could be broken before
this patch, but in more ways than this).
Obviously, there are no modifiers being actually stored yet - so this
patch shouldn't do anything other than allow the API to get back 0 (or
the LINEAR modifier).
Signed-off-by: Ben Widawsky
---
src
. As a
result, 0 was repurposed to mean a modifier for a LINEAR layout.
NOTE: This patch was added for v3 of the patch series.
v2: Rework the algorithm for modifier selection to go from a bitmask
based selection to this priority value.
Requested-by: Jason Ekstrand
Signed-off-by: Ben Widawsky
surface (ie. stupid clients could be broken before
this patch, but in more ways than this).
Obviously, there are no modifiers being actually stored yet - so this
patch shouldn't do anything other than allow the API to get back 0 (or
the LINEAR modifier).
Signed-off-by: Ben Widawsky
---
src
On 17-03-20 16:21:53, Jason Ekstrand wrote:
On Mon, Mar 20, 2017 at 4:15 PM, Ben Widawsky wrote:
On 17-03-20 12:03:24, Jason Ekstrand wrote:
My only question here is whether or not we want to add a "supported
modifiers" query to DRIimage before we bump the version number. It'
ind me what the reasoning is for support modifiers? I thought we agreed to
just use GET_PLANE2? Supported modifiers is difficult because mesa has no idea
of per plane constraints.
On Sat, Mar 18, 2017 at 1:00 PM, Ben Widawsky wrote:
All the plumbing is in place so the extension just needs to be
adve
On 17-03-20 15:36:37, Jason Ekstrand wrote:
On Mon, Mar 20, 2017 at 3:25 PM, Ben Widawsky wrote:
On 17-03-20 12:00:44, Jason Ekstrand wrote:
On Fri, Mar 17, 2017 at 5:34 PM, Ben Widawsky wrote:
This patch begins introducing how we'll actually handle the potentially
many modifiers c
On 17-03-20 12:00:44, Jason Ekstrand wrote:
On Fri, Mar 17, 2017 at 5:34 PM, Ben Widawsky wrote:
This patch begins introducing how we'll actually handle the potentially
many modifiers coming in from the API, how we'll store them, and the
structure in the code to support it.
Pri
All the plumbing is in place so the extension just needs to be
advertised.
Signed-off-by: Ben Widawsky
---
src/mesa/drivers/dri/i965/intel_screen.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/src/mesa/drivers/dri/i965
I intend to need to get to the devinfo structure, and storing the screen
is an easy way to do that.
It seems to be the consensus that you cannot share an image between
multiple screens.
Scape-goat: Rob Clark
Signed-off-by: Ben Widawsky
Reviewed-by: Eric Engestrom
Acked-by: Daniel Stone
st X
tiled.
v2: priority lits was in reverse order.
Cc: Kristian Høgsberg
Signed-off-by: Ben Widawsky
Acked-by: Daniel Stone
---
src/mesa/drivers/dri/i965/intel_screen.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
b/s
. As a
result, 0 was repurposed to mean a modifier for a LINEAR layout.
NOTE: This patch was added for v3 of the patch series.
References: https://patchwork.kernel.org/patch/9419157/
Signed-off-by: Ben Widawsky
---
src/mesa/drivers/dri/i965/intel_screen.c | 35
1
2 MiB
Reads: .8 MiB
Similar functionality was introduced and then reverted here:
commit 6a0d036483caf87d43ebe2edd1905873446c9589
Author: Ben Widawsky
Date: Thu Apr 21 20:14:58 2016 -0700
i965: Always use Y-tiled buffers on SKL+
v2: Use last set bit instead of first set bit in modifiers to
modesetting driver, and Weston (and other GBM clients) to use Y tiled
scanout buffers on gen9+.
Ben Widawsky (5):
i965/dri: Store the screen associated with the image
i965: Enable modifier queries
i965: Handle the linear fb modifier
i965: Handle Y-tiled modifier
i965: Handle X-tiled
surface (ie. stupid clients could be broken before
this patch, but in more ways than this).
Obviously, there are no modifiers being actually stored yet - so this
patch shouldn't do anything other than allow the API to get back 0 (or
the LINEAR modifier).
Signed-off-by: Ben Widawsky
---
src
istian Høgsberg
References (v4):
https://lists.freedesktop.org/archives/intel-gfx/2017-January/116636.html
Signed-off-by: Ben Widawsky
Reviewed-by: Eric Engestrom (v1)
Reviewed-by: Jason Ekstrand
Acked-by: Daniel Stone
---
src/gbm/backends/dri/gbm_dri.c | 63 --
src/gbm/gbm-
On 17-03-14 13:31:01, Ben Widawsky wrote:
On 17-03-14 08:53:45, Jason Ekstrand wrote:
On Mon, Mar 13, 2017 at 10:24 PM, Ben Widawsky wrote:
The idea behind modifiers like this is that the user of GBM will have
some mechanism to query what properties the hardware supports for its BO
or
On 17-03-14 08:53:45, Jason Ekstrand wrote:
On Mon, Mar 13, 2017 at 10:24 PM, Ben Widawsky wrote:
The idea behind modifiers like this is that the user of GBM will have
some mechanism to query what properties the hardware supports for its BO
or surface. This information is directly passed in
Split into a separate patch from the previous patch as requested by
Emil.
Requeted-by: Emil Velikov
Signed-off-by: Ben Widawsky
---
src/egl/drivers/dri2/platform_drm.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/src/egl/drivers/dri2/platform_drm.c
patch simply makes sure the interface level stuff is correct.
v2: Don't allow usage + modifiers
v3: Make NAND actually NAND. Bug introduced in v2. (Jason)
v4:
- s/obtains/obtained (Jason)
- Pull out i965 imlemnentation into a later patch (Emil)
Cc: Jason Ekstrand
Cc: Emil Velikov
Signed-o
This is just a stub for now and will be filled in later.
This was split out of an earlier patch
Requested-by: Emil Velikov
Signed-off-by: Ben Widawsky
---
src/mesa/drivers/dri/i965/intel_screen.c | 38
1 file changed, 34 insertions(+), 4 deletions(-)
diff
t bother with storing modifiers for gbm_bo_create because that's
a synchronous operation and we can actually select the correct modifier
at create time (done in a later patch) (Jason)
Cc: Kristian Høgsberg
Cc: Jason Ekstrand
References (v4):
https://lists.freedesktop.org/archives/intel-gfx/201
1 - 100 of 1128 matches
Mail list logo
