[Mesa-dev] Request for developer access for Tony Wasserka

Hi, I would like to request developer access for our new team member, Tony Wasserka. He has proven himself capable with a number of MRs and works actively on the ACO backend. His gitlab nick is neobrain. Thanks in advance, Daniel ___ mesa-dev ma

Re: [Mesa-dev] nir: find_msb vs clz

W.r.t AMD hardware, it seems to map quite exactly the DX behavior, so given that I would, of course favor a NIR instruction which maps that :) Small overview (scalar and vector): S_FLBIT_I32_{B32,B64} - D = the number of zeros before the first one starting from the MSB.Returns -1 if none. S_FLBI

[Mesa-dev] include faster c++ hash map

Hi, I would like to know if it would be possible to make mesa (at least RADV and maybe later radeonSI) depending on robin-map-dev (https://github.com/Tessil/robin-map) which seems to be part of some distros, and otherwise could be just copied into mesa. And if we could alternatively get a depend

Re: [Mesa-dev] mesa 20.0.0-devel fails to build

The repository of mesa-aco-git is https://github.com/daniel-schuermann/mesa . In case, this issue cannot be reproduced upstream, please open a bug request there. Otherwise, I'd appreciate if you could open a bug report at the upstream gitlab. (Although, I highly doubt it is an issue in mesa, but

Re: [Mesa-dev] [PATCH 2/3] android: compiler/nir: build nir_divergence_analysis.c

I don't know enough about build systems to review the last one, but this is also Reviewed-by: Daniel Schürmann On 22.09.19 14:05, mesa-dev-requ...@lists.freedesktop.org wrote: Date: Sun, 22 Sep 2019 12:00:25 +0200 From: Mauro Rossi To:mesa-dev@lists.freedesktop.org Cc:dan...@schuerman

Re: [Mesa-dev] [PATCH 1/3] android: aco: fix undefined template 'std::__1::array' build errors

Please use the Gitlab MR feature for future ACO patches. That said, thx for the fix! Reviewed-by: Daniel Schürmann On 22.09.19 14:38, mesa-dev-requ...@lists.freedesktop.org wrote: Date: Sun, 22 Sep 2019 12:00:24 +0200 From: Mauro Rossi To:mesa-dev@lists.freedesktop.org Cc:dan

[Mesa-dev] [RFC] ACO: A New Compiler Backend for RADV

() with nir_opt_sink():  https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1241 We welcome any testing feedback and bug reports at  https://github.com/daniel-schuermann/mesa/issues Thanks, Daniel Schürmann Rhys Perry Bas Nieuwenhuizen ___ mesa-dev mailing list mesa-d

Re: [Mesa-dev] [PATCH v3 4/7] nir: Add a pass for lowering integer division by constants

Hi Jason, thx for doing this pass, I was about to do the same (then we'd have 3 :P). I'm not completely sure, but it looks like you're implementation is based on "Division by Invariant Integers using Multiplication" from T. Granlund and P. L. Montgomery? I think, it should be mentioned then. A

Re: [Mesa-dev] [PATCH] nir: Divergence Analysis

hanks! Daniel On 25.10.18 20:29, Ian Romanick wrote: I'm going to try to review this more thoroughly for content later. For now, I'm going to send a bunch of notes about formatting / Mesa coding conventions. On 10/08/2018 04:04 AM, Daniel Schürmann wrote: --- src/compiler/

[Mesa-dev] [PATCH] nir: Divergence Analysis

--- src/compiler/nir/meson.build | 1 + src/compiler/nir/nir.h | 2 + src/compiler/nir/nir_divergence_analysis.c | 333 + 3 files changed, 336 insertions(+) create mode 100644 src/compiler/nir/nir_divergence_analysis.c diff --git a/src/co

[Mesa-dev] [RFC] nir: Divergence Analysis

This is an RFC for a Divergence Analysis for NIR. The algorithm implements "The Simple Divergence Analysis" from Diogo Sampaio, Rafael De Souza, Sylvain Collange, Fernando Magno Quintão Pereira. Divergence Analysis. The proposed pass computes for each ssa definition if it is uniform. That is, t

[Mesa-dev] [PATCH 4/8] ac: add support for 16bit buffer loads

Signed-off-by: Daniel Schürmann --- src/amd/common/ac_nir_to_llvm.c | 96 ++--- 1 file changed, 53 insertions(+), 43 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index d7a52a536c..770a025c82 100644 --- a/src/amd/common

[Mesa-dev] [PATCH 8/8] radv: enable VK_KHR_16bit_storage extension / 16bit storage features

Signed-off-by: Daniel Schürmann --- src/amd/vulkan/radv_device.c | 10 ++ src/amd/vulkan/radv_extensions.py | 1 + src/amd/vulkan/radv_shader.c | 1 + 3 files changed, 8 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c

[Mesa-dev] [PATCH 6/8] radv: add support for 16bit input/output

Signed-off-by: Daniel Schürmann --- src/amd/common/ac_nir_to_llvm.c | 8 ++- src/amd/vulkan/radv_nir_to_llvm.c | 90 +-- 2 files changed, 80 insertions(+), 18 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index

[Mesa-dev] [PATCH 2/8] ac: add support for 16bit ssbo stores

Signed-off-by: Daniel Schürmann --- src/amd/common/ac_nir_to_llvm.c | 144 +++- 1 file changed, 84 insertions(+), 60 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index f46744e8ca..43a0b86420 100644 --- a/src/amd/common

[Mesa-dev] [PATCH 3/8] ac: add support for 16bit UBO loads

Signed-off-by: Daniel Schürmann --- src/amd/common/ac_llvm_build.c | 25 + src/amd/common/ac_llvm_build.h | 8 src/amd/common/ac_nir_to_llvm.c | 21 ++--- 3 files changed, 51 insertions(+), 3 deletions(-) diff --git a/src/amd/common

[Mesa-dev] [PATCH 7/8] ac: add support for 16bit load_push_constant

Signed-off-by: Daniel Schürmann --- src/amd/common/ac_nir_to_llvm.c | 20 1 file changed, 20 insertions(+) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index babcb9de44..598e129aad 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd

[Mesa-dev] [PATCH 1/8] ac: add 16bit conversion operations

Signed-off-by: Daniel Schürmann --- src/amd/common/ac_llvm_build.c | 13 - src/amd/common/ac_nir_to_llvm.c | 27 +++ 2 files changed, 31 insertions(+), 9 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index

[Mesa-dev] [PATCH 5/8] nir: add 16bit type information to glsl types

Signed-off-by: Daniel Schürmann --- src/compiler/glsl_types.h | 15 +++ src/compiler/nir_types.cpp | 12 src/compiler/nir_types.h | 1 + 3 files changed, 28 insertions(+) diff --git a/src/compiler/glsl_types.h b/src/compiler/glsl_types.h index efc6324865..8cc8177f2d

[Mesa-dev] VK_KHR_16bit_storage extension / 16bit storage features

This series implements and enables the VK_KHR_16bit_storage extension (respectively the VK 1.1 features) for VI+. LLVM >= 7 is required and it is unlikely that workarounds for LLVM-6 get implemented for this rarely used ext. This first implementation does not yet make use of packing 16bit values

[Mesa-dev] [PATCH 1/2] ac: add subgroup scan functions for SI

This functionality is currently disabled due to a bug in LLVM. The idea of this implementation is taken from the ROCm Device Libs: https://github.com/RadeonOpenCompute/ROCm-Device-Libs/blob/master/ockl/src/wfredscan.cl --- src/amd/common/ac_llvm_build.c | 98 -- 1 f

[Mesa-dev] [PATCH 2/2] radv: enable subgroups arithmetic for VI+

--- src/amd/vulkan/radv_device.c | 4 +++- src/amd/vulkan/radv_shader.c | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 9fe415c4e0..ec60f9a9c5 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_

[Mesa-dev] [PATCH v3 3/7] nir: lower 64bit subgroup shuffle intrinsics

--- src/compiler/nir/nir.h | 1 + src/compiler/nir/nir_lower_subgroups.c | 68 +++--- 2 files changed, 56 insertions(+), 13 deletions(-) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index f33049d713..f3326e6df9 100644 --- a/src/compiler

[Mesa-dev] [PATCH v3 5/7] ac: add LLVM build functions for subgroup instrinsics

Co-authored-by: Connor Abbott --- src/amd/common/ac_llvm_build.c | 456 + src/amd/common/ac_llvm_build.h | 30 ++- 2 files changed, 485 insertions(+), 1 deletion(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 2fb8aea

[Mesa-dev] [PATCH v3 6/7] ac: handle subgroup intrinsics

--- src/amd/common/ac_nir_to_llvm.c | 69 - 1 file changed, 40 insertions(+), 29 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 7c2bd5c0cc..3a3aa72988 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/

[Mesa-dev] [PATCH v3 4/7] ac: make ballot and umsb capable of 64bit inputs

Reviewed-by: Marek Olšák --- src/amd/common/ac_llvm_build.c | 34 +- 1 file changed, 25 insertions(+), 9 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 32d8a02f56..2fb8aeaac6 100644 --- a/src/amd/common/ac_llvm_buil

[Mesa-dev] [PATCH v3 0/7] radv: add support for new subgroup capabilities

Third version of the series: - rebased to master - lower_shuffle_to_32bit now only lowers shuffles and nothing else - removed constant values from quad intrinsics Previous Version can be found here https://lists.freedesktop.org/archives/mesa-dev/2018-March/189116.html Daniel Schürmann (7): nir

[Mesa-dev] [PATCH v3 7/7] radv: enable subgroup capabilities

--- src/amd/vulkan/radv_device.c | 10 -- src/amd/vulkan/radv_shader.c | 7 ++- 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 4fc7392e65..e50b661cac 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/

[Mesa-dev] [PATCH v3 1/7] nir: adjust subgroups instructions for 64bit ballot sizes

--- src/compiler/nir/nir_lower_subgroups.c | 5 ++--- src/compiler/nir/nir_opcodes.py| 12 ++-- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/src/compiler/nir/nir_lower_subgroups.c b/src/compiler/nir/nir_lower_subgroups.c index 0d3c83b795..9dc7be7947 100644 --- a

[Mesa-dev] [PATCH v3 2/7] nir/spirv: Fix warning and add missing breaks.

--- src/compiler/spirv/spirv_to_nir.c | 2 ++ src/compiler/spirv/vtn_subgroup.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index 78c1e9ff59..28274311c2 100644 --- a/src/compiler/spirv/spirv_to_nir.c +++ b/src/compil

[Mesa-dev] [PATCH v2 4/7] ac: make ballot and umsb capable of 64bit inputs

Signed-off-by: Daniel Schürmann --- src/amd/common/ac_llvm_build.c | 33 - 1 file changed, 24 insertions(+), 9 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 1ae2b9dd17..67d15d5cb3 100644 --- a/src/amd/common

[Mesa-dev] [PATCH v2 2/7] nir/spirv: propagate constants of GroupNonUniformQuad instructions, eliminate warning and fix breaks

Signed-off-by: Daniel Schürmann --- src/compiler/spirv/spirv_to_nir.c | 2 ++ src/compiler/spirv/vtn_subgroup.c | 8 ++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index f06dca90ef..4454c1aca3 100644

[Mesa-dev] [PATCH v2 1/7] nir: adjust subgroups instructions for 64bit ballot sizes

Signed-off-by: Daniel Schürmann --- src/compiler/nir/nir_lower_subgroups.c | 5 ++--- src/compiler/nir/nir_opcodes.py| 12 ++-- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/src/compiler/nir/nir_lower_subgroups.c b/src/compiler/nir/nir_lower_subgroups.c index

[Mesa-dev] [PATCH v2 5/7] ac: add LLVM build functions for subgroup instrinsics

Co-authored-by: Connor Abbott Signed-off-by: Daniel Schürmann --- src/amd/common/ac_llvm_build.c | 475 + src/amd/common/ac_llvm_build.h | 33 ++- 2 files changed, 507 insertions(+), 1 deletion(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd

[Mesa-dev] [PATCH v2 6/7] ac: handle subgroup intrinsics

Signed-off-by: Daniel Schürmann --- src/amd/common/ac_nir_to_llvm.c | 66 +++-- 1 file changed, 37 insertions(+), 29 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index b0c0d76b47..403f75e88d 100644 --- a/src/amd

[Mesa-dev] [PATCH v2 7/7] radv: enable subgroup capabilities

Signed-off-by: Daniel Schürmann --- src/amd/vulkan/radv_device.c | 10 -- src/amd/vulkan/radv_shader.c | 7 ++- 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 36ba0c3833..ebc63f2620 100644 --- a/src

[Mesa-dev] [PATCH v2 0/7] radv: add support for the new subgroup capabilities

re-VI hardware or LLVM < 6. Daniel Schürmann (7): nir: adjust subgroups instructions for 64bit ballot sizes nir/spirv: propagate constants of GroupNonUniformQuad instructions, eliminate warning and fix breaks nir: lower 64bit subgroup shuffle intrinsics ac: make ballot and umsb ca

[Mesa-dev] [PATCH v2 3/7] nir: lower 64bit subgroup shuffle intrinsics

Signed-off-by: Daniel Schürmann --- src/compiler/nir/nir.h | 1 + src/compiler/nir/nir_lower_subgroups.c | 83 +++--- 2 files changed, 67 insertions(+), 17 deletions(-) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 6a51b7c4ab

Re: [Mesa-dev] [PATCH 2/6] spirv/radv: add AMD_gcn_shader capability, remove current extensions

With AMD_gcn_shader renamed to gcn_shader, this patch is Reviewed-by:/Daniel Schürmann <https://lists.freedesktop.org/mailman/listinfo/mesa-dev>>/ On 08.03.2018 16:00, Alejandro Piñeiro wrote: So now, during spirv_to_nir, it uses the capability instead of the extension. Note th

Re: [Mesa-dev] [PATCH 2/6] spirv/radv: add AMD_gcn_shader capability, remove current extensions

On 14.03.2018 16:03, Alejandro Piñeiro wrote: On 14/03/18 15:55, Daniel Schürmann wrote: Not sure, if I'm asked here :) As AMD_gcn_shader seems to be the only extension without new capability, I am fine with just handling it as if. Well, I was exactly asking this, if everybody involv

Re: [Mesa-dev] [PATCH 2/6] spirv/radv: add AMD_gcn_shader capability, remove current extensions

Not sure, if I'm asked here :) As AMD_gcn_shader seems to be the only extension without new capability, I am fine with just handling it as if. Additionally, we might want to rename it to gcn_shader to be consistent (or add the vendor names to all capabilities). Do you want to introduce one field

[Mesa-dev] [PATCH 2/2] nir/spirv: add support for the SubgroupBallotKHR SPIR-V capability

This capability is required for the VK_EXT_shader_subgroup_ballot extension. Signed-off-by: Daniel Schürmann --- src/compiler/spirv/spirv_to_nir.c | 3 +++ src/compiler/spirv/vtn_subgroup.c | 17 ++--- 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/src/compiler

[Mesa-dev] [PATCH 1/2] nir/spirv: add support for the SubgroupVoteKHR SPIR-V capability

This capability is required for the VK_EXT_shader_subgroup_vote extension. Signed-off-by: Daniel Schürmann --- src/compiler/spirv/spirv_to_nir.c | 4 src/compiler/spirv/vtn_subgroup.c | 20 2 files changed, 20 insertions(+), 4 deletions(-) diff --git a/src/compiler

[Mesa-dev] [PATCH 3/4] ac: add support for trinary_minmax instructions

--- src/amd/common/ac_nir_to_llvm.c | 53 + 1 file changed, 53 insertions(+) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 9b85069860..e78f4e8dcd 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir

[Mesa-dev] [PATCH 1/4] nir: add support for min/max/median of 3 srcs

From: Dave Airlie These are needed for SPV_AMD_shader_trinary_minmax, the AMD HW supports these. Co-authored-by: Daniel Schürmann Signed-off-by: Dave Airlie --- src/compiler/nir/nir_opcodes.py | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/compiler/nir/nir_opcodes.py

[Mesa-dev] [PATCH 2/4] spirv: add support for SPV_AMD_shader_trinary_minmax

From: Dave Airlie Signed-off-by: Dave Airlie --- src/compiler/shader_info.h| 1 + src/compiler/spirv/spirv_to_nir.c | 3 +++ src/compiler/spirv/vtn_amd.c | 52 +++ src/compiler/spirv/vtn_private.h | 2 ++ 4 files changed, 58 insertions(+) di

[Mesa-dev] [PATCH 4/4] radv: enable VK_AMD_shader_trinary_minmax extension

--- src/amd/vulkan/radv_extensions.py | 1 + src/amd/vulkan/radv_shader.c | 1 + 2 files changed, 2 insertions(+) diff --git a/src/amd/vulkan/radv_extensions.py b/src/amd/vulkan/radv_extensions.py index 469b09a160..12efaa04c6 100644 --- a/src/amd/vulkan/radv_extensions.py +++ b/src/amd/vulk

[Mesa-dev] [PATCH 2/7] nir/spirv: propagate constants of GroupNonUniformQuad instructions and eliminate warning

--- src/compiler/spirv/vtn_subgroup.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/compiler/spirv/vtn_subgroup.c b/src/compiler/spirv/vtn_subgroup.c index bd3143962b..73420b7e43 100644 --- a/src/compiler/spirv/vtn_subgroup.c +++ b/src/compiler/spirv/vtn_subgroup

[Mesa-dev] [PATCH 5/7] ac: add LLVM build functions for subgroup instrinsics

Co-authored-by: Connor Abbott --- src/amd/common/ac_llvm_build.c | 475 + src/amd/common/ac_llvm_build.h | 33 ++- 2 files changed, 507 insertions(+), 1 deletion(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 5341eb3

[Mesa-dev] [PATCH 0/7] radv: add support for the new subgroup capabilities

to a bug in the LLVM WWM liveness analysis. Except for GroupNonUniformArithmetic, the capabilities should also work on pre-VI chip class (untested). To add support for GroupNonUniformArithmetic on pre-VI chip class, in/exclusive scan has to be implemented using the according instructions. Daniel

[Mesa-dev] [PATCH 6/7] ac: handle subgroup intrinsics

--- src/amd/common/ac_nir_to_llvm.c | 66 +++-- 1 file changed, 37 insertions(+), 29 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 9b85069860..0f4cc32f15 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/

[Mesa-dev] [PATCH 7/7] radv: enable subgroup capabilities

--- src/amd/vulkan/radv_device.c | 12 ++-- src/amd/vulkan/radv_shader.c | 6 +- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 7a11e08f97..4200eb7d7d 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src

[Mesa-dev] [PATCH 1/7] nir: adjust subgroups instructions for 64bit ballot sizes

--- src/compiler/nir/nir_lower_subgroups.c | 5 ++--- src/compiler/nir/nir_opcodes.py| 12 ++-- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/src/compiler/nir/nir_lower_subgroups.c b/src/compiler/nir/nir_lower_subgroups.c index f18ad00c37..ea883c353e 100644 --- a

[Mesa-dev] [PATCH 3/7] ac: lower 64bit subgroup intrinsics

--- src/amd/common/ac_lower_subgroups.c | 50 ++--- 1 file changed, 46 insertions(+), 4 deletions(-) diff --git a/src/amd/common/ac_lower_subgroups.c b/src/amd/common/ac_lower_subgroups.c index d0782b481b..2be48e2ba1 100644 --- a/src/amd/common/ac_lower_subgroups.

[Mesa-dev] [PATCH 4/7] ac: make ballot and umsb capable of 64bit inputs

--- src/amd/common/ac_llvm_build.c | 33 - 1 file changed, 24 insertions(+), 9 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 9851cafb7f..5341eb3f07 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd/common/ac

[Mesa-dev] [PATCH crucible 0/3] amd: gcn_shader and shader_trinary_minmax tests

extension tests amd: shader_trinary_minmax extension tests Daniel Schürmann (1): amd: gcn_shader extension tests Makefile.am| 5 + src/tests/func/amd/amd_common.c| 115 ++ src/tests/func/amd/amd_common.h| 53 +++ src/tests/func

[Mesa-dev] [PATCH crucible 1/3] amd: common functions for amd extension tests

From: Bas Nieuwenhuizen Co-authored-by: Daniel Schürmann Signed-off-by: Daniel Schürmann --- Makefile.am | 3 ++ src/tests/func/amd/amd_common.c | 115 src/tests/func/amd/amd_common.h | 53 ++ 3 files changed, 171

[Mesa-dev] [PATCH crucible 2/3] amd: gcn_shader extension tests

Signed-off-by: Daniel Schürmann --- Makefile.am | 1 + src/tests/func/amd/gcn_shader.c | 252 2 files changed, 253 insertions(+) create mode 100644 src/tests/func/amd/gcn_shader.c diff --git a/Makefile.am b/Makefile.am index

[Mesa-dev] [PATCH crucible 3/3] amd: shader_trinary_minmax extension tests

From: Bas Nieuwenhuizen Co-authored-by: Daniel Schürmann Signed-off-by: Daniel Schürmann --- Makefile.am| 1 + src/tests/func/amd/shader_trinary_minmax.c | 576 + 2 files changed, 577 insertions(+) create mode 100644 src/tests

Re: [Mesa-dev] [PATCH v2 2/2] radv: implement AMD_gcn_shader extension

On Wed, Feb 21, 2018 at 1:00 PM, wrote: From: Dave Airlie Co-authored-by: Daniel Schürmann Signed-off-by: Daniel Schürmann --- src/amd/common/ac_llvm_build.c| 3 +- src/amd/common/ac_nir_to_llvm.c | 39 ++ src/amd/vulkan/radv_extensions.py | 1 + src

[Mesa-dev] [PATCH 1/2] spirv: import AMD extensions header from glslang

Signed-off-by: Daniel Schürmann --- src/compiler/spirv/GLSL.ext.AMD.h | 110 ++ 1 file changed, 110 insertions(+) create mode 100644 src/compiler/spirv/GLSL.ext.AMD.h diff --git a/src/compiler/spirv/GLSL.ext.AMD.h b/src/compiler/spirv/GLSL.ext.AMD.h new

[Mesa-dev] [PATCH 2/2] radv: implement AMD_gcn_shader extension

From: Dave Airlie Signed-off-by: Daniel Schürmann --- src/amd/common/ac_nir_to_llvm.c | 51 +++ src/amd/vulkan/radv_extensions.py | 1 + src/compiler/nir/meson.build | 1 + src/compiler/nir/nir_intrinsics.h | 5 src/compiler/spirv/spirv_to_nir.c | 2

[Mesa-dev] [PATCH 1/7] radv: add 16bit conversion operations

Signed-off-by: Daniel Schürmann --- src/amd/common/ac_llvm_build.c | 5 + src/amd/common/ac_nir_to_llvm.c | 25 ++--- 2 files changed, 27 insertions(+), 3 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index a86ba962fa

[Mesa-dev] [PATCH 5/7] nir: add 16bit type information to glsl types

Signed-off-by: Daniel Schürmann --- src/compiler/glsl_types.h | 15 +++ src/compiler/nir_types.cpp | 12 src/compiler/nir_types.h | 1 + 3 files changed, 28 insertions(+) diff --git a/src/compiler/glsl_types.h b/src/compiler/glsl_types.h index ab0b263764..0704510630

[Mesa-dev] [PATCH 7/7] radv: enable VK_KHR_16bit_storage extension

Signed-off-by: Daniel Schürmann --- src/amd/vulkan/radv_device.c | 9 + src/amd/vulkan/radv_extensions.py | 1 + src/amd/vulkan/radv_shader.c | 1 + 3 files changed, 11 insertions(+) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 9fda419d58

[Mesa-dev] [PATCH 6/7] radv: add support for 16bit input/output

Signed-off-by: Daniel Schürmann --- src/amd/common/ac_nir_to_llvm.c | 92 - 1 file changed, 72 insertions(+), 20 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index d38a649074..842a846df1 100644 --- a/src/amd

[Mesa-dev] [PATCH 2/7] radv: add support for 16bit ssbo stores

Signed-off-by: Daniel Schürmann --- src/amd/common/ac_nir_to_llvm.c | 146 +++- 1 file changed, 85 insertions(+), 61 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 827ba0b9c9..31f16d3acf 100644 --- a/src/amd

[Mesa-dev] [PATCH 3/7] radv: add support for 16bit UBO loads

Signed-off-by: Daniel Schürmann --- src/amd/common/ac_llvm_build.c | 25 + src/amd/common/ac_llvm_build.h | 8 src/amd/common/ac_nir_to_llvm.c | 14 -- 3 files changed, 45 insertions(+), 2 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b

[Mesa-dev] [PATCH 4/7] radv: add support for 16bit buffer loads

Signed-off-by: Daniel Schürmann --- src/amd/common/ac_nir_to_llvm.c | 91 ++--- 1 file changed, 50 insertions(+), 41 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 2b48e92949..d38a649074 100644 --- a/src/amd

Re: [Mesa-dev] [RFC] NIR serialization

09/08/2017 10:59 AM, Kenneth Graunke wrote: On Thursday, September 7, 2017 4:26:04 PM PDT Jordan Justen wrote: On 2017-09-06 14:12:41, Daniel Schürmann wrote: Hello together! Recently, we had a small discussion (off the list) about the NIR serialization, which was previously discussed i

[Mesa-dev] [RFC] NIR serialization

d Message Subject:Re: NIR serialization Date: Tue, 5 Sep 2017 11:00:31 -0700 From: Ian Romanick To: Daniel Schürmann , Nicolai Hähnle , Timothy Arceri Sorry for taking so long to reply. It was a long holiday weekend in the US, and I was away. On 09/01/2017 05:03 A