Re: [Mesa-dev] [PATCH 2/4] intel: Add Cannonlake PCI IDs for Y-skus.

2017-06-29 Thread Clint Taylor
Reviewed-by: Clinton Taylor -Clint On 06/29/2017 02:34 PM, Rodrigo Vivi wrote: By the Spec all CNL Y skus are 2+2, i.e. GT2. This is a copy of merged i915's commit 95578277cbdb ("drm/i915/cnl: Add Cannonlake PCI IDs for Y-skus.") v2: Add kernel commit id for reference. Cc: Anusha Srivatsa

Re: [Mesa-dev] [PATCH 1/4] intel: Add Cannonlake PCI IDs for U-skus.

2017-06-29 Thread Clint Taylor
Reviewed-by: Clinton Taylor -Clint On 06/29/2017 02:34 PM, Rodrigo Vivi wrote: Platform enabling and its power-on are organized in different skus (U x Y x S x H, etc). So instead of organizing it in GT1 x GT2 x GT3 let's also use the platform sku. This is a copy of merged i915's commit e918

Re: [Mesa-dev] [Intel-gfx] [PATCH] intel: Adding missing Broxton PCI IDs.

2016-03-02 Thread Clint Taylor
matches the kernels entries. Thanks. Reviewed-by: Clint Taylor ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev