ou're
geometry (vertex) limited. It's also hard to say without knowing what your
shaders are doing or what fixed function features you might be using.
-Brian
On Thu, Jan 30, 2025 at 6:57 AM Jose Fonseca
wrote:
> That's a relatively large geometry count.
>
> llvmpipe (a
el raised. That
needs addressing.
On Thu, Dec 19, 2024 at 07:33:07PM +, Marek Olšák wrote:
> On Thu, Dec 19, 2024 at 5:32 AM Brian Starkey wrote:
>
> > On Wed, Dec 18, 2024 at 09:53:56PM +, Marek Olšák wrote:
>
> The pitch doesn't always describe the layout. In prac
On Wed, Dec 18, 2024 at 09:53:56PM +, Marek Olšák wrote:
> On Wed, Dec 18, 2024 at 5:32 AM Brian Starkey wrote:
>
> > On Wed, Dec 18, 2024 at 11:24:58AM +, Simona Vetter wrote:
> > >
> > > For that reason I think linear modifiers with explicit pitch/size
&g
t is a "special"
constraint (in that it's really a description of the buffer layout),
and that constraints in-general shouldn't be exposed via modifiers?
Cheers,
-Brian
On Tue, Dec 17, 2024 at 11:13:05AM +, Michel Dänzer wrote:
> On 2024-12-17 10:14, Brian Starkey wrote:
> > On Sun, Dec 15, 2024 at 03:53:14PM +, Marek Olšák wrote:
> >> The comment explains the problem with DRM_FORMAT_MOD_LINEAR.
> >>
> >> Signed-off-by:
y - it's a device
constraint. It feels out of place to overload modifiers with it.
I'm not saying we don't need a way to describe constraints to
allocators, but I question if modifiers the right mechanism to
communicate them?
Cheers,
-Brian
Maybe there should be a comment regarding the performance and risk of
change?
-Brian
On 8/21/24 07:54, Faith Ekstrand wrote:
I've actually benchmarked this and 32bit is still faster on many
modern CPUs.
Also, I would be very surprised if we could change it without breaking
the uni
On 4/10/24 13:53, Timo Aaltonen wrote:
Brian Paul kirjoitti 6.4.2024 klo 1.05:
I'm trying to build the Intel Vulkan driver. First time in a few
months. I'm having build problems related to clc. I'm on Ubuntu 22.04
[...]
[1347/3181] Generating src/intel/vulkan/...om comm
Thanks, Mike. That works as I don't need RT functionality.
BTW, I was looking at a stale meson_options.txt file so ignore my
comments about that.
-Brian
On 4/5/24 16:24, Mike Blumenkrantz wrote:
This doesn't solve the problem about missing CLC, but I pass
-Dintel_rt=disable
'enabled', 'disabled', 'system',
],
description : 'Build the intel-clc compiler (enables Vulkan Intel ' +
'Ray Tracing on supported hardware).'
)
The default is 'disabled' but that's deprecated? Choices include
'enabled
Brian Paul’s words:
The core library was originally (started in 1993) written on an Amiga using the
DCC compiler. Later, development was moved to an SGI workstation. Current
development is done on PC/Linux systems.
Hard to believe it's been 30 years!
So thirty years later the
really cross-platform it's a limit to
be aware of.
-Brian
Reviewed-By: Mike Blumenkrantz
Reviewed-by: Adam Jackson
Part-of:
<https://nam04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fmesa%2Fmesa%2F-%2Fmerge_requests%2F9644&
Forwarding to mesa-dev where you may get more help. There was talk of
changing software rendering but I'm not sure what's changed. What
version of Mesa are you using?
-Brian
Forwarded Message
Subject:[Mesa-users] Surfaceless mesa 20.3.X?
Date: Wed, 2
Hi Andreas,
I'm forwarding your message to the mesa-dev list for better visibility.
BTW, when you say "antialiasing" below, what exactly do you mean?
-Brian
Forwarded Message
Subject:[Mesa-users] Issues with removal of classic OSMesa
Date: Thu, 31
On 11/17/2020 01:59 PM, Brian Paul wrote:
On 11/17/2020 11:45 AM, Ian Romanick wrote:
On 11/17/20 9:25 AM, Brian Paul wrote:
It appears these SPIR-V extension functions don't behave as they should
on Intel (don't know about other Vulkan drivers).
They're supposed to be NaN-awa
On 11/18/2020 02:49 AM, Connor Abbott wrote:
On Tue, Nov 17, 2020 at 9:56 PM Brian Paul wrote:
On 11/17/2020 11:49 AM, Ian Romanick wrote:
On 11/17/20 9:25 AM, Brian Paul wrote:
Using the Intel Vulkan driver, we've found some cases where SpvOpSelect
is returning -0.0 (negative
_INFO, \
.has_64bit_float = false,\
.has_64bit_int = false,
But gen8/9 do support it. Is this a driver and/or hardware issue?
-Brian
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On 11/17/2020 11:45 AM, Ian Romanick wrote:
On 11/17/20 9:25 AM, Brian Paul wrote:
It appears these SPIR-V extension functions don't behave as they should
on Intel (don't know about other Vulkan drivers).
They're supposed to be NaN-aware such that if one argument is NaN, the
ot
On 11/17/2020 11:49 AM, Ian Romanick wrote:
On 11/17/20 9:25 AM, Brian Paul wrote:
Using the Intel Vulkan driver, we've found some cases where SpvOpSelect
is returning -0.0 (negative zeros) instead of normal 0.0 depending on
the arguments.
Do you have a specific test case that fails?
x)" ? That might explain where the
negative zeros are coming from.
Our work-around is to implement selection with bitwise operations: (a &
x) | (b & ~x)
It seems to me that SpvOpSelect shouldn't interpret the bits and just
return an exact copy of the argument.
-Brian
_
d, but not NMin or NClamp.
Looking at the SPIR-V/nir/intel code it's hard to tell what's going on
and whether these semantics are actually being followed.
Any comments?
-Brian
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Nice work! It's good to see llvmpipe being maintained and improved like
that.
-Brian
On 10/30/2020 02:24 PM, Dave Airlie wrote:
Just to let everyone know, a month ago I submitted the 20.2 llvmpipe
driver for OpenGL 4.5 conformance under the SPI/X.org umbrella, and it
is now offic
This all sounds find to me, FWIW.
-Brian
On 09/19/2020 04:24 AM, Marek Olšák wrote:
Hi,
I don't know if you have been following gitlab, but there are a few
cleanups that I have been considering doing.
Rename PIPE_TRANSFER flags to PIPE_MAP, and pipe_transfer_usage to
pipe_map_
t ;-)
>
> Well, we have now after getting some agreement. Please enjoy your
> shiny new https://www.mesa3d.org and https://docs.mesa3d.org
> experience.
>
> Brian, could you please change the DNS for mesa3d.org and
> www.mesa3d.org to point to 35.227.58.183? No need to change
On 05/13/2020 03:13 AM, Erik Faye-Lund wrote:
On Tue, 2020-05-12 at 12:17 +0200, Erik Faye-Lund wrote:
On Thu, 2020-05-07 at 11:03 -0600, Brian Paul wrote:
On 05/07/2020 04:33 AM, Erik Faye-Lund wrote:
Hey Brian
TLDR; are you OK with me moving forward with the rework of
mesa3d.org?
Yes
On Tue, May 12, 2020 at 4:04 AM Daniel Stone wrote:
> Hi Brian,
>
> On Fri, 8 May 2020 at 15:30, Brian Paul wrote:
> > Done. easydns says it may take up to 3 hours to go into effect.
>
> Thanks for doing this! Could you please add the following TXT records
> as well (no
o
try to prevent use of malloc/free in the .c code. u_trackmem.h would
typically have to be the last #include in a .c file.
I think redefining malloc/free in the .h file is better than the -D
compiler option because as s
On Thu, May 7, 2020 at 12:16 PM Brian Paul wrote:
> On 05/07/2020 11:35 AM, Daniel Stone wrote:
> > Hi,
> >
> > On Thu, 7 May 2020 at 18:08, Erik Faye-Lund
> > wrote:
> >> On Thu, 2020-05-07 at 11:03 -0600, Brian Paul wrote:
> >>> It seems like
On 05/07/2020 11:35 AM, Daniel Stone wrote:
Hi,
On Thu, 7 May 2020 at 18:08, Erik Faye-Lund
wrote:
On Thu, 2020-05-07 at 11:03 -0600, Brian Paul wrote:
It seems like only the front page is served at the moment. Is it
possible to get a look at the rest? The front page looks nice.
Yeah, we
On 05/07/2020 04:33 AM, Erik Faye-Lund wrote:
Hey Brian
TLDR; are you OK with me moving forward with the rework of mesa3d.org?
Yes...
(BTW, sorry about the URL mangling below)
As you hopefully are aware of, I've been working on a new website for
mesa3d.org, split into a "
c\util\u_process.c(34): fatal error C1083: Cannot open include file:
'unistd.h': No such file or directory
The #include of unistd.h should probably be moved into the later #if
DETECT_OS_WINDOWS block.
-Brian
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I'm on vacation this week. When I get back next week we'll talk about this
again at VMware. Unfortunately, integrating a new build tool into our
infrastructure here can be pretty difficult. But I totally understand the
appeal of getting rid of SCons. Please hold on a bit...
-Brian
I'm going to update the docs regarding patches and gitlab. It's kind of
a mess now.
-Brian
On 02/11/2020 03:03 AM, Michel Dänzer wrote:
Hi Charmaine,
it looks like you pushed this patch and another one directly to the main
Mesa repository master branch.
Pushing directly t
On 12/11/2019 10:42 AM, Jason Ekstrand wrote:
On Wed, Dec 11, 2019 at 11:33 AM Michel Dänzer <mailto:mic...@daenzer.net>> wrote:
On 2019-12-11 5:47 p.m., Brian Paul wrote:
>
> I've had little time for Mesa work the past 18 months.
That makes me sad, I h
sa's
"Submitting Patches" page is kind of a mess. It would be great if
someone could work on that.
Someone mentioned hardly reading the mailing list anymore. I still
haven't gotten into the habit of monitoring the MRs page...
-Brian
_
Reviewed-by: Brian Paul
On 12/09/2019 10:49 AM, srol...@vmware.com wrote:
From: Roland Scheidegger
Braces mismatch (flagged by CI, untested).
Fixes: 385d13f26d2 "util/atomic: Add a _return variant of p_atomic_add"
---
src/util/u_atomic.h | 4 ++--
1 file changed, 2 insert
On 11/22/2019 09:16 PM, Ian Romanick wrote:
On 11/22/19 6:49 PM, Brian Paul wrote:
This fixes a build failure on MSVC.
BTW, it looks like clang supports _Pragma() but I don't know if it
understands the "gcc unroll N" directive.
It probably doesn't, but that should be oka
This fixes a build failure on MSVC.
BTW, it looks like clang supports _Pragma() but I don't know if it
understands the "gcc unroll N" directive.
Signed-off-by: Brian Paul
---
src/compiler/nir/nir_range_analysis.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/s
Ping again.
On 10/24/2019 03:25 PM, Brian Paul wrote:
Ping. Anyone?
-Brian
On Tue, Oct 22, 2019 at 3:52 PM Brian Paul <mailto:bri...@vmware.com>> wrote:
A security advisory (TALOS-2019-0857/CVE-2019-5068) found that
creating shared memory regions with permission mode 0
Trivial.
---
src/compiler/spirv/vtn_variables.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/spirv/vtn_variables.c
b/src/compiler/spirv/vtn_variables.c
index 944d1f0..37ad4f2 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables
---
src/compiler/nir/nir_builder.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h
index de00fe7..aed4759 100644
--- a/src/compiler/nir/nir_builder.h
+++ b/src/compiler/nir/nir_builder.h
@@ -782,7 +782,7 @@ nir
The later is the right symbol for entrypoint functions.
---
src/mesa/main/texgetimage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c
index e43f336..d6ec4c5 100644
--- a/src/mesa/main/texgetimage.c
+++ b/src/mesa/main/
Ping. Anyone?
-Brian
On Tue, Oct 22, 2019 at 3:52 PM Brian Paul wrote:
> A security advisory (TALOS-2019-0857/CVE-2019-5068) found that
> creating shared memory regions with permission mode 0777 could allow
> any user to access that memory. Several Mesa drivers use shared-
> me
A security advisory (TALOS-2019-0857/CVE-2019-5068) found that
creating shared memory regions with permission mode 0777 could allow
any user to access that memory. Several Mesa drivers use shared-
memory XImages to implement back buffers for improved performance.
This path changes the shmget() ca
On 09/11/2019 03:06 PM, Ian Romanick wrote:
On 9/10/19 10:53 PM, Brian Paul wrote:
IIRC, designated initializers are not legal C++.
Fixes the MSVC build.
Fixes: 83fd1e58 ("glsl/nir: Add and use a gl_nir_link() function")
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 2 +-
1 fi
IIRC, designated initializers are not legal C++.
Fixes the MSVC build.
Fixes: 83fd1e58 ("glsl/nir: Add and use a gl_nir_link() function")
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
b/
For the series, Reviewed-by: Brian Paul
On 08/27/2019 04:57 AM, Jose Fonseca wrote:
Uses some of the same -Werror options used by Meson, as suggested by
Michel Daezer.
---
scons/gallium.py | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/scons/gallium.py b/scons
Reviewed-by: Brian Paul
On 08/10/2019 10:14 AM, Marek Olšák wrote:
Ping
On Fri., Aug. 2, 2019, 19:13 Marek Olšák, <mailto:mar...@gmail.com>> wrote:
From: Marek Olšák mailto:marek.ol...@amd.com>>
---
src/mesa/state_tracker/st_cb_texture.c | 12 ++
logic be moved into the body of
LLVMBuildAtomicCmpXchg() so the whole function isn't duplicated?
Other than that,
Reviewed-by: Brian Paul
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On 08/02/2019 09:56 AM, Eric Engestrom wrote:
On Friday, 2019-08-02 17:50:17 +0200, Michel Dänzer wrote:
On 2019-08-02 5:37 p.m., Brian Paul wrote:
Ugh, I didn't mean to do this. I'm trying to figure out how to make a
merge request with gitlab.
Just push to a branch in you
Ugh, I didn't mean to do this. I'm trying to figure out how to make a
merge request with gitlab.
-Brian
On 08/02/2019 09:35 AM, GitLab Mirror wrote:
Module: Mesa
Branch: update-reviewers-for-vmware
Commit: a86eccfb78092493b3999849db62613838951756
URL:
htt
Ordering),
+
mapFromLLVMOrdering(FailureOrdering),
SingleThread ?
llvm::SynchronizationScope::SingleThread :
llvm::SynchronizationScope::CrossThread));
}
#endif
Reviewed-by: Br
object
'src/com...ler/nir/nir@sta/nir_loop_analyze.c.o'.
../src/compiler/nir/nir_loop_analyze.c: In function ‘process_loops’:
../src/compiler/nir/nir_loop_analyze.c:933:7: warning: ‘limit_rhs’ may
be used uninitialized in this function [-Wmaybe-uninitialized]
terminator->induct
On Mon, Jun 10, 2019 at 06:58:30AM -0700, Rob Clark wrote:
> On Mon, Jun 10, 2019 at 6:53 AM Rob Clark wrote:
> >
> > On Sat, Jun 8, 2019 at 6:08 PM Brian Masney wrote:
> > >
> > > Hi,
> > >
> > > I'm trying to get the GPU working using the
On Mon, Jun 10, 2019 at 10:00:01PM -0400, Jonathan Marek wrote:
> On 6/10/19 10:00 PM, Brian Masney wrote:
> > On Mon, Jun 10, 2019 at 09:53:25PM -0400, Jonathan Marek wrote:
> > > > > > This error doesn't happen on X11 using the mesa master branch.
> >
mesa in pmOS with '-Db_ndebug=true'
> > and X11 is now working properly on the Nexus 5. glxgears averages about
> > 59.5 FPS. I'll add a bug report with pmOS to have them add that flag to
> > their mesa build. Fedora added that flag to their builds:
> > ht
Hi Rob,
On Mon, Jun 10, 2019 at 05:10:45PM -0700, Rob Clark wrote:
> On Mon, Jun 10, 2019 at 3:54 PM Brian Masney wrote:
> >
> > On Mon, Jun 10, 2019 at 06:58:30AM -0700, Rob Clark wrote:
> > > On Mon, Jun 10, 2019 at 6:53 AM Rob Clark wrote:
> > > >
> >
On Sun, Jun 09, 2019 at 10:40:52AM -0400, Jonathan Marek wrote:
> On 6/9/19 8:41 AM, Brian Masney wrote:
> > On Sat, Jun 08, 2019 at 10:58:11PM -0400, Jonathan Marek wrote:
> > > Hi,
> > >
> > > It's possible 19.1 has another issue, I only tested the
lxgears starts up:
../src/gallium/drivers/freedreno/freedreno_batch.c:424:fd_batch_add_dep:
Assertion `!batch_depends_on(dep, batch)' failed.
> FYI, I haven't pushed it anywhere but I recently rebased my Nexus 5 patches
> from last year (and been looking at getting call audio wor
connect support in the kernel for msm8974 so
that the clock hacks can be dropped.
Brian
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Ping.
-Brian
On 05/20/2019 07:36 AM, Brian Paul wrote:
Silence two unused var warnings. And init elem_size, elem_align to
zero to silence "maybe uninitialized" warnings.
---
src/compiler/nir/nir_lower_int_to_float.c | 2 +-
src/compiler/nir/nir_opt_copy_prop_vars.c | 4 +---
sr
hipped
in the Android SDK, so perhaps that's fixable. And for Chocolatey, it
turns out they have a winflexbison pacakge and a winflexbison3 package,
and the latter has a more recent Bison version.
So looking at this again, it looks like it might be solveable, at least
in the cases where this is
I think this change broke the MSVC build for us.
I may not have time to investigate until later today.
-Brian
On 05/21/2019 05:41 AM, GitLab Mirror wrote:
Module: Mesa
Branch: master
Commit: eb85124a9f6e9cb94d0d4a99f91bbae374777e3a
URL:
https://nam04.safelinks.protection.outlook.com/?url
Both look OK to me. Do they need to be tagged with "Cc:
mesa-sta...@lists.freedesktop.org" for the stable branches?
Reviewed-by: Brian Paul
On 05/18/2019 07:46 PM, Charmaine Lee wrote:
This fixes surface leak when no winsys buffers are bound.
---
src/mesa/main/context.c | 4 +++
Silence two unused var warnings. And init elem_size, elem_align to
zero to silence "maybe uninitialized" warnings.
---
src/compiler/nir/nir_lower_int_to_float.c | 2 +-
src/compiler/nir/nir_opt_copy_prop_vars.c | 4 +---
src/compiler/nir_types.cpp| 2 +-
3 files changed, 3 inserti
In case the device reports 15 (or more) buffers.
---
src/gallium/drivers/svga/svga_screen.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/svga/svga_screen.c
b/src/gallium/drivers/svga/svga_screen.c
index 02c1a99..b70fd85 100644
--- a/src/gallium/drivers
The series LGTM.
Reviewed-by: Brian Paul
On 05/12/2019 07:05 AM, mathias.froehl...@gmx.net wrote:
From: Mathias Fröhlich
Hi Brian,
The series is a collection of comment updates and
state handling cleanup past the VAO changes that went
into mesa. There are two fixes for potential bugs
in
The 'progress' variable is initialized to false in other locations.
This fixes a new Coverity warning.
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
b/src/mesa/state_tracker/st_glsl_to_ni
LGTM. Just two little nits below.
Reviewed-by: Brian Paul
Perhaps you could review the 5-patch series of clean-ups I posted on
Saturday?
On 05/06/2019 06:12 PM, srol...@vmware.com wrote:
From: Roland Scheidegger
Brian noticed there was an uninitialized var for the 8-wide case and 128
Don't return an expression in void functions.
Replace an unsigned int with proper enum.
---
src/gallium/auxiliary/driver_ddebug/dd_context.c | 15 ---
src/gallium/auxiliary/driver_ddebug/dd_screen.c | 2 +-
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/src/gallium/au
It complains about mixing GLboolean and bool in the |= expression.
---
src/compiler/glsl/glsl_parser_extras.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/glsl/glsl_parser_extras.cpp
b/src/compiler/glsl/glsl_parser_extras.cpp
index d99ab3d..41f2a97 100644
---
---
src/gallium/auxiliary/postprocess/pp_program.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/postprocess/pp_program.c
b/src/gallium/auxiliary/postprocess/pp_program.c
index 52786de..4cd3990 100644
--- a/src/gallium/auxiliary/postprocess/pp_program.c
The function pointer declaration in pipe_context uses unsigned
for the bitmask.
---
src/gallium/auxiliary/driver_noop/noop_pipe.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/driver_noop/noop_pipe.c
b/src/gallium/auxiliary/driver_noop/noop_pipe.c
index
Remove stray const qualifier.
s/unsigned/enum tgsi_semantic/
---
src/gallium/auxiliary/util/u_format_zs.h | 2 +-
src/gallium/auxiliary/util/u_simple_shaders.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_format_zs.h
b/src/gallium/auxi
Just don't emit the transform array at all if there are no transforms
for a state, and avoid trying to walk over it.
Original patch by Connor Abbott. Updated with suggestions by
Dylan Baker.
---
src/compiler/nir/nir_algebraic.py | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --
On 05/02/2019 11:18 PM, Mathias Fröhlich wrote:
Hi Brian,
On Friday, 3 May 2019 00:17:51 CEST Brian Paul wrote:
On 05/02/2019 03:27 AM, mathias.froehl...@gmx.net wrote:
From: Mathias Fröhlich
In glArrayElement, use the bitmask trick to just walk the enabled
vao arrays. This should be about
;Mappings[MAP_INTERNAL].Pointer,
+ _mesa_vertex_attrib_address(array, binding))
+ + elt * binding->Stride;
+ return src;
+}
Could you add some brief comments on those functions to explain what
they do?
Otherwise, for the rest of the series,
Reviewed-by: Brian Paul
Nice work!!
-Brian
/api_arrayelt.c
@@ -90,6 +90,23 @@ TYPE_IDX(GLenum t)
}
+/*
+ * Convert normalized/integer/double to the range [0, 3].
+ */
+static inline int
+NORM_IDX(const struct gl_vertex_format *vformat)
Maybe we could find a better name. How about vertex_format_to_index()?
-Brian
+{
+ if (vformat
that use a loop to walk the attributes.
I'm not sure I understand that last sentence.
The code looks fine.
Reviewed-by: Brian Paul
Signed-off-by: Mathias Fröhlich
---
src/mesa/main/api_arrayelt.c | 185 ++-
1 file changed, 28 insertions(+), 157 dele
On 05/02/2019 02:34 PM, Connor Abbott wrote:
Just don't emit the transform array at all if there are no transforms
for a state, and avoid trying to walk over it.
---
Brian, does this build on Windows? I tested it on my shader-db
on radeonsi.
Yes, it compiles. Thanks!
Tested-by: Brian
ash trying to access it.
Hmm, any ideas for how to fix this?
-Brian
Running piglit with i965, or radeonsi will reproduce the crash.
On Thu, May 2, 2019 at 7:52 PM Brian Paul <mailto:bri...@vmware.com>> wrote:
This fixes a build failure with MSVC.
---
I've compile
This fixes a build failure with MSVC.
---
I've compiled tested this, but not sure how to runtime test it.
---
src/compiler/nir/nir_algebraic.py | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/compiler/nir/nir_algebraic.py
b/src/compiler/nir/nir_algebraic.py
index 6db749e..dc25421 100
From: Charmaine Lee
This patch adds a host_log interface to svga_winsys and
moves the host logging code to the winsys layer.
Reviewed-by: Brian Paul
---
src/gallium/drivers/svga/Makefile.sources | 2 -
src/gallium/drivers/svga/meson.build | 1 -
src/gallium/drivers/svga
valgrind crashes when we try to initialize host logging. This
env var can be used to disable logging.
v2: rebase onto "svga: move host logging to winsys".
Cc: mesa-sta...@lists.freedesktop.org
---
docs/envvars.html | 3 +++
src/gallium/drivers/svga/svga_screen.c | 16 +
I'm not sure what triggered this, but building with
scons platform=windows toolchain=crossmingw machine=x86 build=profile
with MinGW g++ 7.3 or 7.4 causes an internal compiler error.
We can work around it by forcing -O1 optimization.
---
src/compiler/glsl/builtin_variables.cpp | 15 ++
---
src/gallium/auxiliary/gallivm/lp_bld_format_s3tc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_format_s3tc.c
b/src/gallium/auxiliary/gallivm/lp_bld_format_s3tc.c
index 9561c34..90b2be9 100644
--- a/src/gallium/auxiliary/gallivm/
valgrind crashes when we try to initialize host logging. This
env var can be used to disable logging.
Cc: mesa-sta...@lists.freedesktop.org
---
docs/envvars.html | 3 +++
src/gallium/drivers/svga/svga_screen.c | 4 +++-
2 files changed, 6 insertions(+), 1 deletion(-)
diff -
The series looks good to me.
Reviewed-by: Brian Paul
On 04/30/2019 05:04 AM, Thomas Hellstrom wrote:
The vmwgfx kernel module has a compatibility mode for user-space that is
not guest-backed resource aware. Add an environment variable to facilitate
testing of this mode on guest-backed aware
It was committed in early March: b286e74df66e25cadd1c82d9ddc4d1fc3887b646
-Brian
On 04/23/2019 07:25 AM, Thomas Hellstrom wrote:
Hi, Brian,
Did this series get reviewed? I don't see any replies?
/Thomas
On Tue, 2019-03-05 at 20:48 -0700, Brian Paul wrote:
Use a new enum type inste
* interfere with llvm's ability to recognize the pattern but seems
* a bit brittle.
+ * NOTE: llvm 9+ always uses (non arch specific) intrinsic.
*/
LLVMValueRef no_ov = lp_build_cmp(bld, PIPE_FUNC_GREATER, a, b);
a = lp_build_select(b
smaller than the buffer size.
*/
if (reg_file != TGSI_FILE_CONSTANT) {
- assert(index_limit > 0);
+ assert(index_limit >= 0);
max_index = lp_build_const_int_vec(bld->bld_base.base.gallivm,
uint_bld->type, index_lim
!dirty)
return;
Yeah, this looks a little questionable.
Couldn't you add a check for ctx->RasterDiscard in
st_update_framebuffer_state() and no-op most of that function there?
I think you'd at least want to do this after flushing the bitmap and
readpix cache.
-Brian
__
9 100644
> --- a/src/hgl/GLDispatcher.h
> +++ b/src/hgl/GLDispatcher.h
> @@ -15,7 +15,7 @@
> #include
> #include
>
> -#include "glheader.h"
> +#include "main/glheader.h"
>
> #include "glapi/glapi.h"
>
> --
Looks OK to me. Revi
On 03/29/2019 12:58 PM, Ian Romanick wrote:
On 3/29/19 9:57 AM, Brian Paul wrote:
__builtin_types_compatible_p() is GCC-specific and breaks the
MSVC build.
This intrinsic has been in u_vector_foreach() for a long time, but
that macro has only recently been used in code
(nir
__builtin_types_compatible_p() is GCC-specific and breaks the
MSVC build.
This intrinsic has been in u_vector_foreach() for a long time, but
that macro has only recently been used in code
(nir/nir_opt_comparison_pre.c) that's built with MSVC.
Fixes: 2cf59861a ("nir: Add partial redundancy elimina
oftpipe->framebuffer.nr_cbufs; i++) {
- sp_tile_cache_clear(softpipe->cbuf_cache[i], color, 0);
+ if (buffers & (PIPE_CLEAR_COLOR0 << i))
+sp_tile_cache_clear(softpipe->cbuf_cache[i], color, 0);
}
}
d].xyzw[0].i[j] = basevertex;
}
if (shader->info.uses_vertexid_nobase) {
unsigned vid =
machine->SysSemanticToIndex[TGSI_SEMANTIC_VERTEXID_NOBASE];
Reviewed-by: Brian Paul
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emporarily binds the context as the current one. If the contexts
textures are not shared, they'll be deleted. If they are shared, they
won't be deleted. I think that part is fairly straight-forward.
-Brian
Jose
--
stage->point( stage, header );
Reviewed-by: Brian Paul
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gt; 0);
if (info->index_size)
assert(draw->pt.user.elts);
Reviewed-by: Brian Paul
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