On Tue, 11 Jun 2019 at 14:32, Christian König <
ckoenig.leichtzumer...@gmail.com> wrote:
> Am 10.06.19 um 15:56 schrieb Bas Nieuwenhuizen:
> > On Sat, Jun 8, 2019 at 3:36 PM Alex Smith
> wrote:
> >> On Mon, 3 Jun 2019 at 13:27, Koenig, Christian <
> christia
On Mon, 3 Jun 2019 at 13:27, Koenig, Christian
wrote:
> Am 03.06.19 um 14:21 schrieb Alex Smith:
>
> On Mon, 3 Jun 2019 at 11:57, Koenig, Christian
> wrote:
>
>> Am 02.06.19 um 12:32 schrieb Alex Smith:
>> > Put the uncached GTT type at a higher index than the
Thanks, will have a look - can't look right now, will see if I can sometime
tomorrow.
Alex
On Mon, 3 Jun 2019 at 13:27, Koenig, Christian
wrote:
> Am 03.06.19 um 14:21 schrieb Alex Smith:
>
> On Mon, 3 Jun 2019 at 11:57, Koenig, Christian
> wrote:
>
>> Am 02.06.19 u
On Mon, 3 Jun 2019 at 11:57, Koenig, Christian
wrote:
> Am 02.06.19 um 12:32 schrieb Alex Smith:
> > Put the uncached GTT type at a higher index than the visible VRAM type,
> > rather than having GTT first.
> >
> > When we don't have dedicated VRAM, we don't
On Sun, 2 Jun 2019 at 11:59, Bas Nieuwenhuizen
wrote:
> On Sun, Jun 2, 2019 at 12:32 PM Alex Smith
> wrote:
> >
> > Put the uncached GTT type at a higher index than the visible VRAM type,
> > rather than having GTT first.
> >
> > When we don't have de
top (Raven Ridge), this improves average FPS in
the Rise of the Tomb Raider benchmark by up to ~30%. Tested a couple of
other (Feral) games and saw similar improvement on those as well.
Signed-off-by: Alex Smith
---
I noticed that the memory types advertised on my Raven laptop looked a
bit odd so pla
Reviewed-by: Alex Smith
for the series.
On Wed, 9 Jan 2019 at 13:37, Samuel Pitoiset
wrote:
> A simple Vulkan extension that allows apps to query size and
> usage of all exposed memory heaps.
>
> The different usage values are not really accurate because
> they are per drm-fd,
Thanks! I've played around with this a bit and it looks like it's behaving
how I'd expect.
One comment inline below...
On Tue, 8 Jan 2019 at 15:17, Samuel Pitoiset
wrote:
> A simple Vulkan extension that allows apps to query size and
> usage of all exposed memory heaps.
>
> The different usage
On Mon, 7 Jan 2019 at 17:20, Samuel Pitoiset
wrote:
>
> On 1/7/19 6:06 PM, Alex Smith wrote:
>
> Hi Samuel,
>
> Thanks for implementing this - I've been wanting this extension for a
> while so it's good it's finally available.
>
> This is just reporting
Hi Samuel,
Thanks for implementing this - I've been wanting this extension for a while
so it's good it's finally available.
This is just reporting the total heap sizes as the budget, which is the
same info we already get from the basic heap properties. The way I'd
expected budget to work (and wha
Reviewed-by: Alex Smith
On Wed, 5 Dec 2018 at 10:32, Samuel Pitoiset
wrote:
> If the driver used a compute shader for resetting a query pool,
> it should be completed when caches are flushed.
>
> This might reduce the number of stalls if operations are done
> between vkCmdReset
; while CP DMA copies are not. I plan to change this at some point.
>
> Reviewed-by: Samuel Pitoiset
>
> On 12/5/18 10:52 AM, Alex Smith wrote:
> > As done for vkCmdBeginQuery() already. Prevents timestamps from being
> > overwritten by previous vkCmdResetQueryPool() calls i
r for resetting the query
pool")
Signed-off-by: Alex Smith
---
src/amd/vulkan/radv_query.c | 30 +++---
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c
index 550abe307a..e226bcef6a 100644
--- a/src/
On Tue, 4 Dec 2018 at 21:57, Bas Nieuwenhuizen
wrote:
> On Tue, Dec 4, 2018 at 4:52 PM Samuel Pitoiset
> wrote:
> >
> > Because WAIT_REG_MEM can only wait for a 32-bit value, it's not
> > safe to use it for timestamp queries. If we only wait on the low
> > 32 bits of a timestamp query we could b
Tested-by: Alex Smith
Thanks! s/Queryool/QueryPool/ in the subject, btw.
On Tue, 4 Dec 2018 at 15:52, Samuel Pitoiset
wrote:
> Because WAIT_REG_MEM can only wait for a 32-bit value, it's not
> safe to use it for timestamp queries. If we only wait on the low
> 32 bits of a time
Tested-by: Alex Smith
Confirmed it fixes both the testcase and the in-game bug it was causing.
Thanks!
On Tue, 27 Nov 2018 at 08:34, Samuel Pitoiset
wrote:
> cc stable?
>
> Reviewed-by: Samuel Pitoiset
>
> On 11/24/18 11:31 PM, Bas Nieuwenhuizen wrote:
> > Mirrors AMDVLK
it. In either case,
>
> Reviewed-by: Jason Ekstrand
>
> On Thu, Oct 25, 2018 at 5:25 AM Alex Smith
> wrote:
>
>> When depth testing is disabled, we shouldn't pay attention to the
>> specified depthCompareOp, and just treat it as always passing. Before,
>&
_face() would have incorrectly changed passOp to
VK_STENCIL_OP_KEEP.
Signed-off-by: Alex Smith
---
src/intel/vulkan/genX_pipeline.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 33f1f7832a..877a9
Thanks, that's fixed it for me.
On Tue, 23 Oct 2018 at 18:05, Liu, Leo wrote:
> JPEG was added after DRM version 3.26
>
> Signed-off-by: Leo Liu
> Fixes: 4558758c51749(amd/common: add vcn jpeg ip info query)
> Cc: Boyuan Zhang
> Cc: Alex Smith
> ---
> src
Hi,
With this commit, both radeonsi and radv fail to load for me with:
amdgpu: amdgpu_query_hw_ip_info(vcn_jpeg) failed.
If I comment out that query in ac_gpu_info.c, then they work again. I'm
running kernel 4.18.7 with a Vega 64 - is the DRM version check on that
correct?
Thanks,
Alex
On Wed,
and present to a display
connected to an AMD card (tested HD 530 + Vega 64).
v2: Rebase on current master.
Signed-off-by: Alex Smith
---
src/intel/vulkan/anv_wsi_x11.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/vulkan/anv_wsi_x11.c b/src/intel/vulkan
and present to a display
connected to an AMD card (tested HD 530 + Vega 64).
Signed-off-by: Alex Smith
---
src/intel/vulkan/anv_wsi_x11.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/vulkan/anv_wsi_x11.c b/src/intel/vulkan/anv_wsi_x11.c
index 2feb5f1337
This patch never landed in git, is that intentional?
On Mon, 1 Oct 2018 at 17:46, Jason Ekstrand wrote:
> On Sun, Sep 30, 2018 at 1:04 PM Bas Nieuwenhuizen
> wrote:
>
>> ---
>> src/amd/vulkan/radv_device.c | 27 +++
>> src/amd/vulkan/radv_extensions.py | 1 +
>> 2
uot;
Fixes: 7e7ee82698 "ac: add support for 16bit buffer loads"
Cc: "18.2"
Signed-off-by: Alex Smith
---
src/amd/common/ac_nir_to_llvm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index
Fixes the garbage output I was seeing with bloom enabled. Thanks!
Tested-by: Alex Smith
On Wed, 3 Oct 2018 at 20:16, Jason Ekstrand wrote:
> The ssa_for_alu_src helper will correctly handle swizzles and other
> source modifiers for you. The expansions for unpack_hal
Fixes a crash I see on Broadwell.
Tested-by: Alex Smith
Cc to stable for 18.2? The crash is reproducible there as well.
On Tue, 2 Oct 2018 at 23:25, Jason Ekstrand wrote:
> Previously, we just went ahead and emitted MI_BATCH_BUFFER_START as
> normal. If we are near enough to the end
FWIW, putting "RADV" inside the brackets (e.g. " (RADV, LLVM ...)") would
still work for us.
On 17 August 2018 at 10:38, Samuel Pitoiset
wrote:
> Yeah, ignore this patch.
>
> On 8/17/18 11:25 AM, Alex Smith wrote:
>
>> All of our Vulkan games rely on t
All of our Vulkan games rely on the presence of "RADV" somewhere in the
device name string to distinguish between RADV and AMDVLK/GPU-PRO, and
that's used to check whether the driver version is supported, whether to
enable bug workarounds, etc. This will certainly break that.
Thanks,
Alex
On 17 A
According to the spec, these should apply to all read/write access
types (so would be equivalent to specifying all other access types
individually). Currently, they were doing nothing.
v2: Handle VK_ACCESS_MEMORY_WRITE_BIT in dstAccessMask.
Signed-off-by: Alex Smith
Cc: mesa-sta
On 20 July 2018 at 19:01, Jason Ekstrand wrote:
> On Fri, Jul 20, 2018 at 8:37 AM Lionel Landwerlin <
> lionel.g.landwer...@intel.com> wrote:
>
>> On 20/07/18 11:44, Alex Smith wrote:
>>
>> According to the spec, these should apply to all read/write access
&g
According to the spec, these should apply to all read/write access
types (so would be equivalent to specifying all other access types
individually). Currently, they were doing nothing.
Signed-off-by: Alex Smith
Cc: mesa-sta...@lists.freedesktop.org
---
src/intel/vulkan/anv_private.h | 6
FWIW none of our released Vulkan games will be using these functions.
On 29 June 2018 at 03:28, Dieter Nützel wrote:
> Tested-by: Dieter Nützel
>
> on RX 580 with F1 2017.
>
> Dieter
>
>
> Am 28.06.2018 12:21, schrieb Samuel Pitoiset:
>
>> Always emitting a bottom-of-pipe event is quite dumb. I
Hi Dave,
I did a quick test with this on Rise of the Tomb Raider. It reduced the
time taken to create all pipelines for the whole game over 8 threads (with
RADV_DEBUG=nocache) from 12m24s to 11m35s. Nice improvement :)
Also didn't see any issues, so:
Tested-by: Alex Smith
Thanks,
Alex
Reviewed-by: Alex Smith
On 15 June 2018 at 17:52, Eric Engestrom wrote:
> It's a bit late to round up after an integer division.
>
> Fixes: de889794134e6245e08a2 "radv: Implement VK_AMD_shader_info"
> Cc: Alex Smith
> Signed-off-by: Eric Engestrom
> ---
&g
Thanks, I've pushed it.
On 8 June 2018 at 10:38, Lionel Landwerlin
wrote:
> Sorry for missing that.
>
> Fixes: e73d136a023080 ("vulkan/wsi/x11: Implement FIFO mode.")
> Reviewed-by: Lionel Landwerlin
>
>
> On 01/06/18 12:16, Cameron Kumar wrote:
>
>> The queue_manager thread can access the imag
Any feedback on this?
On 1 June 2018 at 12:16, Cameron Kumar wrote:
> The queue_manager thread can access the images from x11_present_to_x11,
> hence this reorder prevents dereferencing of dangling pointers.
>
> Cc: "18.1"
> ---
> src/vulkan/wsi/wsi_common_x11.c | 6 +++---
> 1 file changed, 3
On 1 June 2018 at 22:51, Dylan Baker wrote:
> Quoting Samuel Pitoiset (2018-06-01 08:58:42)
> >
> >
> > On 06/01/2018 05:48 PM, Dylan Baker wrote:
> > > Quoting Alex Smith (2018-06-01 07:56:38)
> > >> On 1 June 2018 at 15:48, Dylan Baker wrote:
> &g
Oops. Thanks for tracking that down.
Reviewed-by: Alex Smith
On 2 June 2018 at 13:31, Bas Nieuwenhuizen wrote:
> Otherwise on pre-GFX9, if the constant layout allows both TESS_EVAL and
> GEOMETRY shaders, but the PIPELINE has only GEOMETRY, it would return the
> GEOMETRY shade
On 1 June 2018 at 16:58, Samuel Pitoiset wrote:
>
>
> On 06/01/2018 05:48 PM, Dylan Baker wrote:
>
>> Quoting Alex Smith (2018-06-01 07:56:38)
>>
>>> On 1 June 2018 at 15:48, Dylan Baker wrote:
>>>
>>> Quoting Alex Smith (2018-
On 1 June 2018 at 15:48, Dylan Baker wrote:
> Quoting Alex Smith (2018-05-31 08:44:18)
> > With GFX9 merged shaders, active_stages would be set to the original
> > stages specified if shaders were not cached, but to the stages still
> > present after merging if they were.
On 31 May 2018 at 21:15, Bas Nieuwenhuizen wrote:
> On Thu, May 31, 2018 at 5:44 PM, Alex Smith
> wrote:
> > This was not previously handled correctly. For example,
> > push_constant_stages might only contain MESA_SHADER_VERTEX because
> > only that stage was change
With GFX9 merged shaders, active_stages would be set to the original
stages specified if shaders were not cached, but to the stages still
present after merging if they were.
Be consistent and use the original stages.
Signed-off-by: Alex Smith
Cc: "18.1"
---
src/amd/vulkan/radv_pipe
This was being handled in a few different places, consolidate it into a
single radv_get_shader() function.
Signed-off-by: Alex Smith
Cc: "18.1"
---
src/amd/vulkan/radv_cmd_buffer.c | 20
src/amd/vulkan/radv_pipeline.c | 38 -
ave made the address get emitted twice.
Signed-off-by: Alex Smith
Cc: "18.1"
---
src/amd/vulkan/radv_cmd_buffer.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index da9591b9a5..c6a2d6c5b
>
> Note that radeonsi doesn't support MSAA images.
>
> Marek
>
> On Wed, May 30, 2018 at 4:48 AM, Alex Smith
> wrote:
>
>> The value returned by tgsi_util_get_texture_coord_dim() does not
>> account for the sample index. This means image_fetch_coords() will n
).
Signed-off-by: Alex Smith
Cc: "18.1"
---
src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index
Any more thoughts on this? Any objections to it going to stable as well (it
fixes bugs, but is quite a large change)?
Thanks,
Alex
On 19 April 2018 at 09:27, Matthew Nicholls
wrote:
> On 18/04/18 22:56, Dave Airlie wrote:
>
> On 18 April 2018 at 00:31, Matthew Nicholls
>> wrote:
>>
>>> Previou
On 10 April 2018 at 15:49, Juan A. Suarez Romero
wrote:
> On Tue, 2018-04-03 at 10:58 +0100, Alex Smith wrote:
> > I don't know exactly what's causing it, no. I noticed the issue was
> fixed on master so just bisected to this.
> >
&
so but presumably you guys
> don't actually know the exact shader combination thats tripping things up?
>
>
> On 03/04/18 19:36, Samuel Pitoiset wrote:
>
>> This fixes a rendering issue with Wolfenstein 2 as well. A backport
>> sounds reasonable to me.
>>
>
Hi Timothy,
This patch fixes some rendering issues I see with RADV on SI.
It doesn't sound like it was really intended to fix anything, so possibly
it's masking some other issue, but would you object to nominating the
series for stable? Applying it on the 18.0 branch fixes the issue there as
well
On 16 March 2018 at 12:46, Juan A. Suarez Romero
wrote:
> On Fri, 2018-03-16 at 13:40 +0100, Juan A. Suarez Romero wrote:
> > On Fri, 2018-03-16 at 12:17 +0000, Alex Smith wrote:
> > > Hi Juan,
> > >
> > > On 16 March 2018 at 11:42, Juan A. Suarez
mp libdrm_amdgpu version requirement.
>
> (cherry picked from commit 52be440f48ac7c337f6604846bb6f0cfd88e7118)
>
>
> commit 6ddf838def69036a48524e2f5ae79fb01170e59c
> Author: Bas Nieuwenhuizen
>
> radv: Always lower indirect derefs after nir_lower_global_vars_to_
> local.
On 13 March 2018 at 19:14, Dave Airlie wrote:
> On 13 March 2018 at 01:38, Alex Smith wrote:
> > From the spec:
> >
> > "When copying between compressed and uncompressed formats the
> > extent members represent the texel dimensions of the source
> &
at we copy the correct number of layers
for 2D to 3D copies.
Fixes: 7b890a36 "radv: Fix vkCmdCopyImage for 2d slices into 3d Images"
Cc:
Signed-off-by: Alex Smith
---
src/amd/vulkan/radv_meta_copy.c | 23 +--
1 file changed, 17 insertions(+), 6 deletions(-)
diff --
Tested-by: Alex Smith
Thanks!
On 9 March 2018 at 16:21, Bas Nieuwenhuizen wrote:
> The vulkan API is not ideal as it does not allow us have a
> shared limit.
>
> Feral needs 15+6 for one of their games, and I'm not a fan
> of overcommitting the limits, so increase the
Ping.
Maybe it'd be better to just increase MAX_DYNAMIC_BUFFERS? I can't see any
side effects of that other than increasing the size of radv_cmd_buffer?
Alex
On 5 March 2018 at 09:59, Alex Smith wrote:
> I just checked what Rise of the Tomb Raider is using. Maximum it hits
Hi Emil,
Just wondering what the status of the 18.0 release is? It's been almost a
month since this last RC.
Thanks,
Alex
On 5 March 2018 at 17:28, Ernst Sjöstrand wrote:
> Is there a lot of new patches queued up before the 18.0 release? In
> that case you could push them to a branch (before t
t;
> On Fri, Mar 2, 2018 at 4:28 PM, Alex Smith
> wrote:
> > These were set to MAX_DYNAMIC_BUFFERS / 2, which is too restrictive
> > since an app may have it's total usage of both uniform and storage
> > within MAX_DYNAMIC_BUFFERS, but exceed the limit for one of the typ
Hi Emil,
On 2 March 2018 at 18:38, Emil Velikov wrote:
> Hi Alex,
>
> On 28 February 2018 at 15:25, Alex Smith
> wrote:
> > Hi,
> >
> > Could this (commit 5d61fa4e68b7eb6d481a37efdbb35fdce675a6ad on master)
> be
> > backported to the 17.3 branch to allow
s are exceeded, so these are firing for something that
actually works just fine.
Set the limit for both to MAX_DYNAMIC_BUFFERS. Not ideal because it
now allows the total across both to exceed the real limit, but we have
no way to express that limit properly.
Cc:
Signed-off-by: Alex Smith
---
src/amd/v
Reviewed-by: Alex Smith
On 1 March 2018 at 09:53, Samuel Pitoiset wrote:
> This is just useless for two reasons:
> 1) flush_bits is not set accordingly, so nothing will be flushed
>in BeginQuery().
> 2) we always flush caches in EndCommandBuffer(), so if a reset
>is don
Hi Samuel,
On 28 February 2018 at 20:47, Samuel Pitoiset
wrote:
> If the query pool has been previously resetted using the compute
> shader path.
>
> v3: set pending_reset_query only for the compute shader path
> v2: handle multiple commands buffers with same pool
>
> Fixes: a41e2e9cf5 ("radv: a
Hi,
Could this (commit 5d61fa4e68b7eb6d481a37efdbb35fdce675a6ad on master) be
backported to the 17.3 branch to allow it to build with LLVM 6?
Thanks,
Alex
On 6 November 2017 at 21:16, Marek Olšák wrote:
> Reviewed-by: Marek Olšák
>
> Marek
>
> On Mon, Nov 6, 2017 at 10:09 PM, Tobias Droste w
That commit is "anv/pipeline: Don't assert on more than 32 samplers"?
https://cgit.freedesktop.org/mesa/mesa/commit/?id=4b69ba381766cd911eb1284f1b0332a139ec8a75
On 25 January 2018 at 22:53, Jason Ekstrand wrote:
> It landed as 4b69ba381766cd911eb1284f1b0332a139ec8a75
>
> On Thu, Jan 25, 2018 at
Tested-by: Alex Smith
This fixes a regression seen after 41c36c45 ("amd/common: use
ac_build_buffer_load() for emitting UBO loads").
On 24 January 2018 at 22:26, Samuel Pitoiset
wrote:
> UBOs are constants buffers.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/am
Reviewed-by: Alex Smith
On 19 January 2018 at 15:14, Samuel Pitoiset
wrote:
> Reviewed-by: Samuel Pitoiset
>
>
> On 01/19/2018 03:11 PM, Matthew Nicholls wrote:
>
>> Cc: mesa-sta...@lists.freedesktop.org
>> ---
>> src/amd/vulkan/radv_meta_clear.c | 6 ++
Oops, sorry about that.
Reviewed-by: Alex Smith
On 18 January 2018 at 01:16, Jason Ekstrand wrote:
> Without this, we may end up dereferencing blend before we check for
> binding->index != UINT32_MAX. However, Vulkan allows the blend state to
> be NULL so long as you don'
gt;num_inline_push_consts
> = remaining_sgprs;
> + }
> +
> + if (user_sgpr_info->num_inline_push_consts
> > AC_UD_MAX_INLINE_PUSH_CONST)
> + user_sgpr_info->
Hi Dave,
This seems to cause some breakage when both push constants and dynamic
descriptors are used.
I've commented 2 fixes inline below needed to avoid a crash, but with those
F1 2017 will still hang pretty quick before the main menu, not sure why so
far. Mad Max is OK but that doesn't use dyna
Thanks Jason. I take it you didn't find any other state that needed
resetting then?
Alex
On 9 January 2018 at 16:49, Jason Ekstrand wrote:
> From: Alex Smith
>
> After executing a secondary command buffer, we need to update certain
> state on the primary command buffer to r
On 6 January 2018 at 01:03, Jason Ekstrand wrote:
> On Tue, Nov 7, 2017 at 3:08 AM, Alex Smith
> wrote:
>
>> Thanks Jason. Can someone push this?
>>
>
> Did you never get push access?
>
I did - this is commit e9eb3c4753e4f56b03d16d8d6f71d49f1e7b97db.
Thanks
On 5 January 2018 at 21:43, Jason Ekstrand wrote:
> On Fri, Jan 5, 2018 at 9:06 AM, Alex Smith
> wrote:
>
>> This was never enabled in secondary buffers because hiz_enabled was
>> never set to true for those.
>>
>> If the app provides a framebuffer in the inh
command buffer.
This improves performance by ~13% on an internal benchmark on Skylake.
v2: Use anv_cmd_buffer_get_depth_stencil_view().
Signed-off-by: Alex Smith
Reviewed-by: Lionel Landwerlin
---
src/intel/vulkan/genX_cmd_buffer.c | 22 +-
1 file changed, 21 insertions(+), 1
Landwerlin
>
> Thanks!
>
>
> On 05/01/18 11:20, Alex Smith wrote:
>
>> This was never enabled in secondary buffers because hiz_enabled was
>> never set to true for those.
>>
>> If the app provides a framebuffer in the inheritance info when beginning
>>
command buffer.
This improves performance by ~13% on an internal benchmark on Skylake.
Signed-off-by: Alex Smith
---
src/intel/vulkan/genX_cmd_buffer.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan
account in this function. This
is consistent with how things are done on i965.
Signed-off-by: Alex Smith
Cc: mesa-sta...@lists.freedesktop.org
---
src/intel/vulkan/genX_pipeline.c | 27 ++-
1 file changed, 18 insertions(+), 9 deletions(-)
diff --git a/src/intel/vulkan
command buffers in some cases.
Signed-off-by: Alex Smith
Cc: mesa-sta...@lists.freedesktop.org
---
src/intel/vulkan/genX_cmd_buffer.c | 8
1 file changed, 8 insertions(+)
diff --git a/src/intel/vulkan/genX_cmd_buffer.c
b/src/intel/vulkan/genX_cmd_buffer.c
index 0bd3874db7..f6129f9d67
Fixes hangs seen due to the lock not being released here.
Signed-off-by: Alex Smith
Cc: mesa-sta...@lists.freedesktop.org
---
src/intel/vulkan/anv_allocator.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_allocator.c b/src/intel/vulkan
Nice - this does fix the issue I was seeing, thanks.
Can at least patches 2 and 3 go to stable?
On 21 December 2017 at 01:50, Dave Airlie wrote:
> This series fixes about 340 CTS tests on Vega that involve 3D images.
>
> The two main things are to use 3D samplers for copy paths sources that
> a
to 2D samplers) is expected to work
- see VK_IMAGE_CREATE_2D_ARRAY_COMPATIBLE_BIT_KHR. Is there no way to make
that work on GFX9?
Thanks,
Alex
On 20 December 2017 at 14:49, Alex Smith
wrote:
> Tested-by: Alex Smith
>
> Fixes 3D texture contents being captured incorrectly in RenderDoc for
Tested-by: Alex Smith
Fixes 3D texture contents being captured incorrectly in RenderDoc for me.
On 19 December 2017 at 07:36, Dave Airlie wrote:
> From: Dave Airlie
>
> On GFX9 we must access 3D textures with 3D samplers AFAICS.
>
> Thi
Tested-by: Alex Smith
On 15 December 2017 at 15:01, Samuel Pitoiset
wrote:
> This reverts commit 2294d35b243dee15af15895e876a63b7d22e48cc.
>
> We can't do this without adjusting the input SGPRs/VGPRs logic.
> For now, just revert it. I will send a proper solution late
Pushed.
On 6 December 2017 at 17:35, Matt Turner wrote:
> On Wed, Dec 6, 2017 at 3:55 AM, James Legg
> wrote:
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104119
> > CC:
> > CC: Samuel Pitoiset
> > ---
> > src/compiler/nir/nir_opcodes.py | 4 ++--
> > 1 file changed, 2 insertio
Allows apps to determine the LLVM version so that they can decide
whether or not to enable workarounds for LLVM issues.
Signed-off-by: Alex Smith
Cc: "17.2 17.3"
---
src/amd/vulkan/radv_device.c | 61 +--
src/amd/vulkan/radv_private.h | 2 +
Good point :) Will do soon.
On 7 November 2017 at 15:46, Jason Ekstrand wrote:
> Reviewed-by: Jason Ekstrand
>
> Given that you already have 27 non-trivial commits in mesa, I think now
> would be a good time to apply for commit access. :-)
>
> On Tue, Nov 7, 2017 at 2
Thanks Jason. Can someone push this?
On 6 November 2017 at 16:21, Jason Ekstrand wrote:
> On Mon, Nov 6, 2017 at 2:37 AM, Alex Smith
> wrote:
>
>> We should use the result type of the OpSampledImage opcode, rather than
>> the type of the underlying image/samplers.
>>
Gather operations in both GLSL and SPIR-V require a sampler. Fixes
gathers returning garbage when using separate texture/samplers (on AMD,
was using an invalid sampler descriptor).
Signed-off-by: Alex Smith
Cc: "17.2 17.3"
---
src/compiler/nir/nir.h| 1 -
src/comp
On 7 November 2017 at 09:28, Samuel Pitoiset
wrote:
>
>
> On 11/07/2017 10:18 AM, Michel Dänzer wrote:
>
>> On 07/11/17 10:08 AM, Samuel Pitoiset wrote:
>>
>>> It seems safe and it improves performance by +4% (73->76).
>>>
>>> Signed-off-by: Samuel Pitoiset
>>> ---
>>> src/amd/vulkan/radv_devi
the wrong LLVM intrinsics being emitted by RADV.
Signed-off-by: Alex Smith
Cc: "17.2 17.3"
---
src/compiler/spirv/spirv_to_nir.c | 10 --
src/compiler/spirv/vtn_private.h | 1 +
src/compiler/spirv/vtn_variables.c | 1 +
3 files changed, 6 insertions(+), 6 deletions(-)
di
Hi Samuel,
D16_UNORM support is mandatory on 2D images according to the spec
("Features, Limits and Formats" chapter).
Thanks,
Alex
On 3 November 2017 at 10:02, Samuel Pitoiset
wrote:
> TC compatible HTILE only supports D32_SFLOAT on VI, while GFX9
> supports both. This is a recommandation for
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103513
Fixes: de889794134e ("radv: Implement VK_AMD_shader_info")
Signed-off-by: Alex Smith
---
src/amd/vulkan/radv_shader.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_shader.c b/src/
t the shader debug info when
we retrieve cached shaders.
v2: Improvements to resource usage reporting
v3: Disassembly string must be null terminated (string_buffer's length
does not include the terminator)
Signed-off-by: Alex Smith
---
src/amd/vulkan/radv_device.c | 9 ++
src/
t the shader debug info when
we retrieve cached shaders.
v2: Improvements to resource usage reporting
Signed-off-by: Alex Smith
---
src/amd/vulkan/radv_device.c | 9 ++
src/amd/vulkan/radv_extensions.py| 1 +
src/amd/vulkan/radv_pipeline.c | 2 +-
src/amd/v
On 25 October 2017 at 21:58, Bas Nieuwenhuizen
wrote:
> On Wed, Oct 25, 2017 at 4:03 PM, Samuel Pitoiset
> wrote:
> >
> >
> > On 10/25/2017 02:20 PM, Alex Smith wrote:
> >>
> >> On 25 October 2017 at 12:46, Samuel Pitoiset >> <mailto:samu
that if we've spilled then we've used all available
registers, so if numUsed{V,S}gprs is greater than the number available,
then you'd know that the number spilled is the difference between the two.
Can we have spilling when num_{v,s}gprs is less than the number available?
Alex
>
t the shader debug info when
we retrieve cached shaders.
Signed-off-by: Alex Smith
---
src/amd/vulkan/radv_device.c | 9 ++
src/amd/vulkan/radv_extensions.py| 1 +
src/amd/vulkan/radv_pipeline.c | 2 +-
src/amd/vulkan/radv_pipeline_cache.c | 11 ++-
src/amd/vulkan/radv_priv
Signed-off-by: Alex Smith
---
include/vulkan/vulkan.h| 50 +-
src/vulkan/registry/vk.xml | 159 +
2 files changed, 181 insertions(+), 28 deletions(-)
diff --git a/include/vulkan/vulkan.h b/include/vulkan/vulkan.h
index e1398c68ba
Forgot to add
Cc: "17.2 17.3"
On 25 October 2017 at 11:24, Matthew Nicholls <
mnicho...@feralinteractive.com> wrote:
> ---
> src/amd/common/ac_nir_to_llvm.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to
ry (we either create all or none of the variants), but
fix this anyway in case things change later.
Signed-off-by: Alex Smith
---
src/amd/vulkan/radv_pipeline_cache.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/amd/vulkan/radv_pipeline_cache.c
b/src/amd/vulkan/radv_pipeline_cach
nes in
> > parallel, which appeared to be due to invalid shader code being pulled
> > from the cache.
> >
> > Signed-off-by: Alex Smith
> > ---
> > src/amd/vulkan/radv_pipeline_cache.c | 30
> +++---
> > 1 file changed, 23 inser
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