From: Mathias Fröhlich
Hi Brian,
Following a small optimization in the gallium state tracker to
avoid flagging ST_NEW_VERTEX_ARRAYS a bit more often:
please review!
best
Mathias
Since using bitmasks we can easily check if we have any
current value that is potentially uploaded on array set
From banging at ES3 FBOs, about 1/4 of the render target bits have now
been identified; the headers/driver/pandecode have been updated
accordingly. Some assorted new texture formats have been added in
tandem, products of the render target work.
Alyssa Rosenzweig (3):
panfrost: Add RGB555, RGB5A1
Signed-off-by: Alyssa Rosenzweig
---
src/gallium/drivers/panfrost/include/panfrost-job.h | 2 ++
src/gallium/drivers/panfrost/pan_pretty_print.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/src/gallium/drivers/panfrost/include/panfrost-job.h
b/src/gallium/drivers/panfrost/include/p
Signed-off-by: Alyssa Rosenzweig
---
src/gallium/drivers/panfrost/include/panfrost-job.h | 3 +++
src/gallium/drivers/panfrost/pan_format.c | 2 ++
src/gallium/drivers/panfrost/pan_pretty_print.c | 1 +
3 files changed, 6 insertions(+)
diff --git a/src/gallium/drivers/panfrost/incl
On MRT-capable systems, the framebuffer format is encoded as a 64-bit
word in the render target descriptor. Previously, the two 32-bit
words were exposed as opaque hex values. This commit identifies a 12-bit
Mali swizzle and a 2-bit channel counter, removing some of the magic. It
also adds decoding
https://bugs.freedesktop.org/show_bug.cgi?id=109757
Bug ID: 109757
Summary: Rename src/vulkan/overlay-layer/README to
src/vulkan/overlay-layer/README.md
Product: Mesa
Version: git
Hardware: All
OS: All
These ops were discovered by invoking the correspondingly names GLSL
functions. The rounding ops here behave exact as expected and are mapped
to their corresponding NIR ops where applicable. The ffma behaves as a
LUT instruction and requires some special argument packing (since
Midgard normally onl
https://bugs.freedesktop.org/show_bug.cgi?id=109747
--- Comment #4 from Shmerl ---
Also, it would be good to be able to control what to display with a parameter,
same as it's done for submit, draw and etc. rather than display anything
unconditionally.
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https://bugs.freedesktop.org/show_bug.cgi?id=109747
--- Comment #3 from Shmerl ---
Thanks!
Is there some way to also add graphs similar to GALLIUM_HUD, or it needs more
features to implement first?
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On 23/2/19 4:09 pm, Ian Romanick wrote:
From: Ian Romanick
I noticed this while looking at a shader that was affected by Tim's
"more loop unrolling" series.
All Gen6+ platforms had similar results. (Skylake shown)
total instructions in shared programs: 15437001 -> 15435259 (-0.01%)
instructi
https://bugs.freedesktop.org/show_bug.cgi?id=109747
--- Comment #2 from osch...@web.de ---
fps is implemented with:
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/303
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A pipe_resource can be shared by all the pipe_context's hanging off the
same pipe_screen.
Changes from v2 -> v3:
- add locking with mtx_*() to resource and screen (Marek)
Changes from v3 -> v4:
- drop rsc->lock, just use screen->lock for the entire serialization (Marek)
- simplify etna_resource
That make me think that I have some algebraic patches too.
Reviewed-by: Elie Tournier
On Saturday, 23 February 2019, Ian Romanick wrote:
> From: Ian Romanick
>
> I noticed this while looking at a shader that was affected by Tim's
> "more loop unrolling" series.
>
> All Gen6+ platforms had sim
On 23/2/19 12:07, apinheiro wrote:
Reviewed-by: Alejandro Piñeiro
Well, just in case, shouldn't be unnecessarily instead of unnecissarily?
On 23/2/19 6:14, Jason Ekstrand wrote:
---
src/compiler/nir/nir_split_vars.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/compile
Reviewed-by: Alejandro Piñeiro
On 23/2/19 6:14, Jason Ekstrand wrote:
---
src/compiler/nir/nir_split_vars.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/compiler/nir/nir_split_vars.c
b/src/compiler/nir/nir_split_vars.c
index 244ffd6dcf0..96b6042e6d9 100644
--- a/src/compile
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