patches 10-14 are:
Reviewed-by: Timothy Arceri
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Patches 4-7:
Reviewed-by: Timothy Arceri
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On 30/06/18 00:28, Alejandro Piñeiro wrote:
From: Antia Puentes
When constructing NIR if we have a SPIR-V uint variable and the
storage class is SpvStorageClassAtomicCounter, we store as NIR's
glsl_type an atomic_uint to reflect the fact that the variable is an
atomic counter.
However, we were
NAK this shouldn't be needed.
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On 30/06/18 00:28, Alejandro Piñeiro wrote:
For the cases of uniforms that doesn't have an explicit
location. Under ARB_gl_spirv those are exceptions, like uniform atomic
counters.
---
src/compiler/glsl/gl_nir_link_uniforms.c | 31 +--
1 file changed, 17 insertions(
On 30/06/18 00:28, Alejandro Piñeiro wrote:
This includes:
* Move the defition of empty_uniform_block to linker_util.h
* Move find_empty_block (with a rename) to linker_util.h
* Refactor some code at linker.cpp to a new method at linker_util.h
(link_util_update_empty_uniform_locat
On 30/06/18 16:05, Timothy Arceri wrote:
On 30/06/18 00:28, Alejandro Piñeiro wrote:
ARB_gl_spirv points that uniforms in general need explicit
location. But there are still some cases of uniforms without location,
like for example uniform atomic counters. Those doesn't have a
location from th
On 30/06/18 00:28, Alejandro Piñeiro wrote:
ARB_gl_spirv points that uniforms in general need explicit
location. But there are still some cases of uniforms without location,
like for example uniform atomic counters. Those doesn't have a
location from the OpenGL point of view (they are identified
Series:
Reviewed-by: Timothy Arceri
On 30/06/18 13:44, Jason Ekstrand wrote:
---
src/intel/vulkan/anv_device.c | 36 ++
src/intel/vulkan/anv_pipeline_cache.c | 98 ---
src/intel/vulkan/anv_private.h| 3 +
3 files changed, 126 insertions(+),
On Fri, Jun 29, 2018 at 9:56 PM, Timothy Arceri
wrote:
> On 30/06/18 10:13, Jason Ekstrand wrote:
>
>> This pass searches for reasonably large local variables which can be
>> statically proven to be constant and moves them into shader constant
>> data. This is especially useful when large tables
Reviewed-by: Timothy Arceri
On 30/06/18 14:59, Marek Olšák wrote:
From: Marek Olšák
Shaders that need special code for external samplers were broken if
they were loaded from the cache.
Cc: 18.1
---
src/compiler/glsl/serialize.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/
From: Marek Olšák
Shaders that need special code for external samplers were broken if
they were loaded from the cache.
Cc: 18.1
---
src/compiler/glsl/serialize.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/compiler/glsl/serialize.cpp b/src/compiler/glsl/serialize.cpp
index 9c21
On 30/06/18 10:13, Jason Ekstrand wrote:
This pass searches for reasonably large local variables which can be
statically proven to be constant and moves them into shader constant
data. This is especially useful when large tables are baked into the
shader source code because they can be moved int
From: Marek Olšák
This removes some ugly code around module initialization.
---
Dave, please rebase your code on top of this, and we don't need triple
and data_layout in ac_llvm_compiler_info.
src/amd/common/ac_llvm_helper.cpp | 10 ++
src/amd/common/ac_llvm_util.h
I wonder if we can somehow make the TLS magic apply to RADV only.
Radeonsi can do it without TLS. Then, the RADV-specific TLS code can be
moved to RADV, and other code (if any) can be shared.
It doesn't make much sense to do the TLS initialization in
ac_llvm_compiler_init. It could be done in comp
On Tue, Jun 26, 2018 at 11:58 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> The new structs are pretty much based on the radeonsi code,
> so it just ports over the uses to them.
> ---
> src/gallium/drivers/radeonsi/si_compute.c | 2 +-
> src/gallium/drivers/radeonsi/si_pipe.c| 50 +
I've been resisting this for a long time and I'm still a bit grumpy about
it but I think Pierre-Loup has convinced me that it really is needed for
steam shader caching. This series gives apps that don't use a pipeline
cache a default in-memory cache as well as backing them with the disk cache
in c
---
src/intel/vulkan/anv_device.c | 36 ++
src/intel/vulkan/anv_pipeline_cache.c | 98 ---
src/intel/vulkan/anv_private.h| 3 +
3 files changed, 126 insertions(+), 11 deletions(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_de
If a client is dumb enough to not specify a pipeline cache, give it a
default. We have to create one anyway for blorp so we may as well let
the client cache shaders in it.
---
src/intel/vulkan/anv_blorp.c | 12 +---
src/intel/vulkan/anv_device.c | 7 +++
src/intel/vu
---
src/intel/vulkan/anv_pipeline_cache.c | 29 ++-
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git a/src/intel/vulkan/anv_pipeline_cache.c
b/src/intel/vulkan/anv_pipeline_cache.c
index 2bc64f5bdd1..e57cd1c75c6 100644
--- a/src/intel/vulkan/anv_pipeline_cache
Before, we were only hashing the shader if we had a shader cache to
cache things in. This means that if we ever get it wrong, we could end
up trying to cache a shader with an undefined hash. Since not having a
shader cache is an extremely uncommon case, let's optimize for code
clarity and obvious
---
src/intel/vulkan/anv_pipeline.c | 127 ++
src/intel/vulkan/anv_pipeline_cache.c | 34 +++
src/intel/vulkan/anv_private.h| 16
3 files changed, 98 insertions(+), 79 deletions(-)
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv
Previously, we just hashed the entire descriptor set layout verbatim.
This meant that a bunch of extra stuff such as pointers and reference
counts made its way into the cache. It also meant that we weren't
properly hashing in the Y'CbCr conversion information information from
bound immutable sampl
On Tue, Jun 26, 2018 at 11:58 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> This creates a common per-thread compiler info struct, and adds
> the init code to it. This is mostly ported from radeonsi.
>
> The common info struct is used in radv first and replaces the
> current code.
> ---
> src/a
On Tue, Jun 26, 2018 at 11:58 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> This just splits out the non-shared code and reuses ac_get_llvm_target in
> radv.
> ---
> src/amd/common/ac_llvm_util.c | 6 --
> src/amd/common/ac_llvm_util.h | 2 ++
> src/amd/vulkan/radv_shad
We already guarded all OP_SULDP against out of bound accesses, but those
ended up just reusing whatever value was stored in the dest registers.
fixes CTS test shader_image_load_store.incomplete_textures
v2: fix for loads not ending up with predicates (bindless_texture)
Signed-off-by: Karol Herbs
I've sent some minor nits. Otherwise the series looks good, although I
did only skim most of the actual new i965 blob changes. Series:
Reviewed-by: Timothy Arceri
You might want to wait for Tapani to take a look also.
On 15/05/18 02:52, Jordan Justen wrote:
Signed-off-by: Jordan Justen
---
On 15/05/18 02:52, Jordan Justen wrote:
We will need to populate the default key for ARB_get_program_binary to
allow us to retrieve the default gen program to store save in the
store save - > store ???
program binary.
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_cs.c
On 15/05/18 02:52, Jordan Justen wrote:
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_program_cache.c | 15 +++
src/mesa/drivers/dri/i965/brw_state.h | 2 ++
2 files changed, 17 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_program_cache.c
b
The subject line contains i965:
On 15/05/18 02:52, Jordan Justen wrote:
Signed-off-by: Jordan Justen
---
src/mesa/state_tracker/st_context.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/state_tracker/st_context.c
b/src/mesa/state_tracker/st_context.c
index ee76e07a7d1..0d0
This pass searches for reasonably large local variables which can be
statically proven to be constant and moves them into shader constant
data. This is especially useful when large tables are baked into the
shader source code because they can be moved into a UBO by the driver to
reduce register pr
According to RenderDoc, this shaves 99.6% of the run time off of the
ambient occlusion pass in Skyrim Special Edition when running under DXVK
and shaves 92% off the runtime for a reasonably representative frame.
When running the actual game, Skyrim goes from being a slide-show to a
very stable and
This commit adds a concept to NIR of having a blob of constant data
associated with a shader. Instead of being a UBO or uniform that can be
manipulated by the client, this constant data considered part of the
shader and remains constant across all invocations of the given shader
until the end of t
---
src/compiler/nir/nir.h | 2 ++
src/compiler/nir/nir_deref.c | 18 ++
2 files changed, 20 insertions(+)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index c16ce547642..e35bef612df 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -987,6
---
.../vulkan/anv_nir_apply_pipeline_layout.c| 47
src/intel/vulkan/anv_private.h| 1 +
src/intel/vulkan/genX_cmd_buffer.c| 72 ++-
3 files changed, 101 insertions(+), 19 deletions(-)
diff --git a/src/intel/vulkan/anv_nir_apply_pipeli
These are very similar to the related function in nir_lower_io except
that they don't handle per-vertex or packed things (that could be added,
in theory) and they take a more detailed size/align function pointer.
One day, we should consider switching nir_lower_io over to using the
more detailed siz
---
src/intel/vulkan/anv_blorp.c | 1 +
src/intel/vulkan/anv_pipeline.c | 16
src/intel/vulkan/anv_pipeline_cache.c | 27 +++
src/intel/vulkan/anv_private.h| 6 ++
4 files changed, 50 insertions(+)
diff --git a/src/intel/vulkan
The size and alignment are "natural" in the sense that everything is
aligned to a scalar. This is a bit tighter than std430 where vec3s are
required to be aligned to a vec4.
---
src/compiler/nir_types.cpp | 56 ++
src/compiler/nir_types.h | 6
2 files c
---
src/util/macros.h | 3 +++
src/util/ralloc.c | 2 --
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/util/macros.h b/src/util/macros.h
index 6d3df904082..95b86c7a31a 100644
--- a/src/util/macros.h
+++ b/src/util/macros.h
@@ -285,6 +285,9 @@ do { \
#def
This little series adds an optimization pass to NIR and wires up up in anv
that moves large constant variables to a UBO. This fixes a farily common
case in some filter or ambient occlusion shaders where they put some sort
of look-up table in the shader itself. This series takes Skyrim Special
Edi
We store those arrays in local memory and reserve some space for each of the
arrays. With NIR we could store those arrays packed, but we don't do that yet
as it causes MemoryOpt to generate unaligned memory accesses.
v3: use fixed size vec4 arrays until we fix MemoryOpt
v4: fix for 64 bit types
v5
v3: fix compiler warnings
v4: use loadFrom helper
v5: fix signed min/max
v6: set tex mask
add support for indirect image access
set cache mode
v7: make compatible with 884d27bcf688d36c3bbe01bceca525595add3b33
rework the whole deref thing to prepare for bindless
v8: port to deref instruc
v5: add more barrier intrinsics
Signed-off-by: Karol Herbst
---
.../nouveau/codegen/nv50_ir_from_nir.cpp | 19 +++
1 file changed, 19 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.
Signed-off-by: Karol Herbst
---
src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 8
1 file changed, 8 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
index f4875113d00..ed2453136fd
v4: use loadFrom helper
v5: support indirect buffer access
v8: don't require C++11 features
Signed-off-by: Karol Herbst
---
.../nouveau/codegen/nv50_ir_from_nir.cpp | 90 +++
1 file changed, 90 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.
a lot of those fields are not valid for a lot of tex ops. Not quite sure if
it's worth the effort to check for those or just keep it like that. It seems
to kind of work.
v2: reworked offset handling
add tex support with indirect R/S arguments
handle GLSL_SAMPLER_DIM_EXTERNAL
drop refer
Signed-off-by: Karol Herbst
---
.../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 14 ++
1 file changed, 14 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
index a410468fd50..2047abdf37
v2: use mkOp
v8: don't require C++11 features
Signed-off-by: Karol Herbst
---
.../drivers/nouveau/codegen/nv50_ir_from_nir.cpp| 13 +
1 file changed, 13 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
b/src/gallium/drivers/nouveau/codegen/nv5
v2: add support for geometry shaders
set idx
add some missing mappings
fix for 64bit inputs/outputs
fix up some FP color output index messup
parse centroid flag
v3: fix arrays in outputs as well
fix input/ouput size calculation for tessellation shaders
v4: add getSlotAddress
v4: use loadFrom helper
v8: don't require C++11 features
Signed-off-by: Karol Herbst
---
.../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 14 ++
1 file changed, 14 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
b/src/gallium/drivers/nouveau/
v2: support more sys values
fixed a bug where for multi component reads all values ended up in x
v3: add load_patch_vertices_in
v4: add subgroup stuff
v5: add helper invocation
v6: fix loading 64 bit system values
v8: don't require C++11 features
Signed-off-by: Karol Herbst
---
.../nouveau/c
v3: add workaround for RA issues
indirects have to be multiplied by 0x10
fix indirect access
v4: use smarter getIndirect helper
use storeTo helper
v5: don't use const_offset directly
v8: don't require C++11 features
Signed-off-by: Karol Herbst
---
.../nouveau/codegen/nv50_ir_from_nir
v8: don't require C++11 features
Signed-off-by: Karol Herbst
---
.../nouveau/codegen/nv50_ir_from_nir.cpp | 72 +++
1 file changed, 72 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir
v7: don't assert in default case
Signed-off-by: Karol Herbst
---
.../nouveau/codegen/nv50_ir_from_nir.cpp | 22 +++
1 file changed, 22 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir
v2: add vote_eq support
use the new subop intrinsic helper
add ballot
v3: add read_(first_)invocation
v8: handle vectorized intrinsics
don't require C++11 features
Signed-off-by: Karol Herbst
---
.../nouveau/codegen/nv50_ir_from_nir.cpp | 44 +++
1 file changed,
v4: use smarter getIndirect helper
use new getSlotAddress helper
use loadFrom helper
v8: don't require C++11 features
Signed-off-by: Karol Herbst
---
.../nouveau/codegen/nv50_ir_from_nir.cpp | 27 +++
1 file changed, 27 insertions(+)
diff --git a/src/gallium/drivers
v4: use smarter getIndirect helper
use new getSlotAddress helper
v5: use loadFrom helper
v8: don't require C++11 features
Signed-off-by: Karol Herbst
---
.../nouveau/codegen/nv50_ir_from_nir.cpp | 23 +++
1 file changed, 23 insertions(+)
diff --git a/src/gallium/drivers
v2: parse a few more fields
v3: add special handling for GL_ISOLINES
v8: set info->prop.fp.readsSampleLocations
don't require C++11 features
Signed-off-by: Karol Herbst
---
.../nouveau/codegen/nv50_ir_from_nir.cpp | 325 +-
1 file changed, 323 insertions(+), 2 deletions(
v2: use new getIndirect helper
fixes symbols for 64 bit types
v4: use smarter getIndirect helper
simplify address calculation
use loadFrom helper
v8: don't require C++11 features
Signed-off-by: Karol Herbst
---
.../drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 10 ++
1
v4: treat imul as unsigned
v5: remove pointless !!
v7: inot is unsigned as well
v8: don't require C++11 features
Signed-off-by: Karol Herbst
---
.../nouveau/codegen/nv50_ir_from_nir.cpp | 115 ++
1 file changed, 115 insertions(+)
diff --git a/src/gallium/drivers/nouveau/cod
v3: and load_output
v4: use smarter getIndirect helper
use new getSlotAddress helper
v5: don't use const_offset directly
fix for indirects
v6: add support for interpolateAt
v7: fix compiler warnings
add load_barycentric_sample
handle load_output for fragment shaders
v8: set info->pr
not all those nir options are actually required, it just made the work a
little easier.
v2: fix asserts
parse compute shaders
don't lower bitfield_insert
v3: fix memory leak
v4: don't lower fmod32
v5: set lower_all_io_to_temps to false
fix memory leak because we take over ownership of
v2: add constant_folding
v6: print non final NIR only for verbose debugging
v8: add passes we will need for OpenCL compute shaders
Signed-off-by: Karol Herbst
---
.../nouveau/codegen/nv50_ir_from_nir.cpp | 41 +++
1 file changed, 41 insertions(+)
diff --git a/src/gallium/dr
v2: add helper function for indirects
v4: add new getIndirect overload for easier use
v5: use getSSA for ssa values
we can just create the values for unassigned registers in getSrc
v6: always create at least 32 bit values
v8: don't require C++11 features
Signed-off-by: Karol Herbst
---
.../n
v2: user bitfield_insert instead of bfi
rework switch helper macros
remove some lowering code (LoweringHelper is now used for this)
v3: add pack_half_2x16_split
add unpack_half_2x16_split_x/y
v5: replace first argument with nullptr in loadImm calls
prefer getSSA over getScratch
v8:
Signed-off-by: Karol Herbst
---
.../nouveau/codegen/nv50_ir_from_nir.cpp| 17 +
1 file changed, 17 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
index 3084f32abb4..a990acfc35
v8: fix loading 8/16 bit constants
Signed-off-by: Karol Herbst
---
.../nouveau/codegen/nv50_ir_from_nir.cpp | 28 +++
1 file changed, 28 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_n
this makes debugging the shader header a little easier
Acked-by: Pierre Moreau
Signed-off-by: Karol Herbst
---
src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
b/src/gallium/drivers/nouveau/nvc0/
Signed-off-by: Karol Herbst
---
src/gallium/drivers/nouveau/nouveau_screen.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/nouveau_screen.c
b/src/gallium/drivers/nouveau/nouveau_screen.c
index 03c1c74160f..7acf2050f10 100644
--- a/src/galliu
I think this is finally getting complete. There are a handful of piglit and
CTS regressions, but those are caused by issues in common nir and gallium code.
Some features remain disabled like bindless textures, because there is more
ground work needed to be able to properly do it with nir.
Changes
v2: remove TGSI related bits
Signed-off-by: Karol Herbst
Reviewed-by: Pierre Moreau
---
src/gallium/drivers/nouveau/Makefile.sources | 2 +
.../nouveau/codegen/nv50_ir_from_common.cpp | 107 ++
.../nouveau/codegen/nv50_ir_from_common.h | 58 ++
.../nouveau/code
this is mostly usefull for lazy IR converters not wanting to deal with 64 bit
lowering and other illegal stuff
v5: also handle SAT
v6: rename type variables
fixed lowering of NEG
add lowering of NOT
v8: don't require C++11 features
Signed-off-by: Karol Herbst
---
src/gallium/drivers/nou
From: Connor Abbott
In order to reduce moves when coalescing multiple registers into a
larger register, RA will try to coalesce MERGE instructions with their
definitions. For example, for something like this in GLSL:
uint a = ...;
uint b = ...;
uint64 x = packUint2x32(a, b);
The compiler will t
v2: allow for non debug builds as well
v3: move reading out env var more global
disable tg4 with multiple offsets with nir
disable caps for 64 bit types
v6: nv50 support
disable MS images
disable bindless textures
Signed-off-by: Karol Herbst
---
src/gallium/drivers/nouveau/nouvea
Quoting Ilia Mirkin (2018-06-29 14:48:30)
> On Fri, Jun 29, 2018 at 2:00 PM, Dylan Baker wrote:
> > Hi List,
> >
> > Mesa 18.1.3 is now available. This is a bug fix point release in the 18.1
> > series.
> >
> > In this release we have:
> > - numerous fixes for radv
> > - some fixes for common ra
https://bugs.freedesktop.org/show_bug.cgi?id=77449
Bug 77449 depends on bug 99813, which changed state.
Bug 99813 Summary: F1 2015 rendering broken at medium quality
https://bugs.freedesktop.org/show_bug.cgi?id=99813
What|Removed |Added
-
Am Freitag, den 29.06.2018, 17:42 +0200 schrieb Roland Scheidegger:
[...]
Thanks for the review
>
> So for gather4_O (where you'd need to do it differently) it must not
> be
> done, but for gather4 it has to be done?
> Still doesn't make all that much sense to me. The hw may be weird but
> I don
On Fri, Jun 29, 2018 at 2:00 PM, Dylan Baker wrote:
> Hi List,
>
> Mesa 18.1.3 is now available. This is a bug fix point release in the 18.1
> series.
>
> In this release we have:
> - numerous fixes for radv
> - some fixes for common radeon code
> - several meson fixes
> - fixes for autotools
https://bugs.freedesktop.org/show_bug.cgi?id=106842
Andre Klapper changed:
What|Removed |Added
Component|Demos |Two
QA Contact|mesa-dev@lists.f
Hi Tom,
We shouldn't use gallivm if possible and instead c++ helpers should be
added into ac_llvm_helper.cpp with the ac prefix. With that done:
Reviewed-by: Marek Olšák
Thanks,
Marek
On Tue, Jun 26, 2018 at 11:00 PM, Tom Stellard wrote:
> R600_DEBUG=gisel will tell LLVM to use GlobalISel rat
For the series:
Reviewed-by: Marek Olšák
Marek
On Tue, Jun 26, 2018 at 4:30 PM, Denis Pauk wrote:
> v2: none
> v3: none
>
> Signed-off-by: Denis Pauk
> CC: Marek Olšák
> CC: Rhys Perry
> CC: Matt Turner
> ---
> src/gallium/drivers/llvmpipe/lp_screen.c | 3 +--
> src/gallium/drivers/l
For the series:
Reviewed-by: Marek Olšák
Marek
On Fri, Jun 22, 2018 at 9:59 AM, Tomeu Vizoso
wrote:
> and PIPE_FORMAT_R8G8B8A8_SRGB, as well.
>
> The reason for this is that when Virgl runs with GLES on the host, it
> cannot directly upload textures in BGRA.
>
> So to avoid a conversion step,
On Fri, Jun 22, 2018 at 9:59 AM, Tomeu Vizoso
wrote:
> If the driver doesn't support PIPE_FORMAT_B8G8R8A8_SRGB, fall back to
> PIPE_FORMAT_R8G8B8A8_SRGB.
>
> Drivers such as Virgl will have a hard time supporting
> PIPE_FORMAT_B8G8R8A8_SRGB when the host runs GLES, as GL_ABGR isn't as
> well supor
On Friday, June 29, 2018 11:39:34 AM PDT Caio Marcelo de Oliveira Filho wrote:
> ---
> src/mesa/drivers/dri/i965/genX_state_upload.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c
> b/src/mesa/drivers/dri/i965/genX_state_upl
According to RenderDoc, this shaves 99.6% of the run time off of the
ambient occlusion pass in Skyrim Special Edition when running under DXVK
and shaves 92% off the runtime for a reasonably representative frame.
When running the actual game, Skyrim goes from being a slide-show to a
very stable and
---
.../vulkan/anv_nir_apply_pipeline_layout.c| 47
src/intel/vulkan/anv_private.h| 1 +
src/intel/vulkan/genX_cmd_buffer.c| 72 ++-
3 files changed, 101 insertions(+), 19 deletions(-)
diff --git a/src/intel/vulkan/anv_nir_apply_pipeli
This pass searches for reasonably large local variables which can be
statically proven to be constant and moves them into shader constant
data. This is especially useful when large tables are baked into the
shader source code because they can be moved into a UBO by the driver to
reduce register pr
---
src/intel/vulkan/anv_blorp.c | 1 +
src/intel/vulkan/anv_pipeline.c | 12
src/intel/vulkan/anv_pipeline_cache.c | 26 ++
src/intel/vulkan/anv_private.h| 6 ++
4 files changed, 45 insertions(+)
diff --git a/src/intel/vulkan/anv_
---
src/compiler/nir/nir.h | 2 ++
src/compiler/nir/nir_deref.c | 18 ++
2 files changed, 20 insertions(+)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index c16ce547642..e35bef612df 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -987,6
This commit adds a concept to NIR of having a blob of constant data
associated with a shader. Instead of being a UBO or uniform that can be
manipulated by the client, this constant data considered part of the
shader and remains constant across all invocations of the given shader
until the end of t
This little series adds an optimization pass to NIR and wires up up in anv
that moves large constant variables to a UBO. This fixes a farily common
case in some filter or ambient occlusion shaders where they put some sort
of look-up table in the shader itself. This series takes Skyrim Special
Edi
Reviewed-by: Marek Olšák
Marek
On Thu, Jun 28, 2018 at 9:22 AM, Erik Faye-Lund
wrote:
> When building with asserts enabled, we'll end up triggering an assert
> in pipe_buffer_map_range down this code-path, due to trying to map
> an empty range. Even if we avoid that, we'll trigger another asser
Reviewed-by: Marek Olšák
Marek
On Fri, Jun 29, 2018 at 5:23 AM, Timothy Arceri wrote:
> v2: add missing ARB_base_instance support
> ---
> src/mesa/main/extensions_table.h | 2 +-
> src/mesa/vbo/vbo_exec_array.c| 77 +++-
> 2 files changed, 76 insertions(+), 3 d
Reviewed-by: Marek Olšák
Marek
On Fri, Jun 29, 2018 at 5:22 AM, Timothy Arceri wrote:
> v2: add missing ARB_base_instance support
> ---
> src/mesa/main/bufferobj.c| 3 +-
> src/mesa/main/extensions_table.h | 2 +-
> src/mesa/vbo/vbo_exec_array.c| 71 ++
---
src/mesa/drivers/dri/i965/genX_state_upload.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c
b/src/mesa/drivers/dri/i965/genX_state_upload.c
index b279f01e1a1..921b420ab81 100644
--- a/src/mesa/drivers/dri/i965/genX_state_uplo
Hi List,
Mesa 18.1.3 is now available. This is a bug fix point release in the 18.1
series.
In this release we have:
- numerous fixes for radv
- some fixes for common radeon code
- several meson fixes
- fixes for autotools with non-gnu grep
- fixes for both the nir and glsl compilers
- An i9
Adds an extension to glFramebufferParameteri
that will specify if the framebuffer is vertically
flipped. Historically system framebuffers are
vertically flipped and user framebuffers are not.
Checking to see the state was done by looking at
the name field. This adds an explicit field.
v2:
* updat
Quoting Marek Olšák (2018-06-29 09:48:08)
> On Fri, Jun 29, 2018 at 11:40 AM, Dylan Baker wrote:
> > Quoting Marek Olšák (2018-06-18 16:33:09)
> >> From: Marek Olšák
> >>
> >> Cc: 18.1
> >> ---
> >> src/gallium/drivers/radeonsi/si_blit.c | 30 +++---
> >> 1 file changed, 27
On Fri, Jun 29, 2018 at 11:40 AM, Dylan Baker wrote:
> Quoting Marek Olšák (2018-06-18 16:33:09)
>> From: Marek Olšák
>>
>> Cc: 18.1
>> ---
>> src/gallium/drivers/radeonsi/si_blit.c | 30 +++---
>> 1 file changed, 27 insertions(+), 3 deletions(-)
>>
>> diff --git a/src/galli
On Fri, Jun 29, 2018 at 1:50 AM Erik Faye-Lund wrote:
>
> On Thu, Jun 28, 2018 at 11:12 PM Fritz Koenig wrote:
> >
> > Adds an extension to glFramebufferParameteri
> > that will specify if the framebuffer is vertically
> > flipped. Historically system framebuffers are
> > vertically flipped and u
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