On Thu, Jun 14, 2018 at 10:57 PM, Iago Toral wrote:
> On Fri, 2018-06-15 at 00:20 +0200, Chema Casanova wrote:
> >
> > On 14/06/18 03:26, Jason Ekstrand wrote:
> > > On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo
> > > mailto:jmcasan...@igalia.com>> wrote:
> > >
> > > do_untyped_v
Before we get too happy to merge things, I ran the CTS tests and there are
some failures... I've attached a fixup patch that fixes three bugs I found:
1) We weren't setting planeReorderPossible at all and we were using 0
instead of VK_FALSE (they're the same but we should use the enum) for
persi
On Fri, 2018-06-15 at 00:20 +0200, Chema Casanova wrote:
>
> On 14/06/18 03:26, Jason Ekstrand wrote:
> > On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo
> > mailto:jmcasan...@igalia.com>> wrote:
> >
> > do_untyped_vector_read is used at load_ssbo and load_shared.
> >
> > The
On Thu, Jun 14, 2018 at 10:55 AM, Jason Ekstrand
wrote:
> On June 14, 2018 01:43:12 Michel Dänzer wrote:
>
> On 2018-06-13 10:26 PM, Jason Ekstrand wrote:
>>
>>> The current BO cache puts BOs back into the recycle bucket the moment the
>>> refcount hits zero. If the BO is busy, we just don't re
On 06/15/2018 07:56 AM, Timothy Arceri wrote:
Can we get a piglit test to go along with this? Jordan added some
recently that you should be able to use as a base.
Yep, I'll try to build a Piglit test for this.
// Tapani
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m
Patch sets additional formats renderable and enables the extension
when OpenGL ES 3.1 is supported.
v2: instead of dummy_true, have a separate toggle for extension
(Eric Anholt)
Signed-off-by: Tapani Pälli
---
src/mesa/main/extensions_table.h | 1 +
src/mesa/main/fbobject.c | 20 ++
Signed-off-by: Tapani Pälli
---
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index 5a9369d7b4..0ada12e3ff 100644
--- a/src/mesa/drivers/dri/i965/intel_e
Can we get a piglit test to go along with this? Jordan added some
recently that you should be able to use as a base.
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On Thu, Jun 14, 2018 at 6:06 PM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:
> This new function takes care of shuffle/unshuffle components of a
> particular bit-size in components with a different bit-size.
>
> If source type size is smaller than destination type size the operation
On 06/14/2018 08:46 PM, Jordan Justen wrote:
On 2018-06-14 02:58:33, Tapani Pälli wrote:
While XFB has been enabled for cache, we did not serialize enough
data for the whole API to work (such as glGetProgramiv).
Fixes: 6d830940f7 "Allow shader cache usage with transform feedback"
Signed-off-b
From: Dave Airlie
If we want to upload 16k 32-bit consts we need a bit of overhead
to faciliate that.
Fixes crash in:
KHR-GL44.geometry_shader.limits.max_uniform_components
---
src/gallium/drivers/virgl/virgl_winsys.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/galli
On 14/06/18 19:40, Eric Engestrom wrote:
On Thursday, 2018-06-14 11:00:21 +1000, Timothy Arceri wrote:
Glibc has the same code to get program_invocation_short_name. However
for some reason the short name gets mangled for some wine apps.
For example with Google Earth VR I get:
program_invocati
This extension provides fences and frame count information to direct
display contexts. It uses new kernel ioctls to provide 64-bits of
vblank sequence and nanosecond resolution.
v2: Adopt Jason Ekstrand's coding conventions
Declare variables at first use, eliminate extra whitespace be
This extension provides fences and frame count information to direct
display contexts. It uses new kernel ioctls to provide 64-bits of
vblank sequence and nanosecond resolution.
v2:
Rework fence integration into the driver so that waiting for
any of a mixture of fence types (wsi, d
Here's a couple of reasonably straightforward extensions implemented
for both anv and radv drivers.
VK_EXT_display_surface_counter is a very simple extension which
adds an API, vkGetPhysicalSurfaceCapabilities2EXT, to extend the
existing vkGetPhysicalDeviceSurfaceCapabilitiesKHR and
vkGetPhysicalD
This extension provides fences and frame count information to direct
display contexts. It uses new kernel ioctls to provide 64-bits of
vblank sequence and nanosecond resolution.
v2: Remove DRM_CRTC_SEQUENCE_FIRST_PIXEL_OUT flag. This has
been removed from the proposed kernel API.
Add NULL
Handle the case where the set of fences to wait for is not all of the
same type by either waiting for them sequentially (waitAll), or
polling them until the timer has expired (!waitAll). We hope the
latter case is not common.
While the current code makes sure that it always has fences of only
one
This extension is required to support EXT_display_control as it offers
a way to query whether the vblank counter is supported.
v2: Thanks to kisak
Fix spelling of VkSurfaceCapabilities2EXT in wsi_common_wayland.c,
it was using ext instead of EXT.
Fix spelling of VK_STRUCTURE_TYPE_SUR
This extension is required to support EXT_display_control as it offers
a way to query whether the vblank counter is supported.
v2:
Add extension to list in alphabetical order
Suggested-by: Jason Ekstrand
Signed-off-by: Keith Packard
---
src/intel/vulkan/anv_extensions.py | 1
This extension is required to support EXT_display_control as it offers
a way to query whether the vblank counter is supported.
Signed-off-by: Keith Packard
---
src/amd/vulkan/radv_extensions.py | 1 +
src/amd/vulkan/radv_wsi.c | 12
2 files changed, 13 insertions(+)
diff -
Jason Ekstrand writes:
> Looks good to me. With this properly sprinkled on the appropriate patches,
> the entire series is
>
> Reviewed-by: Jason Ekstrand
Thanks so much! I've rebased the series onto current master and pushed
it back to my gitlab repo here
https://gitlab.freedesktop.o
I've forgot to Cc: the mailing list.
On 15/06/18 01:54, Chema Casanova wrote:
> On 14/06/18 03:36, Jason Ekstrand wrote:
>> On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo
>> mailto:jmcasan...@igalia.com>> wrote:
>>
>> shuffle_from_32bit_read manages 32-bit reads to 32-bit destinati
This new function takes care of shuffle/unshuffle components of a
particular bit-size in components with a different bit-size.
If source type size is smaller than destination type size the operation
needed is a component shuffle. The opposite case would be an unshuffle.
Component units are measur
Looks good to me. With this properly sprinkled on the appropriate patches,
the entire series is
Reviewed-by: Jason Ekstrand
On Thu, Jun 14, 2018 at 5:57 PM, Keith Packard wrote:
> We sorted out what 'vscan' means and are trying to use it correctly.
>
> vscan = 0 is the same as vscan = 1, whic
We sorted out what 'vscan' means and are trying to use it correctly.
vscan = 0 is the same as vscan = 1, which is slightly annoying; we use
MAX2(vscan, 1) everywhere.
randr doesn't pass vscan at all, so we set wsi mode vscan = 0.
The doublescan flag doubles the vscan value, so we don't need to d
On 15 June 2018 at 08:08, Bas Nieuwenhuizen wrote:
> Somehow valgrind misses that the value is initialized by the ioctl.
Reviewed-by: Dave Airlie
> ---
> src/amd/common/ac_gpu_info.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/amd/common/ac_gpu_info.c b/src/amd
From: Ian Romanick
All of the affected shaders are geometry shaders... the same ones from
the similar fs changes.
The "No changes on any other platforms" comment below is not quite
right. Without the previous change to register coalescing, this
optimization caused quite a few regressions in tes
From: Ian Romanick
This prevents regressions in a bunch of clipping and interpolation tests
caused by the next patch (i965/vec4: Optimize OR with 0 into a MOV).
Signed-off-by: Ian Romanick
---
src/intel/compiler/brw_vec4.cpp | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/inte
From: Ian Romanick
fs_visitor::set_gs_stream_control_data_bits generates some code like
"control_data_bits | stream_id << ((2 * (vertex_count - 1)) % 32)" as
part of EmitVertex. The first time this (dynamically) occurs in the
shader, control_data_bits is zero. Many times we can determine this
s
From: Ian Romanick
Signed-off-by: Ian Romanick
---
src/intel/compiler/brw_fs_cmod_propagation.cpp | 14 +++---
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/src/intel/compiler/brw_fs_cmod_propagation.cpp
b/src/intel/compiler/brw_fs_cmod_propagation.cpp
index 2587d62a95
From: Ian Romanick
Signed-off-by: Ian Romanick
---
src/intel/compiler/brw_fs_cmod_propagation.cpp | 137 +++--
1 file changed, 80 insertions(+), 57 deletions(-)
diff --git a/src/intel/compiler/brw_fs_cmod_propagation.cpp
b/src/intel/compiler/brw_fs_cmod_propagation.cpp
ind
From: Ian Romanick
Skylake
total instructions in shared programs: 14399081 -> 14399010 (<.01%)
instructions in affected programs: 26961 -> 26890 (-0.26%)
helped: 57
HURT: 0
helped stats (abs) min: 1 max: 6 x̄: 1.25 x̃: 1
helped stats (rel) min: 0.16% max: 0.80% x̄: 0.30% x̃: 0.18%
95% mean confid
On Thu, Jun 14, 2018 at 3:47 PM, Chema Casanova
wrote:
> On 14/06/18 03:44, Jason Ekstrand wrote:
> > On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo
> > mailto:jmcasan...@igalia.com>> wrote:
> >
> > ---
> > src/intel/compiler/brw_fs_nir.cpp | 13 ++---
> > 1 file
On Thu, Jun 14, 2018 at 2:39 PM, Chema Casanova
wrote:
> On 14/06/18 03:02, Jason Ekstrand wrote:
> > On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo
> > mailto:jmcasan...@igalia.com>> wrote:
> >
> > These new shuffle functions deal with the shuffle/unshuffle
> operations
> > n
We don't have cases for atomic types, some of which are explicitly
signed or unsigned.
The other opcodes could have uint or int return types, based on the
sources.
---
src/gallium/auxiliary/tgsi/tgsi_info.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_i
On Fri, Jun 15, 2018 at 12:51 AM, Dave Airlie wrote:
> From: Dave Airlie
>
> This wasn't being used anywhere inside the shader from what I can see.
Well it was used for the BC optimize, but then Samuel enabled it for
non-multisample too, so now we don't use it anymore. (or rather we
were already
From: Dave Airlie
This wasn't being used anywhere inside the shader from what I can see.
---
src/amd/vulkan/radv_pipeline.c | 2 --
src/amd/vulkan/radv_private.h | 1 -
src/amd/vulkan/radv_shader.h | 1 -
3 files changed, 4 deletions(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/v
On 14/06/18 03:44, Jason Ekstrand wrote:
> On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo
> mailto:jmcasan...@igalia.com>> wrote:
>
> ---
> src/intel/compiler/brw_fs_nir.cpp | 13 ++---
> 1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/src/int
On 14/06/18 03:26, Jason Ekstrand wrote:
> On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo
> mailto:jmcasan...@igalia.com>> wrote:
>
> do_untyped_vector_read is used at load_ssbo and load_shared.
>
> The previous MOVs are removed because shuffle_from_32bit_read
> can hand
Somehow valgrind misses that the value is initialized by the ioctl.
---
src/amd/common/ac_gpu_info.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index e908cc6fa96..e885c0538e9 100644
--- a/src/amd/common/ac_gpu_inf
https://bugs.freedesktop.org/show_bug.cgi?id=106922
--- Comment #3 from Bas Nieuwenhuizen ---
So top level is a f32 -> i16 bitcast:
Cannot select: 0x7e8d8750: i16 = bitcast 0x7e8d8af8
which is not allowed. Is in LLVM source:
%76 = call float @llvm.amdgcn.buffer.load.f32(<4 x i32> %75, i32 0, i
On 14/06/18 03:02, Jason Ekstrand wrote:
> On Sat, Jun 9, 2018 at 4:13 AM, Jose Maria Casanova Crespo
> mailto:jmcasan...@igalia.com>> wrote:
>
> These new shuffle functions deal with the shuffle/unshuffle operations
> needed for read/write operations using 32-bit components when the
>
https://bugs.freedesktop.org/show_bug.cgi?id=106922
--- Comment #2 from Bas Nieuwenhuizen ---
If this is any indication it may just be not checking exts:
SPIR-V WARNING:
In file ../mesa/src/compiler/spirv/spirv_to_nir.c:3312
Unsupported SPIR-V capability: SpvCapabilityInt16
28 bytes
https://bugs.freedesktop.org/show_bug.cgi?id=106922
--- Comment #1 from Bas Nieuwenhuizen ---
Can reproduce a LLVM error here.
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You are the QA Contact for the bug.
You are the assignee for the bug.___
mesa-dev ma
Quoting Jose Fonseca (2018-06-14 14:02:39)
> On 12/06/18 17:50, Dylan Baker wrote:
> > Quoting Eric Engestrom (2018-06-12 04:38:04)
> >> On Monday, 2018-06-11 15:56:11 -0700, Dylan Baker wrote:
> >>> ---
> >>> meson.build | 21 +
> >>> 1 file changed, 21 insertions(+)
> >>>
>
On Thu, Jun 14, 2018 at 12:24 PM, Keith Packard wrote:
> Jason Ekstrand writes:
>
> >> Signed-off-by: Keith Packard
> >>
> >> fixup for acquire
> >>
> >> fixup for RROutput type
> >>
> >> Signed-off-by: Keith Packard
> >>
> >> fixup
> >>
> >
> > Lots of "fixup". Did you mean to actually comme
https://bugs.freedesktop.org/show_bug.cgi?id=106922
Bug ID: 106922
Summary: Tangrams demo: LLVM ERROR: Cannot select: 0x7e8d8750:
i16 = bitcast 0x7e8d8af8
Product: Mesa
Version: git
Hardware: Other
OS: All
On 12/06/18 17:50, Dylan Baker wrote:
Quoting Eric Engestrom (2018-06-12 04:38:04)
On Monday, 2018-06-11 15:56:11 -0700, Dylan Baker wrote:
---
meson.build | 21 +
1 file changed, 21 insertions(+)
diff --git a/meson.build b/meson.build
index a244694fd4a..e1b3afbe688 1006
On 06/14/2018 06:18 AM, Martin Peres wrote:
> This fixes screenshots using 8k+ wide display setups in modesetting.
>
> Chris Wilson even recommended the changes in intel_mipmap_tree.c
> should read 131072 instead of 65535, but I for sure got confused by
> his explanation.
>
> In any case, I would
---
src/gallium/drivers/softpipe/sp_screen.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/gallium/drivers/softpipe/sp_screen.c
b/src/gallium/drivers/softpipe/sp_screen.c
index f9c916d938..676cd0812a 100644
--- a/src/gallium/drivers/softpipe/sp_screen.c
+++ b/src/galli
---
src/gallium/drivers/llvmpipe/lp_screen.c | 3 +--
src/gallium/drivers/llvmpipe/lp_test_format.c | 3 +--
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c
b/src/gallium/drivers/llvmpipe/lp_screen.c
index f12ad09298..c1a2fd3379 100644
Reuse code shared with mesa/main/texcompress_bptc.
---
src/gallium/auxiliary/Makefile.sources | 2 +
src/gallium/auxiliary/meson.build| 2 +
src/gallium/auxiliary/util/u_format_bptc.c | 322 +++
src/gallium/auxiliary/util/u_format_bptc.h | 122 +++
src
Add code for reuse bptc decode logic from mesa/main/texcompress_bptc.c by make
several function public(nonstatic) and define functions in
texcompress_bptc_share.h.
I have made minimal changes in code without possible performance improvements.
And code
decodes image by pixels instead possible
Make functions public:
* fetch_rgba_unorm_from_block
* fetch_rgb_float_from_block
* compress_rgba_unorm
* compress_rgb_float
Functions will be reused in gallium/auxiliary code.
---
src/mesa/Makefile.sources | 1 +
src/mesa/main/texcompress_bptc.c | 9 ++---
src/mesa/main/texc
On Thu, Jun 14, 2018 at 11:42 AM, Keith Packard wrote:
> Jason Ekstrand writes:
>
> >> + if (instance->enabled_extensions.KHR_display) {
> >> + master_fd = open(path, O_RDWR | O_CLOEXEC);
> >>
> >
> > Is this supposed to be opening primary_path instead?
>
> Yes, and this section of code n
On 06/14/2018 10:27 PM, Nanley Chery wrote:
> +Jason, Ken
>
> Hello,
>
> I recently did some miptree work relating to the r8stencil_mt and I
> think I now have a more informed opinion about how things should be
> structured. I'd like to propose an alternative solution.
>
> I had initially thoug
On Thu, Jun 07, 2018 at 09:34:41AM +0300, Eleni Maria Stea wrote:
> Gen 7 GPUs store the compressed EAC/ETC2 images in other non-compressed
> formats that can render. When GetCompressed* functions are called, the
> pixels are returned in the non-compressed format that is used for the
> rendering.
>
Jason Ekstrand writes:
>> Signed-off-by: Keith Packard
>>
>> fixup for acquire
>>
>> fixup for RROutput type
>>
>> Signed-off-by: Keith Packard
>>
>> fixup
>>
>
> Lots of "fixup". Did you mean to actually comment on what that was?
Sorry; I was squashing patches and moving comments into the ma
Quoting Nanley Chery (2018-06-14 19:46:09)
> On Thu, Jun 14, 2018 at 10:01:18AM -0700, Nanley Chery wrote:
> > On Thu, Jun 14, 2018 at 04:18:30PM +0300, Martin Peres wrote:
> > > This fixes screenshots using 8k+ wide display setups in modesetting.
> > >
> > > Chris Wilson even recommended the chan
On Thu, Jun 14, 2018 at 10:01:18AM -0700, Nanley Chery wrote:
> On Thu, Jun 14, 2018 at 04:18:30PM +0300, Martin Peres wrote:
> > This fixes screenshots using 8k+ wide display setups in modesetting.
> >
> > Chris Wilson even recommended the changes in intel_mipmap_tree.c
> > should read 131072 ins
Jason Ekstrand writes:
>> Signed-off-by: Keith Packard
>>
>> fixup
>>
>
> Did you mean to leave this in here?
Nope; just rebasing/squashing noise. I noticed this in passing and have
already removed it.
--
-keith
signature.asc
Description: PGP signature
_
Jason Ekstrand writes:
>> + if (instance->enabled_extensions.KHR_display) {
>> + master_fd = open(path, O_RDWR | O_CLOEXEC);
>>
>
> Is this supposed to be opening primary_path instead?
Yes, and this section of code needs to occur before anv_init_wsi.
I appear to have skipped testing this
https://bugs.freedesktop.org/show_bug.cgi?id=106774
Ian Romanick changed:
What|Removed |Added
CC||i...@freedesktop.org,
Quoting Lukas Rusak (2018-06-14 10:25:43)
> any updates here?
>
> On Fri, Jun 1, 2018 at 2:09 PM Lukas Rusak wrote:
>
> This seems to have been missed in the move from autotools
>
> This fixes the following build issue:
>
> ../src/gallium/auxiliary/vl/vl_winsys_dri.c:34:10: fatal e
On June 14, 2018 06:01:33 Lionel Landwerlin
wrote:
On 13/06/18 21:26, Jason Ekstrand wrote:
---
src/mesa/drivers/dri/i965/brw_bufmgr.c | 46 ++
src/mesa/drivers/dri/i965/brw_bufmgr.h | 1 -
2 files changed, 10 insertions(+), 37 deletions(-)
diff --git a/src/mesa/driver
On June 14, 2018 01:43:12 Michel Dänzer wrote:
On 2018-06-13 10:26 PM, Jason Ekstrand wrote:
The current BO cache puts BOs back into the recycle bucket the moment the
refcount hits zero. If the BO is busy, we just don't re-use it until it
isn't or we re-use it for a render target which we ass
On 2018-06-14 02:58:33, Tapani Pälli wrote:
> While XFB has been enabled for cache, we did not serialize enough
> data for the whole API to work (such as glGetProgramiv).
>
> Fixes: 6d830940f7 "Allow shader cache usage with transform feedback"
> Signed-off-by: Tapani Pälli
> Bugzilla: https://bug
any updates here?
On Fri, Jun 1, 2018 at 2:09 PM Lukas Rusak wrote:
> This seems to have been missed in the move from autotools
>
> This fixes the following build issue:
>
> ../src/gallium/auxiliary/vl/vl_winsys_dri.c:34:10: fatal error:
> X11/Xlib-xcb.h: No such file or directory
> #include
>
How can I get some traction on this?
On Mon, Jun 4, 2018 at 12:38 PM Lukas Rusak wrote:
> I noticed that the generated pkg-config files will include
> glx and x11 dependencies even when x11 isn't a selected platform.
>
> This fixes the private libs and was tested by building kmscube
>
> V2:
>
Series Reviewed-by: Jordan Justen
On 2018-06-14 04:08:09, Tapani Pälli wrote:
> Signed-off-by: Tapani Pälli
> ---
> docs/features.txt | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/docs/features.txt b/docs/features.txt
> index b32606d223..423b03a9a9 100644
> ---
Quoting Bas Nieuwenhuizen (2018-06-14 09:21:49)
> On Thu, Jun 14, 2018 at 6:13 PM, wrote:
> > Hello list,
> >
> > The candidate for the Mesa 18.1.2 is now available. Currently we have:
> > - 42 queued
> > - 6 nominated (outstanding)
> > - and 0 rejected patches
> >
> > Notable changes in this
Signed-off-by: Lionel Landwerlin
---
src/intel/common/gen_batch_decoder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/common/gen_batch_decoder.c
b/src/intel/common/gen_batch_decoder.c
index 81d8298c28b..fc0ff95a476 100644
--- a/src/intel/common/gen_batch_decoder
The Masking is only needed for entry matching.
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/aubinator.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 2a1b91c0e54..6f2e0d503df 100644
--- a/src/intel/
With PPGTT mappings, our aubinator implementation can be quite slow if
we request a buffer that doesn't exist. Instead of doing a PPGTT walk
for invalid addresses (0 lengths), wait until we're sure we want to
decode the data.
Signed-off-by: Lionel Landwerlin
---
src/intel/common/gen_batch_decode
Now that we rely on mmap of the data to parse, we can't process the
standard input anymore.
This isn't much of a big deal because we have in-process batch decoder
(run with INTEL_DEBUG=batch) that supports essentially doing the same
thing.
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/au
We reuse the existing mechanism introduced in 482a7d1593c621
("intel/tools/aubinator: aubinate ppgtt aubs") that is a list of GTT
address and their corresponding mmapped pointer so that we can get rid
of the 1Tb of mmapped memory and instead just use the already mmapped
aub file.
Sorry Kristian.
No functional changes.
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/aubinator.c | 95 +++--
1 file changed, 49 insertions(+), 46 deletions(-)
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 99cd010dd9d..2a1b91c0e54 100644
---
From: Jason Ekstrand
This is a simple, invasive, liberally licensed red-black tree
implementation. It's an invasive data structure similar to the
Linux kernel linked-list where the intention is that you embed a
rb_node struct the data structure you intend to put into the
tree.
The implementation
From: Scott D Phillips
Reviewed-by: Lionel Landwerlin
---
src/intel/common/gen_batch_decoder.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/src/intel/common/gen_batch_decoder.c
b/src/intel/common/gen_batch_decoder.c
index 3852f32de36..2b6978da92d 1006
Hi all,
This series is based of what Scott did earlier this year to handle
aubs with ppgtt. This has the nice side effect of also fixing recent
softpin changes that allocate virtual addresses from the top
addresses. Because we didn't have more than 1Tb of GTT mapping, we
just couldn't deal with th
From: Scott D Phillips
v2: by Lionel
Fix memfd_create compilation issue
Fix pml4 address stored on 32 instead of 64bits
Return no buffer if first ppgtt page is not mapped
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/aubinator.c | 460
1
On Thu, Jun 14, 2018 at 04:18:30PM +0300, Martin Peres wrote:
> This fixes screenshots using 8k+ wide display setups in modesetting.
>
> Chris Wilson even recommended the changes in intel_mipmap_tree.c
> should read 131072 instead of 65535, but I for sure got confused by
> his explanation.
>
> In
On Thu, Jun 14, 2018 at 6:13 PM, wrote:
> Hello list,
>
> The candidate for the Mesa 18.1.2 is now available. Currently we have:
> - 42 queued
> - 6 nominated (outstanding)
> - and 0 rejected patches
>
> Notable changes in this release:
> - numerous fixes for radv
> - libatomic checks for meso
Hello list,
The candidate for the Mesa 18.1.2 is now available. Currently we have:
- 42 queued
- 6 nominated (outstanding)
- and 0 rejected patches
Notable changes in this release:
- numerous fixes for radv
- libatomic checks for meson, as well as fixing coverage for less common (not
arm or
Reviewed-by: Matt Turner
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Reviewed-by: Charmaine Lee
From: Brian Paul
Sent: Thursday, June 14, 2018 8:13:01 AM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee; Neha Bhende
Subject: [PATCH] st/mesa: add missing switch cases in
glsl_to_tgsi_visitor::visit()
To silence compil
Jason Ekstrand writes:
> I'm trusting that not much changed other than what was explicitly called
> out. I didn't want to re-read in *that* much detail again. :-)
You are correct, all of the changes from the previous patch were listed
in the commit message.
> Reviewed-by: Jason Ekstrand
Than
To silence compiler warning about unhandled switch cases.
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index b321112..673c0f6 100644
--- a/src/mesa/state
https://bugs.freedesktop.org/show_bug.cgi?id=106756
--- Comment #15 from Giovanni ongaro ---
it also fixes NFS Payback
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https://bugs.freedesktop.org/show_bug.cgi?id=106756
--- Comment #14 from Giovanni ongaro ---
thank you for the quick response
i can confirm that all 3 games now work on vega 64 under dxvk
with this patch applied
you did a very good job
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https://bugs.freedesktop.org/show_bug.cgi?id=106644
--- Comment #11 from erhar...@mailbox.org ---
Built 18.0.5 and 17.3.9, same test failures here.
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https://bugs.freedesktop.org/show_bug.cgi?id=106907
--- Comment #8 from Tapani Pälli ---
(In reply to xinghua from comment #7)
> (In reply to Tapani Pälli from comment #6)
> > Fix proposal sent here:
> > https://lists.freedesktop.org/archives/mesa-dev/2018-June/197678.html
>
> Hi, Tapani, thank
On Thu, Jun 14, 2018 at 3:23 PM, Samuel Pitoiset
wrote:
> The primitive ID is NULL if the vertex shader is LS. This
> generates an invalid select instruction which crashes
> because one operand is NULL.
>
> This fixes crashes in The Long Journey Home, Quantum Break
> and Just Cause 3 with DXVK.
>
https://bugs.freedesktop.org/show_bug.cgi?id=106907
--- Comment #7 from xinghua ---
(In reply to Tapani Pälli from comment #6)
> Fix proposal sent here:
> https://lists.freedesktop.org/archives/mesa-dev/2018-June/197678.html
Hi, Tapani, thank you for your patch, seems that this patch could resol
https://bugs.freedesktop.org/show_bug.cgi?id=106756
--- Comment #13 from Samuel Pitoiset ---
This should be fixed with https://patchwork.freedesktop.org/patch/229508/
Can you confirm? Thanks!
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The primitive ID is NULL if the vertex shader is LS. This
generates an invalid select instruction which crashes
because one operand is NULL.
This fixes crashes in The Long Journey Home, Quantum Break
and Just Cause 3 with DXVK.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106756
CC:
Si
This fixes screenshots using 8k+ wide display setups in modesetting.
Chris Wilson even recommended the changes in intel_mipmap_tree.c
should read 131072 instead of 65535, but I for sure got confused by
his explanation.
In any case, I would like to use this RFC patch as a forum to discuss
why the
Reviewed-by: Bas Nieuwenhuizen
On Thu, Jun 14, 2018 at 2:28 PM, Samuel Pitoiset
wrote:
> This allows to run the LLVM verifier pass.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_debug.h | 1 +
> src/amd/vulkan/radv_device.c | 1 +
> src/amd/vulkan/radv_nir_to_llvm
From: Emil Velikov
The current `grep "foo\|bar"' trips on some grep implementations, like
the FreeBSD one. Instead use `egrep "foo|bar"' as suggested by Stefan.
Cc: Stefan Esser
Reported-by: Stefan Esser
Bugzilla: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=228673
Fixes: 1914c814a6c ("co
On 14/06/18 14:01, Lionel Landwerlin wrote:
On 13/06/18 21:26, Jason Ekstrand wrote:
---
src/mesa/drivers/dri/i965/brw_bufmgr.c | 46 ++
src/mesa/drivers/dri/i965/brw_bufmgr.h | 1 -
2 files changed, 10 insertions(+), 37 deletions(-)
diff --git a/src/mesa/drivers/dr
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