Delaying adding built-in uniforms until after we convert to NIR
gives us a better chance to optimise them away. Also NIR allows
us to iterate over the uniforms directly so should be faster.
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 68 +++---
src/mesa/state_tracker/s
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 24 ++--
src/mesa/state_tracker/st_nir.h | 4 +++-
src/mesa/state_tracker/st_program.c | 10 ++
3 files changed, 11 insertions(+), 27 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
b
---
src/mesa/drivers/dri/i965/brw_draw.c | 42
1 file changed, 42 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index 809e722..bc2c52e 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/dr
---
src/mesa/drivers/dri/i965/brw_draw.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index 809e722..2ae60d5 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drive
This function is a bit more accurate because it lets us sample from sRGB
textures if sRGB decode is off. This should improve performance in
whenever GL_SKIP_DECODE_EXT is used.
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git
These are produced by nir_lower_bitmap(), adding the missing derefence
would cause other issues that need to be hacked around such as
skipping sampler lowering and uniform location assignment, so this
change seems the correct way to go.
Fixes 194 piglit crashes on radeonsi using NIR.
---
src/amd/
This avoids a crash on the output of nir_lower_bitmap().
---
src/compiler/nir/nir_lower_samplers_as_deref.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/compiler/nir/nir_lower_samplers_as_deref.c
b/src/compiler/nir/nir_lower_samplers_as_deref.c
index bdbd8672f4..3e81
This is how I run piglit on i965:
WAFFLE_GBM_DEVICE=/dev/dri/renderD128 PIGLIT_PLATFORM=gbm piglit/bin/glinfo|head
GL_RENDERER = Mesa DRI Intel(R) Ivybridge Desktop
Of course I have Radeon as my main GPU.
Marek
On Wed, Nov 1, 2017 at 12:52 AM, Mark Janes wrote:
> No, please don't. We can't hav
On 31/10/17 20:25, Scott D Phillips wrote:
Lionel Landwerlin writes:
This is required to have output redirected to something else than a
file descriptor (stdout).
an alternative here might be to fdopen() a pipe(). Maybe a bit weird but
it could save several hundred lines of change and maybe g
On 31/10/17 23:04, Scott D Phillips wrote:
Lionel Landwerlin writes:
On 31/10/17 20:54, Scott D Phillips wrote:
Lionel Landwerlin writes:
We want to introduce a reader interface for accessing memory, so that
later on we can use different ways of storing the content of the GTT
address space
Series is
Reviewed-by: Ilia Mirkin
On Tue, Oct 31, 2017 at 7:58 PM, Dave Airlie wrote:
> From: Dave Airlie
>
> if the driver sets the cap, then use the value it gives us.
>
> Signed-off-by: Dave Airlie
> ---
> src/mesa/state_tracker/st_extensions.c | 6 ++
> 1 file changed, 6 insertions(
This is needed for r600 image support, and I'm really over rebasing it,
so upstream this bit before I drop the rest.
Dave.
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From: Dave Airlie
if the driver sets the cap, then use the value it gives us.
Signed-off-by: Dave Airlie
---
src/mesa/state_tracker/st_extensions.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index 3
From: Dave Airlie
Some hw (evergreen) has a limit on how many combined (images/buffers/mrts)
a fragment shader can access.
Signed-off-by: Dave Airlie
---
src/gallium/docs/source/screen.rst | 4 +++-
src/gallium/drivers/etnaviv/etnaviv_screen.c | 1 +
src/gallium/drivers/freed
On Mon, Oct 30, 2017 at 1:53 PM, Jason Ekstrand
wrote:
> On Mon, Oct 30, 2017 at 11:53 AM, Jason Ekstrand
> wrote:
>
>> On Mon, Oct 30, 2017 at 5:10 AM, Iago Toral wrote:
>>
>>> On Wed, 2017-10-25 at 16:26 -0700, Jason Ekstrand wrote:
>>> > Ballot intrinsics return a bitfield of subgroups. In
This commit pulls nir_lower_read_invocations_to_scalar along with most
of the guts of nir_opt_intrinsics (which mostly does subgroup lowering)
into a new nir_lower_subgroups pass. There are various other bits of
subgroup lowering that we're going to want to do so it makes a bit more
sense to keep
The GL_ARB_shader_ballot spec says that gl_SubGroupSizeARB is declared
as a uniform. This means that it cannot change across an invocation
such as a draw call or a compute dispatch. For compute shaders, we're
ok because we only ever use one dispatch size. For fragment, however,
the hardware dyna
This lets you easily build integer immediates of arbitrary bit size.
---
src/compiler/nir/nir_builder.h | 12
1 file changed, 12 insertions(+)
diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h
index 4bd5628..36e0ae3 100644
--- a/src/compiler/nir/nir_builder
Ballot intrinsics return a bitfield of subgroups. In GLSL and some
SPIR-V extensions, they return a uint64_t. In SPV_KHR_shader_ballot,
they return a uvec4. Also, some back-ends would rather pass around
32-bit values because it's easier than messing with 64-bit all the time.
To solve this mess,
No, please don't. We can't have thousands of failures added to CI.
Dylan, can you double check this for Marek? I'm surprised that it
doesn't reproduce for him.
-Mark
Marek Olšák writes:
> I can't reproduce the issue on my IVB. How about I just push this and
> you guys fix i965 when you have
This fixes a crash upon context destruction when
glGenFragmentShadersATI() was used. Backtrace:
==15060== Invalid free() / delete / delete[] / realloc()
==15060==at 0x482F478: free (vg_replace_malloc.c:530)
==15060==by 0x57694F4: _mesa_delete_ati_fragment_shader (atifragshader.c:68)
==15060
From: Dave Airlie
This adds support to the assembler for the mark bit
on the export word1.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/eg_asm.c | 2 ++
src/gallium/drivers/r600/r600_asm.c | 4
src/gallium/drivers/r600/r600_asm.h | 1 +
3 files changed, 7 insertions(+)
diff
From: Dave Airlie
This add support for the early depth/stencil property found
on image shaders.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_state.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/r600/evergreen_state.c
b/src/gallium/drivers/r60
These are just some misc patches from the road to GL4.3 patches,
They don't do anything on their own, just cleanly improve the assembler
some state setting.
Dave.
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From: Dave Airlie
These special ALU sources provide the shader engine,
simd and hw wave ids.
These are required for images support.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/r600_asm.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/gallium/drivers/r600/r600_asm
From: Dave Airlie
This just adds support to the assembler for setting the valid
pixel mode on the CF clause.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/eg_asm.c | 1 +
src/gallium/drivers/r600/r600_asm.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/gallium/drivers/r
From: Dave Airlie
This adds support for emitting RAT instructions to the assembler.
RAT instructions are used to implement image accessors.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/eg_asm.c | 19 +++
src/gallium/drivers/r600/r600_asm.c | 9 +
src/galli
Lionel Landwerlin writes:
> On 31/10/17 20:54, Scott D Phillips wrote:
>> Lionel Landwerlin writes:
>>
>>> We want to introduce a reader interface for accessing memory, so that
>>> later on we can use different ways of storing the content of the GTT
>>> address space that don't involve a pointer
This allows drivers to be set by OS/arch in a sane manner.
v2: - set _drivers to a list of drivers instead of manually assigning
each with_*
cc: Eric Engestrom
Signed-off-by: Dylan Baker
---
meson.build | 18 ++
meson_options.txt | 8
2 files changed, 22 i
I can't reproduce the issue on my IVB. How about I just push this and
you guys fix i965 when you have time?
Marek
On Thu, Oct 26, 2017 at 5:46 PM, Mark Janes wrote:
> That fixed many issues, but:
>
> On deqp EGL tests, we get:
>
> dEQP-EGL.functional.create_context_ext.gl_42.rgba_no_depth_no
Thanks for the review. I’ve pushed this first patch to master and I’ll
drop the rest. I’ve also pushed the piglit patch.
Regards,
- Neil
Jason Ekstrand writes:
> On Tue, Oct 31, 2017 at 10:55 AM, Neil Roberts wrote:
>
>> Previously the values were calculated by just shifting ~0 by the
>> invoc
On 31/10/17 20:11, Scott D Phillips wrote:
Lionel Landwerlin writes:
Is this one a rebase error? The commit message doesn't make sense with
the patch, and the change from Patch 22 gets reverted here.
Yeah, that's wrong.
It should be named "enable looking for instruction by name"
Signed-of
Thanks, all fixed locally.
On 31/10/17 21:59, Dylan Baker wrote:
Quoting Lionel Landwerlin (2017-10-30 09:58:46)
[snip]
diff --git a/meson.build b/meson.build
index 24d997b3e0a..e5e691e276c 100644
--- a/meson.build
+++ b/meson.build
@@ -43,6 +43,7 @@ pre_args = [
with_vulkan_icd_dir = get_opt
On 31/10/17 20:54, Scott D Phillips wrote:
Lionel Landwerlin writes:
We want to introduce a reader interface for accessing memory, so that
later on we can use different ways of storing the content of the GTT
address space that don't involve a pointer to a linear buffer.
I'm kinda sceptical th
Quoting Lionel Landwerlin (2017-10-30 09:58:46)
[snip]
> diff --git a/meson.build b/meson.build
> index 24d997b3e0a..e5e691e276c 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -43,6 +43,7 @@ pre_args = [
> with_vulkan_icd_dir = get_option('vulkan-icd-dir')
> with_tests = get_option('build-te
On Tue, Oct 31, 2017 at 02:15:43PM -0700, Jason Ekstrand wrote:
> On Mon, Oct 30, 2017 at 10:37 AM, Nanley Chery
> wrote:
>
> > On Fri, Oct 27, 2017 at 05:14:16PM -0700, Jason Ekstrand wrote:
> > > On Fri, Oct 27, 2017 at 3:16 PM, Nanley Chery
> > wrote:
> > >
> > > > On Fri, Oct 27, 2017 at 12:
Lionel Landwerlin writes:
The new names make sense to me, but the old names are what are in the
prm. I'm not sure what consistency we prefer to prioritize, so I'll have
to defer to someone else to review Patches 27 and 28
> Signed-off-by: Lionel Landwerlin
> ---
> src/intel/genxml/gen10.xml
On Mon, Oct 30, 2017 at 10:37 AM, Nanley Chery
wrote:
> On Fri, Oct 27, 2017 at 05:14:16PM -0700, Jason Ekstrand wrote:
> > On Fri, Oct 27, 2017 at 3:16 PM, Nanley Chery
> wrote:
> >
> > > On Fri, Oct 27, 2017 at 12:52:30PM -0700, Jason Ekstrand wrote:
> > > > On Fri, Oct 27, 2017 at 12:24 PM, N
On 31/10/17 17:29, Scott D Phillips wrote:
Lionel Landwerlin writes:
Signed-off-by: Lionel Landwerlin
---
src/intel/common/gen_decoder.c | 59 ++
1 file changed, 37 insertions(+), 22 deletions(-)
diff --git a/src/intel/common/gen_decoder.c b/src/int
Quoting Emil Velikov (2017-10-30 10:47:22)
> On 30 October 2017 at 17:05, Dylan Baker wrote:
> > So I think the consensus is this is okay?
> >
> > Emil, is the autotools right here?
> >
>
> Without a clear separation or cleanup of the the existing code, this
> such move brings no technical benefi
Because meson mirrors the auototools logic, it needs the same changes to
allow building glvnd based EGL without building any GLX.
Signed-off-by: Dylan Baker
---
Emil,
This implements the same logic that you're implementing for meson: one or both
of dri based GLX or EGL is required for glvnd, b
Lionel Landwerlin writes:
> We want to introduce a reader interface for accessing memory, so that
> later on we can use different ways of storing the content of the GTT
> address space that don't involve a pointer to a linear buffer.
I'm kinda sceptical that this is the best way to achieve what
Lionel Landwerlin writes:
> This is required to have output redirected to something else than a
> file descriptor (stdout).
an alternative here might be to fdopen() a pipe(). Maybe a bit weird but
it could save several hundred lines of change and maybe get you
buffering to boot. however you feel
On Mon, Oct 30, 2017 at 05:24:10PM -0700, Nanley Chery wrote:
> On Fri, Oct 06, 2017 at 04:30:47PM -0700, Anuj Phogat wrote:
> > There are few other (duplicate) workarounds which have similar
> > recommendations:
> > WaFlushHangWhenNonPipelineStateAndMarkerStalled
> > WaCSStallBefore3DSamplePatter
Lionel Landwerlin writes:
Is this one a rebase error? The commit message doesn't make sense with
the patch, and the change from Patch 22 gets reverted here.
> Signed-off-by: Lionel Landwerlin
> ---
> src/intel/common/gen_decoder.c | 8
> src/intel/common/gen_decoder.h | 3 ++-
> 2 fil
Lionel Landwerlin writes:
> If we have more programs than what we can store,
> aubinator_error_decode will assert. Instead let's have a rolling
> window of programs.
>
> v2: Fix overflowing issues (Eric Engestrom)
>
> Signed-off-by: Lionel Landwerlin
> Reviewed-by: Eric Engestrom
As an enhance
Oops!
Reviewed-by: Matt Turner
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Reviewed-by: Bas Nieuwenhuizen
On Tue, Oct 31, 2017 at 10:29 AM, Samuel Pitoiset
wrote:
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 6 +++---
> src/amd/vulkan/radv_private.h| 3 ---
> 2 files changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/src/amd/
From: Emil Velikov
Currently we were overwriting the existing warning flags, instead of
adding new [as applicable].
Fixes c5d2e2d43f6 ("configure: Test for -Wno-initializer-overrides")
Cc: Matt Turner
Signed-off-by: Emil Velikov
---
configure.ac | 4 ++--
1 file changed, 2 insertions(+), 2 de
From: Emil Velikov
Currently we were overwriting the existing warning flags, instead of
adding new [as applicable].
Fixes e4b2b69e828 ("configure: Add and use AX_CHECK_COMPILE_FLAG")
Cc: Matt Turner
Signed-off-by: Emil Velikov
---
configure.ac | 8
1 file changed, 4 insertions(+), 4
From: Emil Velikov
Currently we error out when building GLVND w/o GLX.
That was the original premice before we had EGL. As the commit says,
that error should be reworked to honour both - do so.
Reported-by: Lukas Rusak
Cc: Lukas Rusak
Fixes: ce562f9e3fa ("EGL: Implement the libglvnd interface
From: Emil Velikov
Targets such as omx and va can work w/o anything X related. Mandate the
xcb* dependencies only when the X11 platform is selected.
Reported-by: Lukas Rusak
Cc: Lukas Rusak
Fixes: 63e11ac2b5c ("configure: error out if building VA w/o supported
platform")
Signed-off-by: Emil Ve
Reviewed-by: Dylan Baker
Quoting Eric Engestrom (2017-10-31 09:29:08)
> Fixes: f03b7c9ad92c1656a221 "winsys/amdgpu: Add R600_DEBUG flag to
> reserve VMID per ctx."
> Cc: Andrey Grodzovsky
> Signed-off-by: Eric Engestrom
> ---
> meson.build | 2 +-
> 1 file changed,
Need moar cores :-P
Reviewed-by: Emil Velikov
-Emil
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Reviewed-by: Dylan Baker
Quoting Eric Engestrom (2017-10-31 11:19:02)
> Meson is much quicker to build Mesa, giving quicker feedback if
> executed first.
>
> Cc: Dylan Baker
> Cc: Emil Velikov
> Signed-off-by: Eric Engestrom
> ---
> .travis.yml | 64
> ++-
Currently this ABI check only checks for es2.x symbols, but es3.x
symbols are also exposed. Exposing these symbols is recommended by
Khronos, and as such the test should accept that as ABI.
see: https://lists.freedesktop.org/archives/mesa-stable/2016-June/004545.html
for the discussion about expos
Because otherwise gbm will expose wayland symbols that it shouldn't.
Signed-off-by: Dylan Baker
---
src/egl/wayland/wayland-drm/meson.build | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/egl/wayland/wayland-drm/meson.build
b/src/egl/wayland/wayland-drm/meson.build
index 12b49ca4f06..19
This will be squashed before push, but was split out to make review
easier.
---
src/mapi/es2api/ABI-check | 248 +++---
1 file changed, 124 insertions(+), 124 deletions(-)
diff --git a/src/mapi/es2api/ABI-check b/src/mapi/es2api/ABI-check
index 84e8a130601.
Signed-off-by: Eric Engestrom
---
Didn't find when this was broken, but it looks like the tests had been
silently ignored by `make check` for a long time...
---
src/mapi/es1api/ABI-check | 2 +-
src/mapi/es2api/ABI-check | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/m
On Tue, Oct 31, 2017 at 10:47 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> It's inaccurate. Instead, see the copyright and use "git log" and
> "git blame" to know the authorship.
Agreed. I've tried to discourage adding new ones. Maybe it's time to
clean them out of i965, etc.
_
On Tue, Oct 31, 2017 at 10:55 AM, Neil Roberts wrote:
> Similar to nir_intrinsic_load_subgroup_eq_mask and friends, this adds
> an intrinsic which contains a bit for every member of the group. This
> doesn’t have a corresponding GLSL builtin but it will be used to
> calculate nir_intrinsic_load_s
On Tue, Oct 31, 2017 at 10:55 AM, Neil Roberts wrote:
> Instead of letting nir lower nir_intrinsic_load_subgroup_all_mask this
> is now generated directly. This is more efficient because it can be
> calculated in the compiler based on the dispatch width.
>
> Sadly it’s still not totally ideal beca
On Tue, Oct 31, 2017 at 10:55 AM, Neil Roberts wrote:
> Previously the values were calculated by just shifting ~0 by the
> invocation ID. This would end up including bits that are higher than
> gl_SubGroupSizeARB. The corresponding CTS test effectively requires that
> these high bits be zero so i
On Tue, Oct 31, 2017 at 11:29 AM, Jason Ekstrand
wrote:
> On Tue, Oct 31, 2017 at 10:55 AM, Neil Roberts
> wrote:
>
>> Instead of letting nir lower nir_intrinsic_load_subgroup_all_mask this
>> is now generated directly. This is more efficient because it can be
>> calculated in the compiler based
On Tue, Oct 31, 2017 at 10:55 AM, Neil Roberts wrote:
> Instead of letting nir lower nir_intrinsic_load_subgroup_all_mask this
> is now generated directly. This is more efficient because it can be
> calculated in the compiler based on the dispatch width.
>
> Sadly it’s still not totally ideal bec
Meson is much quicker to build Mesa, giving quicker feedback if
executed first.
Cc: Dylan Baker
Cc: Emil Velikov
Signed-off-by: Eric Engestrom
---
.travis.yml | 64 ++---
1 file changed, 32 insertions(+), 32 deletions(-)
diff --git a/.tr
Yes, si_create_shader_selector contains this:
sel->culldist_mask = sel->info.culldist_writemask <<
sel->info.num_written_clipdistance;
Reviewed-by: Marek Olšák
Marek
On Tue, Oct 31, 2017 at 4:26 AM, Timothy Arceri wrote:
> In RADV we need to offset the writemask because
>
I asked a question on patch 3. Other than that, the series is:
Reviewed-by: Marek Olšák
Marek
On Sun, Oct 22, 2017 at 9:18 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> Fixes non-deterministic failures in
> dEQP-EGL.functional.sharing.gles2.multithread.simple_egl_sync.images.texture_so
On 31/10/17 17:59, Scott D Phillips wrote:
Lionel Landwerlin writes:
Signed-off-by: Lionel Landwerlin
---
src/intel/tools/aubinator.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 48d4456cc16..2c4e
On Sun, Oct 22, 2017 at 9:18 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> ---
> src/mesa/state_tracker/st_cb_flush.c | 4 ++--
> src/mesa/state_tracker/st_cb_syncobj.c | 26 --
> 2 files changed, 26 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/state_
Lionel Landwerlin writes:
> Signed-off-by: Lionel Landwerlin
> ---
> src/intel/tools/aubinator.c | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
> index 48d4456cc16..2c4eaab1701 100644
> --- a/src/intel/to
On 31 October 2017 at 11:19, Eric Engestrom wrote:
> a few issues being fixed here:
> - symbol checks would silently pass when the lib is missing
> - meson was failing to pass the lib to the scripts
> - the egl symbol check only works on the non-libglvnd lib (we probably
> want to have one for l
Instead of letting nir lower nir_intrinsic_load_subgroup_all_mask this
is now generated directly. This is more efficient because it can be
calculated in the compiler based on the dispatch width.
Sadly it’s still not totally ideal because the constant doesn’t seem
to get propagated and there is sti
Similar to nir_intrinsic_load_subgroup_eq_mask and friends, this adds
an intrinsic which contains a bit for every member of the group. This
doesn’t have a corresponding GLSL builtin but it will be used to
calculate nir_intrinsic_load_subgroup_g{t,e}_mask. It has its own nir
option on whether to low
Previously the values were calculated by just shifting ~0 by the
invocation ID. This would end up including bits that are higher than
gl_SubGroupSizeARB. The corresponding CTS test effectively requires that
these high bits be zero so it was failing. There is a Piglit test as
well but this appears t
Here are some patches to fix the values for gl_SubGroupG{e,t}MaskARB.
This fixes a corresponding CTS test.
The first patch alone fixes the problem but it generates somewhat
inefficient code. The next two patches try to address this but I’m not
really sure whether it’s worth it and maybe someone wi
For patch 20:
Acked-by: Marek Olšák
For patches 1-13, 15-19, 21-25 (assuming my comment on patch 9 is
taken into account):
Reviewed-by: Marek Olšák
I commented on patch 14.
Marek
On Sun, Oct 22, 2017 at 9:08 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> ---
> src/gallium/drivers
Thank you for helping me out with this Ken!
On Tue, Oct 31, 2017 at 3:50 AM, Kenneth Graunke
wrote:
> On Monday, October 30, 2017 2:14:24 PM PDT Plamena Manolova wrote:
> > This patch modifies the ARB_indirect_parameters logic in
> > brw_draw_prims, so that our implementation isn't affected if
>
I would be grateful if you would give r300 a whirl. I do have patches that are
almost ready for the gallium media state trackers (just needs a little polish,
and some testing). Clover will be the next thing on my list after the media
stuff.
Dylan
Quoting Aaron Watry (2017-10-30 20:47:21)
> Hi Dyl
From: Marek Olšák
It's inaccurate. Instead, see the copyright and use "git log" and
"git blame" to know the authorship.
---
src/amd/common/ac_binary.c | 4
src/amd/common/ac_binary.h | 3 ---
src/amd/common/ac_debug.c
I've pushed the gbm patch mentioned, and I'll look into the wayland symbols.
for the series:
Reviewed-by: Dylan Baker
Quoting Eric Engestrom (2017-10-31 04:19:57)
> a few issues being fixed here:
> - symbol checks would silently pass when the lib is missing
> - meson was failing to pass the lib
Lionel Landwerlin writes:
> This is required to have output redirected to something else than a
> file descriptor (stdout).
>
> Signed-off-by: Lionel Landwerlin
> ---
> src/intel/compiler/brw_compile_clip.c | 5 +-
> src/intel/compiler/brw_compile_sf.c | 5 +-
> src/intel/compiler
Lionel Landwerlin writes:
> Signed-off-by: Lionel Landwerlin
> ---
> src/intel/common/gen_decoder.c | 59
> ++
> 1 file changed, 37 insertions(+), 22 deletions(-)
>
> diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
> index a6
https://bugs.freedesktop.org/show_bug.cgi?id=103526
--- Comment #3 from spbroth...@inbox.ru ---
(In reply to Eric Engestrom from comment #1)
> Thank you for running tests on PowerPC, we don't have many people with the
> right hardware to do that :)
> big-/little-endian issues unfortunately come u
On 2017-10-31 11:50 AM, Samuel Pitoiset wrote:
On 10/31/2017 04:40 PM, Andrey Grodzovsky wrote:
Signed-off-by: Andrey Grodzovsky
---
configure.ac | 2 +-
src/gallium/drivers/radeon/r600_pipe_common.c | 1 +
src/gallium/drivers/radeon/r600_pipe_common.h |
Fixes: f03b7c9ad92c1656a221 "winsys/amdgpu: Add R600_DEBUG flag to
reserve VMID per ctx."
Cc: Andrey Grodzovsky
Signed-off-by: Eric Engestrom
---
meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meson.build b/meson.build
index d6a2d83b5
On Sun, Oct 22, 2017 at 9:07 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> ---
> src/gallium/drivers/radeonsi/si_fence.c | 83
> -
> 1 file changed, 82 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_fence.c
> b/src/gallium/d
I think I'd prefer the commit message to say something like:
i965: properly initialize brw->cs.base.stage to MESA_SHADER_COMPUTE
and then keep all the VS stuff in the body of the message. That's a better
description of the change even though the fallout is rather whacky. With
that,
Reviewed-by
I addressed the feedback and pushed the patch.
Marek
On Tue, Oct 31, 2017 at 4:50 PM, Michel Dänzer wrote:
> On 31/10/17 04:40 PM, Andrey Grodzovsky wrote:
>> Signed-off-by: Andrey Grodzovsky
>
> [...]
>
>> diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
>> b/src/gallium/winsys/amdgpu/d
Signed-off-by: Andrey Grodzovsky
---
configure.ac | 2 +-
src/gallium/drivers/radeon/r600_pipe_common.c | 1 +
src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 8
src/gallium/winsys/amdgpu/drm/amdgpu_cs.
On 31/10/17 04:40 PM, Andrey Grodzovsky wrote:
> Signed-off-by: Andrey Grodzovsky
[...]
> diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
> b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
> index 8f43e93..1155492 100644
> --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
> +++ b/src/gallium/wi
On 10/31/2017 04:40 PM, Andrey Grodzovsky wrote:
Signed-off-by: Andrey Grodzovsky
---
configure.ac | 2 +-
src/gallium/drivers/radeon/r600_pipe_common.c | 1 +
src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
On Tue, Oct 31, 2017 at 2:08 AM, Dave Airlie wrote:
>> +LLVMValueRef
>> +ac_build_subgroup_inclusive_scan(struct ac_llvm_context *ctx,
>> +LLVMValueRef src,
>> +ac_reduce_op reduce,
>> +LLVMValueRef ide
https://bugs.freedesktop.org/show_bug.cgi?id=103526
--- Comment #2 from Emil Velikov ---
As Eric mentioned - Mesa 13.0.x is EOL. We had a number of PPC fixes since
then, so I'd encourage you to try 17.2.3/17.2.4 or master.
--
You are receiving this mail because:
You are the QA Contact for the b
On 31 October 2017 at 14:42, Lionel Landwerlin
wrote:
> On 31/10/17 12:59, Emil Velikov wrote:
>>
>> Hi Lionel,
>>
>> On 30 October 2017 at 16:58, Lionel Landwerlin
>> wrote:
>>
>>> create mode 100644 src/intel/tools/aubinator_imgui_widgets.cpp
>>> create mode 100644 src/intel/tools/aubinator
Sorry, wrong list...
On Tue, Oct 31, 2017 at 9:58 AM, Rob Herring wrote:
> EGL, gralloc, and HWC must all have a common definition of fd's and int's
> in native_handle_t to share the fd and width, height, format, etc. of a
> dmabuf.
>
> Move the definition into HWC so we aren't dependent on a spe
EGL, gralloc, and HWC must all have a common definition of fd's and int's
in native_handle_t to share the fd and width, height, format, etc. of a
dmabuf.
Move the definition into HWC so we aren't dependent on a specific gralloc
implementation and so we don't have to create an importer just for
dif
On 31/10/17 12:59, Emil Velikov wrote:
Hi Lionel,
On 30 October 2017 at 16:58, Lionel Landwerlin
wrote:
create mode 100644 src/intel/tools/aubinator_imgui_widgets.cpp
create mode 100644 src/intel/tools/aubinator_imgui_widgets.h
create mode 100644 src/intel/tools/aubinator_ui.cpp
creat
On Tue, Oct 31, 2017 at 12:04 PM, Eric Engestrom
wrote:
> On Tuesday, 2017-10-31 11:37:25 +0100, Erik Faye-Lund wrote:
>> On Tue, Oct 31, 2017 at 11:24 AM, Eric Engestrom
>> wrote:
>> > On Tuesday, 2017-10-31 08:29:28 +0100, Erik Faye-Lund wrote:
>> >> If we don't want to use these deps, there's
On Tue, 2017-10-31 at 07:20 -0700, Jason Ekstrand wrote:
> On Tue, Oct 31, 2017 at 12:01 AM, Iago Toral
> wrote:
> > On Mon, 2017-10-30 at 11:29 -0700, Jason Ekstrand wrote:
> > > On Mon, Oct 30, 2017 at 12:15 AM, Iago Toral
> > > wrote:
> > > > On Fri, 2017-10-27 at 12:21 -0700, Jason Ekstrand w
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