On 09/11/2017 07:09 PM, Emil Velikov wrote:
On 11 September 2017 at 15:39, Gert Wollny wrote:
The assert checks whether pshader->num_arrays != 0, but the code
after the assert actually branches based on the same check.
Removing this assert fixes:
piglit spec@arb_gpu_shader5@execution@sample
On 2017-09-11 21:44:32, Timothy Arceri wrote:
> On 12/09/17 14:23, Ian Romanick wrote:
> > On 09/08/2017 01:59 AM, Kenneth Graunke wrote:
> >>
> >> We shouldn't use SPIR-V for the shader cache.
> >>
> >> The compilation process for GLSL is: GLSL -> GLSL IR -> NIR -> i965 IRs.
> >> Storing the conte
On Monday, September 11, 2017 9:23:05 PM PDT Ian Romanick wrote:
> On 09/08/2017 01:59 AM, Kenneth Graunke wrote:
> > On Thursday, September 7, 2017 4:26:04 PM PDT Jordan Justen wrote:
> >> On 2017-09-06 14:12:41, Daniel Schürmann wrote:
> >>> Hello together!
> >>> Recently, we had a small discussi
This was a bugfix to the spec addressed in OpenGL 4.5 and there is
a CTS test to check this.
Fixes:
KHR-GL45.shader_atomic_counters.negative-unsized-array
---
src/compiler/glsl/ast_to_hir.cpp | 11 +++
1 file changed, 11 insertions(+)
diff --git a/src/compiler/glsl/ast_to_hir.cpp b/src/c
https://bugs.freedesktop.org/show_bug.cgi?id=102665
--- Comment #1 from Gert Wollny ---
Strange, this file should be compiled with c++11, the construct is legal
c++11, this and according to [1] g++4.8 should support it (right angle
brackets N1757[2]).
Could you confirm that -std=s++11 or std=c
On Mon, 2017-09-11 at 15:55 +0300, Pohjolainen, Topi wrote:
> On Mon, Sep 11, 2017 at 02:33:09PM +0200, Iago Toral Quiroga wrote:
> > We were skipping this fallback for depth, but not for stencil
> > which the hardware always requires to be W-tiled.
> >
> > Also, make the checks for whether we nee
On Monday, September 11, 2017 9:27:28 PM PDT Ian Romanick wrote:
> And... we wouldn't necessarily have to throw away cached SPIR-V when the
> Mesa version changes... though we may want to anyway.
Sure, SPIR-V is a defined, stable format, and that's a nice property.
If we invented a serialized NIR
https://bugs.freedesktop.org/show_bug.cgi?id=102597
--- Comment #7 from Niklas Haas ---
> That seems kinda silly, because it means that TIME_ELAPSED should be
> (draw_finish_time - previous_draw_finish_time). What if they finish nearly at
> the same time? TIME_ELAPSED would be close to 0, and t
On 12/09/17 14:23, Ian Romanick wrote:
On 09/08/2017 01:59 AM, Kenneth Graunke wrote:
On Thursday, September 7, 2017 4:26:04 PM PDT Jordan Justen wrote:
On 2017-09-06 14:12:41, Daniel Schürmann wrote:
Hello together!
Recently, we had a small discussion (off the list) about the NIR
serializatio
Reviewed-by: Tapani Pälli
On 09/12/2017 03:04 AM, Kenneth Graunke wrote:
---
docs/envvars.html | 2 ++
docs/shading.html | 15 +++
2 files changed, 17 insertions(+)
diff --git a/docs/envvars.html b/docs/envvars.html
index ca553e5397f..34ff11a7a17 100644
--- a/docs/envvars.html
On 09/11/2017 09:23 PM, Ian Romanick wrote:
> On 09/08/2017 01:59 AM, Kenneth Graunke wrote:
>> On Thursday, September 7, 2017 4:26:04 PM PDT Jordan Justen wrote:
>>> On 2017-09-06 14:12:41, Daniel Schürmann wrote:
Hello together!
Recently, we had a small discussion (off the list) about t
On 09/07/2017 04:26 PM, Jordan Justen wrote:
> On 2017-09-06 14:12:41, Daniel Schürmann wrote:
>> Hello together!
>> Recently, we had a small discussion (off the list) about the NIR
>> serialization, which was previously discussed in [RFC] ARB_gl_spirv and
>> NIR backend for radeonsi.
>>
>> As th
On 09/08/2017 01:59 AM, Kenneth Graunke wrote:
> On Thursday, September 7, 2017 4:26:04 PM PDT Jordan Justen wrote:
>> On 2017-09-06 14:12:41, Daniel Schürmann wrote:
>>> Hello together!
>>> Recently, we had a small discussion (off the list) about the NIR
>>> serialization, which was previously di
On 12/09/17 00:57, Nicolai Hähnle wrote:
On 11.09.2017 16:47, Ilia Mirkin wrote:
On Mon, Sep 11, 2017 at 10:44 AM, Nicolai Hähnle
wrote:
From: Nicolai Hähnle
It breaks integer inputs and outputs on vertex processing stages
(e.g. geometry stages). Instead, rely on the driver to choose
smoot
https://bugs.freedesktop.org/show_bug.cgi?id=102597
--- Comment #6 from Marek Olšák ---
Here's why the times are different: Draw calls are not executed sequentially,
but instead they are executed in parallel when it's possible. If you start 10
draw calls wrapped around 10 TIME_ELAPSED queries, th
---
docs/envvars.html | 2 ++
docs/shading.html | 15 +++
2 files changed, 17 insertions(+)
diff --git a/docs/envvars.html b/docs/envvars.html
index ca553e5397f..34ff11a7a17 100644
--- a/docs/envvars.html
+++ b/docs/envvars.html
@@ -133,6 +133,8 @@ that variable is set), or else with
https://bugs.freedesktop.org/show_bug.cgi?id=102597
--- Comment #5 from Niklas Haas ---
> The TIME_ELAPSED queries tell me my rendering takes ~8ms, but I'm getting 200
> fps.
Oops, my bad - I was measuring FPS incorrectly. With the measurement fixed, and
the patch in question reverted, the numb
https://bugs.freedesktop.org/show_bug.cgi?id=102597
--- Comment #4 from Niklas Haas ---
Also, even with this patch reverted, the reported timers are unrealistic: The
TIME_ELAPSED queries tell me my rendering takes ~8ms, but I'm getting 200 fps.
(With higher settings, it tells me it takes ~20ms bu
On Sat 02 Sep 2017, Jason Ekstrand wrote:
> On Sat, Sep 2, 2017 at 1:17 AM, Chad Versace <[1]chadvers...@chromium.org>
> wrote:
>
> This patch adds a flag param to anv_bo_cache_import() and defines
> exactly one flag, ANV_BO_CACHE_IMPORT_NO_CLOSE_FD. If set, the function
> will not clo
On Sat 02 Sep 2017, Jason Ekstrand wrote:
> On Sat, Sep 2, 2017 at 1:17 AM, Chad Versace <[1]chadvers...@chromium.org>
> wrote:
>
> If this flag is set, then the image and it's device memory have the same
> lifetime. vkDestroyImage will free its anv_device_memory.
>
> We need this fo
https://bugs.freedesktop.org/show_bug.cgi?id=102597
--- Comment #3 from Niklas Haas ---
Hello, this is the author of the affected `mpv` code.
I've reproduced and bisected the mesa issue, and the first bad commit is:
bd4b224fa6630262df2b70fd6a6fc8080ad59086 is the first bad commit
commit bd4b224
https://bugs.freedesktop.org/show_bug.cgi?id=102665
Bug ID: 102665
Summary: test_glsl_to_tgsi_lifetime.cpp:53:67: error: ‘>>’
should be ‘> >’ within a nested template argument list
Product: Mesa
Version: git
Hardware: x86-6
Reviewed-by: Bas Nieuwenhuizen
for all 3.
On Mon, Sep 11, 2017 at 5:52 PM, Samuel Pitoiset
wrote:
> To be consistent with radv_emit_compute_pipeline().
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_cmd_buffer.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
On Mon, Sep 11, 2017 at 9:26 AM, Dave Airlie wrote:
> From: Dave Airlie
>
> This realigns this code with the radeonsi version and fixes
> the indirect case to work properly.
>
> Signed-off-by: Dave Airlie
> ---
> src/amd/vulkan/si_cmd_buffer.c | 18 --
> 1 file changed, 12 inser
More tests could probably be added, but this should cover
concatenation, resizing, clearing, formatted printing,
and checking the length, so it should be quite complete.
V2: Address review feedback from Timothy, plus fixes
- Use a large enough char array
- Actually test the formatted appendi
Based on Vladislav Egorovs work on the preprocessor, but split
out to a util functionality that should be universal. Setup, teardown,
memory handling and general layout is modeled around the hash_table
and the set, to make it familiar for everyone.
A notable change is that this implementation is a
Migrate removal of line continuations to string_buffer. Before this
it used ralloc_strncat() to append strings, which internally
each time calculates strlen() of its argument. Its argument is
entire shader, so it multiple time scans the whole shader text.
Signed-off-by: Vladislav Egorov
Reviewed
I think I should have addressed all review feedback pointed out
to me by Nicolai, fixed the build issues with the tests (thanks
to Eric and Emil) and I've discovered another bug thanks to
strengthening the gtest test even more. I've also given it some
more polishing and slight modifications to make
Length of the token was already calculated by flex and stored in yyleng,
no need to implicitly call strlen() via linear_strdup().
Reviewed-by: Nicolai Hähnle
Reviewed-by: Timothy Arceri
V2: Also convert this pattern in glsl_lexer.ll
V3: Remove a misplaced comment
Fix compile warning from V
Reviewed-by: Nicolai Hähnle
V2: Pointed out by Timothy
- Fix pp.c reralloc size issue and comment
V3 - Use vprintf instead of printf where we should
- Fixes failing make-check tests
V4 - Use buffer_append_char in a couple more places
---
src/compiler/glsl/glcpp/glcpp-parse.y | 195 ++
---
src/gallium/drivers/swr/rasterizer/core/binner.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/swr/rasterizer/core/binner.cpp
b/src/gallium/drivers/swr/rasterizer/core/binner.cpp
index a6713e8..e08e489 100644
--- a/src/gallium/drivers/swr/rasterizer
SwrStallBE stalls the backend threads until all work submitted before
the stall has finished. The frontend threads can continue to make
forward progress.
---
src/gallium/drivers/swr/rasterizer/core/api.cpp | 9 +
src/gallium/drivers/swr/rasterizer/core/api.h | 8
2 files change
---
src/gallium/drivers/swr/rasterizer/jitter/jit_api.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/jit_api.h
b/src/gallium/drivers/swr/rasterizer/jitter/jit_api.h
index 9f69669..e589d2c 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/jit
Add InstanceStrideEnable field and rename InstanceDataStepRate to
InstanceAdvancementState in INPUT_ELEMENT_DESC structure.
Add stubs for handling InstanceStrideEnable in FetchJit::JitLoadVertices()
and FetchJit::JitGatherVertices() and assert if they are triggered.
---
src/gallium/drivers/swr/ra
---
.../swr/rasterizer/codegen/gen_llvm_types.py| 2 +-
src/gallium/drivers/swr/rasterizer/core/state.h | 5 +++--
.../drivers/swr/rasterizer/memory/StoreTile.h | 4 ++--
.../drivers/swr/rasterizer/memory/TilingFunctions.h | 2 +-
src/gallium/drivers/swr/swr_context.cpp
---
src/gallium/drivers/swr/rasterizer/core/clip.h | 35 +++---
1 file changed, 21 insertions(+), 14 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/core/clip.h
b/src/gallium/drivers/swr/rasterizer/core/clip.h
index e0aaf81..cde5261 100644
--- a/src/gallium/drive
---
src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp
b/src/gallium/drivers/swr/rasterizer/jitter/JitManager.cpp
index fc32b62..e4281f8 100644
--- a/src/galliu
Add new field in SWR_BACKEND_STATE::vertexClipCullOffset to specify the
start of the clip/cull section of the vertex header. Removed use of
hardcoded slot from binner.
---
src/gallium/drivers/swr/rasterizer/core/binner.cpp | 11 ++-
src/gallium/drivers/swr/rasterizer/core/state.h| 9
Make more robust to handle strange strange configurations like a vmware
exported 4-way numa X 1-core configuration.
---
.../drivers/swr/rasterizer/core/threads.cpp| 81 ++
1 file changed, 38 insertions(+), 43 deletions(-)
diff --git a/src/gallium/drivers/swr/rasterizer
Moved from from SWR_RASTSTATE to SWR_BACKEND_STATE.
---
.../drivers/swr/rasterizer/core/backend.cpp| 4 ++--
.../drivers/swr/rasterizer/core/backend_impl.h | 2 +-
.../drivers/swr/rasterizer/core/backend_sample.cpp | 4 ++--
.../swr/rasterizer/core/backend_singlesample.cpp | 4 ++
Mostly some api changes, plus making the cpu topology code a bit more
robust in the face of some odd configurations seen in virtualized
environments.
No piglit or vtk ctest regressions.
Tim Rowley (10):
swr/rast: Add new API SwrStallBE
swr/rast: Move clip/cull enables in API
swr/rast: Start
https://bugs.freedesktop.org/show_bug.cgi?id=102564
George Kyriazis changed:
What|Removed |Added
CC||george.kyria...@intel.com
--
You are
https://bugs.freedesktop.org/show_bug.cgi?id=102564
--- Comment #3 from George Kyriazis ---
Alex,
how did you get GPU Caps Viewer to pick up the mesa libs? I tried copying the
mesa libs to \windows\system32 (that works will other apps), but GPU Caps
Viewer looks like it's doing something differ
On Monday, September 11, 2017 10:54:45 AM PDT Eric Engestrom wrote:
> On 11 September 2017 18:33:27 BST, Emil Velikov
> wrote:
> > > and then each env var in the doc would get an annotation:
> > > LIBGL_ALWAYS_SOFTWARE (BOOL)
> > > LIBGL_SHOW_FPS (INT)
> > This should really be a
On 11 September 2017 18:33:27 BST, Emil Velikov
wrote:
> On 8 September 2017 at 18:36, Eric Engestrom
> wrote:
> > On Friday, 2017-09-08 08:13:54 -0700, Kenneth Graunke wrote:
> >> On Friday, September 8, 2017 6:33:44 AM PDT Emil Velikov wrote:
> >> > Hi Eric,
> >> >
> >> > On 8 September 2017 a
On 8 September 2017 at 13:40, Eric Engestrom wrote:
> After fixing MESA_NO_ERROR=0 yesterday, I decided to have a look and do
> the same change with a bunch of other env vars.
>
> I also updated the docs to suggest setting true/false as it's usually
> clearer (what's LIBGL_DRI3_DISABLE=0? am I dis
On 8 September 2017 at 13:40, Eric Engestrom wrote:
> Instead of setting based on set/unset, allow users to use boolean values.
> In the docs, use `ALWAYS=true` instead of `ALWAYS=1` as it's clearer IMO.
>
> Signed-off-by: Eric Engestrom
> ---
> docs/envvars.html | 2 +-
> docs/libGL.txt| 2
On 8 September 2017 at 13:40, Eric Engestrom wrote:
> docs/releasing.html | 4 ++--
In light of the earlier "can accept both true and 1" I wouldn't bother
with this file, but meh.
> #if defined(GLX_DIRECT_RENDERING) && !defined(GLX_USE_APPLEGL)
> glx_direct = (getenv("LI
On 8 September 2017 at 18:36, Eric Engestrom wrote:
> On Friday, 2017-09-08 08:13:54 -0700, Kenneth Graunke wrote:
>> On Friday, September 8, 2017 6:33:44 AM PDT Emil Velikov wrote:
>> > Hi Eric,
>> >
>> > On 8 September 2017 at 13:40, Eric Engestrom
>> > wrote:
>> > > Instead of setting based o
From: Emil Velikov
Enable the toggle to catch when the library is missing from the link
path. Better to test, fail and address before releasing Mesa ;-)
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Emil Velikov
---
Makefile.am | 1 +
1 file changed, 1 insertion(+)
diff --git a/Makefil
On 11 September 2017 at 17:38, Gert Wollny wrote:
> Am Montag, den 11.09.2017, 17:05 +0100 schrieb Emil Velikov:
>> On 10 September 2017 at 12:17, Gert Wollny
>> wrote:
>> > configure picks up libunwind automatically if it is available and
>> > links libmesagallium against it. Because static link
On Mon, Sep 11, 2017 at 04:11:33PM +, Anuj Phogat wrote:
> See Mesa commits: ebc5ccf and b2dae9f
I believe we need to be in sync between multiple gfx stack components,
but I don't believe we should remove ids.
In the past we had cases where we noticed a product group using a listed
id to do
On Mon, Sep 11, 2017 at 2:15 AM, Pohjolainen, Topi <
topi.pohjolai...@gmail.com> wrote:
> On Mon, Sep 11, 2017 at 10:55:36AM +0200, Iago Toral wrote:
> > On Fri, 2017-09-08 at 11:44 +0300, Pohjolainen, Topi wrote:
> > > On Fri, Sep 08, 2017 at 09:41:11AM +0200, Iago Toral wrote:
> > > > On Fri, 20
On 11 September 2017 at 07:59, Michel Dänzer wrote:
> On 11/09/17 03:36 PM, Gert Wollny wrote:
>> Hi Michel,
>>
>> I can confirm that the problem exists on
>>
>>8d6b97a815874c7b695471a259fe4b6689890206
>>
>> i.e. for me ir_expression_operation.h is created in the build
>> directory - and the
On Mon, Sep 11, 2017 at 8:00 AM, Jose Maria Casanova Crespo <
jmcasan...@igalia.com> wrote:
> From: Alejandro Piñeiro
>
> Although from SPIR-V point of view, rounding modes are attached to the
> operation/destination, on i965 it is a status, so we don't need to
> explicitly set the rounding mode
Am Montag, den 11.09.2017, 16:58 +0100 schrieb Emil Velikov:
> Hi Gert,
>
> On 10 September 2017 at 12:17, Gert Wollny
> wrote:
> > Fixes: build failure in travis configuration "make Gallium ST
> > Other"
>
> Please use "Fixes: " only with $sha ("commit summary")
>
> > with libunwind enabled (h
Am Montag, den 11.09.2017, 17:05 +0100 schrieb Emil Velikov:
> On 10 September 2017 at 12:17, Gert Wollny
> wrote:
> > configure picks up libunwind automatically if it is available and
> > links libmesagallium against it. Because static linking is used
> > all targets that use libmesagallium also
On Monday, 2017-09-11 15:58:11 +, Cherniak, Bruce wrote:
> >
> > On Sep 7, 2017, at 5:21 AM, Eric Engestrom
> > wrote:
> >
> > Signed-off-by: Eric Engestrom
> > ---
> > src/gallium/drivers/swr/rasterizer/memory/StoreTile.h | 10 ++
> > 1 file changed, 6 insertions(+), 4 deletions(-)
On Mon, Sep 11, 2017 at 1:42 AM, Samuel Iglesias Gonsálvez <
sigles...@igalia.com> wrote:
>
>
> On 09/07/2017 07:15 PM, Jason Ekstrand wrote:
>
> On Tue, Aug 29, 2017 at 3:04 AM, Samuel Iglesias Gonsálvez <
> sigles...@igalia.com> wrote:
>
>> When creating a vtn_pointer for an OpVariable, the bloc
On 11 September 2017 at 15:39, Gert Wollny wrote:
> The assert checks whether pshader->num_arrays != 0, but the code
> after the assert actually branches based on the same check.
>
> Removing this assert fixes:
> piglit spec@arb_gpu_shader5@execution@samplemaskin-indirect
Both assert() and if (
On 10 September 2017 at 12:17, Gert Wollny wrote:
> configure picks up libunwind automatically if it is available and
> links libmesagallium against it. Because static linking is used
> all targets that use libmesagallium also need to link against libunwind
> in this case, and this should be check
Hi Gert,
On 10 September 2017 at 12:17, Gert Wollny wrote:
> Fixes: build failure in travis configuration "make Gallium ST Other"
Please use "Fixes: " only with $sha ("commit summary")
> with libunwind enabled (https://travis-ci.org/gerddie/mesa/jobs/273673597)
> ---
> src/gallium/targets/dri/M
>
> On Sep 7, 2017, at 5:21 AM, Eric Engestrom wrote:
>
> Signed-off-by: Eric Engestrom
> ---
> src/gallium/drivers/swr/rasterizer/memory/StoreTile.h | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h
> b/sr
If the upload BO allocation failed.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 22 ++
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 5e63089e4a..920eb28d81 100
To be consistent with radv_emit_compute_pipeline().
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index b223bc0009..3e9706e421 100
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 3e9706e421..5e63089e4a 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/s
Vulkan needs to be able to clear any texture you can create. We want to
add support for VK_FORMAT_R8_SRGB and we need to use L8_UNORM_SRGB to do
that so we need to be able to clear it.
---
src/intel/blorp/blorp_clear.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/intel/blorp/blorp_
Unreal Engine 4 seems to really like this format for some reason. We
don't technically have the hardware format but we do have L8_SRGB. It's
easy enough to fake with that and a swizzle.
Reviewed-by: Kenneth Graunke
Reviewed-by: Lionel Landwerlin
---
src/intel/vulkan/anv_formats.c | 3 ++-
1 f
On Mon, Sep 11, 2017 at 10:57 AM, Nicolai Hähnle wrote:
> On 11.09.2017 16:47, Ilia Mirkin wrote:
>>
>> On Mon, Sep 11, 2017 at 10:44 AM, Nicolai Hähnle
>> wrote:
>>>
>>> From: Nicolai Hähnle
>>>
>>> It breaks integer inputs and outputs on vertex processing stages
>>> (e.g. geometry stages). Ins
https://bugs.freedesktop.org/show_bug.cgi?id=102596
Cris changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
Reviewed-by: Jason Ekstrand
On Mon, Sep 11, 2017 at 2:41 AM, Samuel Iglesias Gonsálvez <
sigles...@igalia.com> wrote:
> From: "Juan A. Suarez Romero"
>
> When a conditional branch has the same labels in the "if" part and in the
> "else" part, then we have the same cfg block, and it must be hand
On 9 September 2017 at 13:06, Mario Kleiner wrote:
>
>
> On 09/07/2017 04:27 PM, Emil Velikov wrote:
>>
>> Hi Mario,
>>
>> On 5 September 2017 at 06:01, Mario Kleiner
>> wrote:
>>>
>>> Expose formats which are supported at least back to Gen 5 Ironlake,
>>> possibly further. Allow creation of 10 b
Left a couple of tiny comments. With those fixed,
Reviewed-by: Jason Ekstrand
Thanks for working on this!
On Sun, Sep 10, 2017 at 10:29 PM, Tapani Pälli
wrote:
> Here's v3 of VK_EXT_debug_report with fixes to issues found by Jason.
>
> Some example reports:
>
> real performance warning on Ha
On Sun, Sep 10, 2017 at 10:29 PM, Tapani Pälli
wrote:
> Signed-off-by: Tapani Pälli
> ---
> src/intel/vulkan/anv_allocator.c | 8 +---
> src/intel/vulkan/anv_device.c | 38 --
>
> src/intel/vulkan/anv_formats.c | 3 ++-
> src/intel/vulkan/an
From: Nicolai Hähnle
The GLSL rules for interpolateAtSample are unfortunate:
"Returns the value of the input interpolant variable at
the location of sample number sample. If
multisample buffers are not available, the input
variable will be evaluated at the center of the pixel.
From: Nicolai Hähnle
gl_SampleMaskIn is supposed to contain set bits only for the samples that
are covered by the current fragment shader invocation, but the VGPR
initialization hardware loads the set of all bits that are covered at the
current pixel.
Fixes various tests in
dEQP-GLES31.functi
From: Nicolai Hähnle
---
src/gallium/drivers/radeonsi/si_state.h | 1 -
src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state.h
b/src/gallium/drivers/radeonsi/si_state.h
index 17d210a3a
From: Nicolai Hähnle
---
src/gallium/drivers/radeonsi/si_debug.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_debug.c
b/src/gallium/drivers/radeonsi/si_debug.c
index 182574d653b..b092eba6ebd 100644
--- a/src/gallium/drivers/radeonsi/si_
From: Nicolai Hähnle
---
src/gallium/drivers/radeonsi/si_state.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index ee070107fd5..da3c7debd57 100644
--- a/src/gallium/d
From: Nicolai Hähnle
If the last operation happens to be a non-draw, such as a
transfer_map that triggers a decompress blit, there may be
interesting messages left in the driver log.
---
src/gallium/drivers/ddebug/dd_context.c | 13 -
src/gallium/drivers/ddebug/dd_draw.c| 2 +-
https://bugs.freedesktop.org/show_bug.cgi?id=98842
Emil Velikov changed:
What|Removed |Added
Resolution|--- |INVALID
Status|NEW
From: Nicolai Hähnle
We need to keep the workaround for older firmware, though.
---
src/gallium/drivers/radeon/r600_query.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_query.c
b/src/gallium/drivers/radeon/r600_query.c
index 03ff1018a
From: Alejandro Piñeiro
Although from SPIR-V point of view, rounding modes are attached to the
operation/destination, on i965 it is a status, so we don't need to
explicitly set the rounding mode if the one we want is already set.
Taking into account that the default mode is RTE, one possible
opt
From: Nicolai Hähnle
---
src/amd/common/ac_gpu_info.c | 10 ++
src/amd/common/ac_gpu_info.h | 3 +++
src/gallium/drivers/radeon/r600_pipe_common.c | 3 +++
3 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/src/amd/common/ac_gpu_info.c b/s
On 11.09.2017 16:47, Ilia Mirkin wrote:
On Mon, Sep 11, 2017 at 10:44 AM, Nicolai Hähnle wrote:
From: Nicolai Hähnle
It breaks integer inputs and outputs on vertex processing stages
(e.g. geometry stages). Instead, rely on the driver to choose
smooth interpolation by default.
---
How about t
https://bugs.freedesktop.org/show_bug.cgi?id=102639
--- Comment #1 from Emil Velikov ---
Hi Thomas,
Can you reproduce this with the GTK3 demos, or it's GTK2 specific?
`make check' works like a charm here - please attach the
src/mesa/main/tests/test-suite.log file.
--
You are receiving this ma
On 11.09.2017 16:42, Marek Olšák wrote:
On Mon, Sep 11, 2017 at 4:12 PM, Nicolai Hähnle wrote:
On 07.09.2017 20:26, Marek Olšák wrote:
From: Marek Olšák
The pass tries to deduce whether tess factors are always written by
all shader invocations.
The implication for radeonsi is that it doesn
On Mon, Sep 11, 2017 at 10:44 AM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> It breaks integer inputs and outputs on vertex processing stages
> (e.g. geometry stages). Instead, rely on the driver to choose
> smooth interpolation by default.
> ---
>
> How about this instead? I haven't fully
From: Nicolai Hähnle
It breaks integer inputs and outputs on vertex processing stages
(e.g. geometry stages). Instead, rely on the driver to choose
smooth interpolation by default.
---
How about this instead? I haven't fully thought it through, but
that's where the INTERP_MODE_SMOOTH is coming f
On Mon, Sep 11, 2017 at 4:12 PM, Nicolai Hähnle wrote:
> On 07.09.2017 20:26, Marek Olšák wrote:
>>
>> From: Marek Olšák
>>
>> The pass tries to deduce whether tess factors are always written by
>> all shader invocations.
>>
>> The implication for radeonsi is that it doesn't have to use a barrier
The assert checks whether pshader->num_arrays != 0, but the code
after the assert actually branches based on the same check.
Removing this assert fixes:
piglit spec@arb_gpu_shader5@execution@samplemaskin-indirect
---
src/gallium/drivers/r600/sb/sb_bc_parser.cpp | 2 --
1 file changed, 2 deletio
On Sat, Sep 9, 2017 at 12:17 PM, Chih-Wei Huang wrote:
> Since commit 552aaa11 the compiler complains:
>
> external/mesa/src/amd/common/ac_debug.c:124:51: error: use of undeclared
> identifier 'gfx9d_reg_table'; did you mean 'sid_reg_table'?
> reg = find_register(gfx9d_reg_table,
On 10.09.2017 20:52, Denis Pauk wrote:
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102552
---
src/gallium/auxiliary/util/u_format.c| 4
src/gallium/drivers/r600/r600_state_common.c | 4
src/gallium/drivers/radeonsi/si_state.c | 13 -
3 files ch
On 09.09.2017 19:17, Chih-Wei Huang wrote:
Since commit 552aaa11 the compiler complains:
external/mesa/src/amd/common/ac_debug.c:124:51: error: use of undeclared
identifier 'gfx9d_reg_table'; did you mean 'sid_reg_table'?
reg = find_register(gfx9d_reg_table,
ARRAY_SIZE(gfx9d_r
On 07.09.2017 20:26, Marek Olšák wrote:
From: Marek Olšák
The pass tries to deduce whether tess factors are always written by
all shader invocations.
The implication for radeonsi is that it doesn't have to use a barrier
near the end of TCS, and doesn't have to use LDS for passing the tess
fact
On 06.09.2017 11:34, Marek Olšák wrote:
From: Marek Olšák
This will be more useful once we have sync_file support.
---
src/gallium/drivers/radeon/r600_pipe_common.c | 44 +++
src/gallium/drivers/radeon/radeon_winsys.h| 7 +
src/gallium/winsys/amdgpu/drm/amdg
On 07.09.2017 15:07, Bas Nieuwenhuizen wrote:
On Thu, Sep 7, 2017, at 14:52, Nicolai Hähnle wrote:
On 07.09.2017 12:26, Dave Airlie wrote:
On 7 Sep. 2017 6:34 pm, "Nicolai Hähnle" mailto:nhaeh...@gmail.com>> wrote:
On 07.09.2017 09 :58, Bas Nieuwenhuizen wrote:
I'm not reall
It's obviously misformed, and it's triggering on
dEQP-GLES31.functional.program_interface_query.program_input.type.separable_geometry.int
and a few related tests, which have a geometry shader with
"in highp int target[];"
which for some reason ends up with a "smooth" interpolation. I'm not sure
From: Nicolai Hähnle
---
We hit this assertion with 3D textures on gfx9.
I'm not aware of any 3D-texture-specific failures, but I'm also not sure
whether CMASK is supposed to work with 3D textures or whether we've just
been lucky.
---
src/amd/addrlib/gfx9/gfx9addrlib.cpp | 3 ++-
1 file chang
On Mon, Sep 11, 2017 at 1:59 AM, Timothy Arceri wrote:
> On 11/09/17 14:07, Ilia Mirkin wrote:
>>
>> On Sun, Sep 10, 2017 at 8:03 PM, Timothy Arceri
>> wrote:
>>>
>>> At the risk of sounding like a broken record. Why not just
>>> update/re-factor
>>> cross_validate_outputs_to_inputs()?
>>>
>>> If
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