Re: [Mesa-dev] [RFC] intel/isl: Rewrite gen7_choose_image_alignment_el

On Wednesday, May 10, 2017 10:19:46 AM PDT Emil Velikov wrote: > On 10 May 2017 at 16:38, Jason Ekstrand wrote: > > On Wed, May 10, 2017 at 8:26 AM, Emil Velikov > > wrote: > >> > >> Hi Jason, > >> > >> Humble unrelated question. > >> > >> On 9 May 2017 at 18:00, Jason Ekstrand wrote: > >> > >>

Re: [Mesa-dev] [PATCH] mesa/i965: remove _CurrentFragmentProgram from gl_pipeline_object

On Tuesday, May 9, 2017 6:57:53 PM PDT Timothy Arceri wrote: > This was added in b527dd65c830a as a work around because fixed function > fragment shaders were tracked in ctx->FragmentProgram._Current as > a gl_program rather than gl_shader_program. > > However after my refactoring of the program a

Re: [Mesa-dev] [PATCH 13/13] radeonsi: enable threaded_context

For the series: Tested-by: Dieter Nützel on radeonsi / RX580, 8 GB Unigine_Heaven-4.0 Unigine_Valley-1.0 Unigine_Superposition-1.0 running wine-2.7_gallium_nine+staging Steam: PES2015 + TS2017 LS2015 + LS2017 (!!! ;-) Except: currently _only_ Linux 4.11 (have to compile 4.12-rcx or Alex's t

Re: [Mesa-dev] [PATCH 5/5] radeonsi: get rid of secondary input/output word

For the series: Tested-by: Dieter Nützel on radeonsi / RX580, 8 GB Unigine_Heaven-4.0 Unigine_Valley-1.0 Unigine_Superposition-1.0 Nine (as Nicolai requested): running wine-2.7_gallium_nine+staging Steam: PES2015 + TS2017 LS2015 + LS2017 (!!!) Dieter Am 10.05.2017 19:30, schrieb Nicolai Hä

Re: [Mesa-dev] [PATCH] gallivm: Fix build against LLVM SVN >= r302589

On 10/05/17 11:31 PM, Kai Wasserbäch wrote: > Michel Dänzer wrote on 10.05.2017 10:27: >> From: Michel Dänzer >> >> deregisterEHFrames doesn't take any parameters anymore. >> >> Signed-off-by: Michel Dänzer > > LGTM, Thanks, but the convention here is to spell out the tags. > CC stable? No.

Re: [Mesa-dev] [PATCH 2/2] radeonsi: get rid of secondary input/output word

Hi Nicolai and Marek, Gallium nine associates to every d3d usage/index a generic unique index. That should fit on a 16bits integer, but not for 32 values. We could fit in 32 indexes by recompiling vertex and pixel shaders to match, but one advantage of gallium nine is we don't need much recompi

Re: [Mesa-dev] [PATCH 2/2] radeonsi: get rid of secondary input/output word

On 10/05/2017 09:17, Nicolai Hähnle wrote: On 10.05.2017 08:58, Axel Davy wrote: Hi Nicolai and Marek, Gallium nine associates to every d3d usage/index a generic unique index. That should fit on a 16bits integer, but not for 32 values. Hold on, you're saying the semantic index could be as hi

[Mesa-dev] [AppVeyor] mesa master #4332 failed

Build mesa 4332 failed Commit fe6c407a33 by Dave Airlie on 5/11/2017 12:05 AM: radv: handle fragment shader srgb resolve pass better\n\nBas pointed out the fs key doesn't take srgb into account,\nsince there is just one srgb variant, just create a separate\npip

Re: [Mesa-dev] [PATCH 00/13] Threaded Gallium for RadeonSI

On 11/05/17 08:45, Marek Olšák wrote: Hi, This series adds an optional module into gallium/util that wraps around pipe_context and moves execution of all pipe_context calls into a separate thread. It puts a lot of new requirements on the driver, especially on thread- safetiness of pipe_context

[Mesa-dev] [PATCH] radv: handle fragment shader srgb resolve pass better

From: Dave Airlie Bas pointed out the fs key doesn't take srgb into account, since there is just one srgb variant, just create a separate pipeline for it. This also uses dest format to be more consistent on when srgb matters. Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_meta_resolve_fs.c

Re: [Mesa-dev] [PATCH 22/22] anv: Predicate fast-clear resolves

On Wed, May 03, 2017 at 03:39:51PM -0700, Jason Ekstrand wrote: > On Thu, Apr 27, 2017 at 11:32 AM, Nanley Chery > wrote: > > > There's no image layout to represent a full-RT-cleared color attachment. > > That's one reason we can end up with redundant resolves. Testing has > > shown that such res

[Mesa-dev] [PATCH] radv: Fix resolve shader creation memory leak.

We processed fs key 3 multiple times, resulting in overwriting the pointer in the meta struct and hence only freeing one of them. Fixes: 69136f4e633 "radv/meta: add resolve pass using fragment/vertex shaders" Signed-off-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_meta_resolve_fs.c | 2 +- 1 fi

[Mesa-dev] [AppVeyor] mesa 17.0 #4331 completed

Build mesa 4331 completed Commit 0d053014ac by Andres Gomez on 5/10/2017 9:06 PM: cherry-ignore: rejected commits\n\nstable: rejected commits.\n\nSigned-off-by: Andres Gomez Configure your notification preferences ___

[Mesa-dev] Mesa 17.0.6 release candidate

Hello list, The candidate for the Mesa 17.0.6 is now available. Currently we have:  - 57 queued  - 0 nominated (outstanding)  - and 4 rejected patch(es) The current queue contains fixes in several places. In Mesa Core we include a fix for validating that SSA references use the same number of ch

[Mesa-dev] [PATCH 2/3] anv: Use a designated initializer for filling out relocs

--- src/intel/vulkan/anv_batch_chain.c | 23 +++ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/src/intel/vulkan/anv_batch_chain.c b/src/intel/vulkan/anv_batch_chain.c index 13303b1..cc4f92e 100644 --- a/src/intel/vulkan/anv_batch_chain.c +++ b/src/intel/vulka

[Mesa-dev] [PATCH 3/3] anv: Don't record the handle in the relocation

We use the look-up table mechanism for relocations so this isn't the value we want. The correct value is filled out at execbuf2 time by anv_cmd_buffer_process_relocs. --- src/intel/vulkan/anv_batch_chain.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_ba

[Mesa-dev] [PATCH 1/3] anv: Stop racing relocation offsets

One of the key invariants of the relocation system is the presumed_offset field. The assumption is made that the value currently in the address to be relocated agrees with the presumed_offset field. If presumed_offset is equal to the offset of the BO, the kernel will skip the relocation assuming t

[Mesa-dev] [PATCH 1/2] etnaviv: Only use renderonly_get_handle for GEM handles.

Note that for requests for Prime FDs or flink names, we return handles to the etanviv BO, not the scanout BO. This is at least better than previous behavior of returning GEM handles for a request for an FD or flink name. And add an assert that renderonly_get_handle is only used for getting the GE

[Mesa-dev] [PATCH 0/2] PL111+VC4 renderonly support.

This patch series lets X start running with no patches and no xorg.conf on the BCM Cygnus (pl111/vc4) platform, along with kmscube, glmark2, etc. Eric Anholt (2): etnaviv: Only use renderonly_get_handle for GEM handles. gallium: Add renderonly-based support for pl111+vc4. .travis.yml

[Mesa-dev] [PATCH 2/2] gallium: Add renderonly-based support for pl111+vc4.

This follows the model of imx (display) and etnaviv (render): pl111 is a display-only device, so when asked to do GL for it, we see if we have a vc4 renderer, make the vc4 screen, and have vc4 call back to pl111 to do scanout allocations. The difference from etnaviv is that we share the same BO be

[Mesa-dev] [PATCH 07/13] gallium/radeon: handle other map buffer flags from the threaded context

From: Marek Olšák --- src/gallium/drivers/radeon/r600_buffer_common.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c index 4132858..5d984ea 100644 --- a/src/gallium/drive

[Mesa-dev] [PATCH 10/13] gallium/radeon: subclass and handle threaded_query

From: Marek Olšák --- src/gallium/drivers/radeon/r600_query.c | 14 ++ src/gallium/drivers/radeon/r600_query.h | 5 ++--- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gallium/drivers/radeon/r600_query.c index cbf4bba.

[Mesa-dev] [PATCH 11/13] radeonsi: implement replace_buffer_storage for the threaded context

From: Marek Olšák --- src/gallium/drivers/radeon/r600_buffer_common.c | 23 + src/gallium/drivers/radeon/r600_pipe_common.h | 11 +++- src/gallium/drivers/radeonsi/si_descriptors.c | 34 - 3 files changed, 55 insertions(+), 13 deletions(-) diff --

[Mesa-dev] [PATCH 13/13] radeonsi: enable threaded_context

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.c | 37 +++--- 1 file changed, 34 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 53738a5..c7ca928 100644 --- a/src/gallium/dr

[Mesa-dev] [PATCH 05/13] gallium/radeon: unwrap a context if we get a wrapped one

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.c | 6 -- src/gallium/drivers/radeon/r600_texture.c | 6 -- src/gallium/drivers/radeonsi/si_pipe.c| 2 +- 3 files changed, 9 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_comm

[Mesa-dev] [PATCH 02/13] gallium/u_upload: add u_upload_clone

From: Marek Olšák --- src/gallium/auxiliary/util/u_upload_mgr.c | 7 +++ src/gallium/auxiliary/util/u_upload_mgr.h | 7 +++ 2 files changed, 14 insertions(+) diff --git a/src/gallium/auxiliary/util/u_upload_mgr.c b/src/gallium/auxiliary/util/u_upload_mgr.c index 32697b8..9528495 100644

[Mesa-dev] [PATCH 03/13] gallium/util: add threaded_context as a pipe_context wrapper

From: Marek Olšák --- src/gallium/auxiliary/Makefile.sources |3 + src/gallium/auxiliary/util/u_threaded_context.c| 2300 src/gallium/auxiliary/util/u_threaded_context.h| 349 +++ .../auxiliary/util/u_threaded_context_calls.h | 66 + 4 files c

[Mesa-dev] [PATCH 00/13] Threaded Gallium for RadeonSI

Hi, This series adds an optional module into gallium/util that wraps around pipe_context and moves execution of all pipe_context calls into a separate thread. It puts a lot of new requirements on the driver, especially on thread- safetiness of pipe_context functions, and even expects different be

[Mesa-dev] [PATCH 09/13] gallium/radeon: subclass threaded_transfer

From: Marek Olšák --- src/gallium/drivers/radeon/r600_buffer_common.c | 22 ++--- src/gallium/drivers/radeon/r600_pipe_common.h | 2 +- src/gallium/drivers/radeon/r600_texture.c | 26 - 3 files changed, 25 insertions(+), 25 deletions(-) diff --gi

[Mesa-dev] [PATCH 12/13] gallium/radeon: add threaded context counter monitoring for HUD

From: Marek Olšák "tc" will be initialized by the next commit. --- src/gallium/drivers/radeon/r600_pipe_common.h | 1 + src/gallium/drivers/radeon/r600_query.c | 21 + src/gallium/drivers/radeon/r600_query.h | 3 +++ 3 files changed, 25 insertions(+) diff --git

[Mesa-dev] [PATCH 06/13] gallium/radeon: handle TC_TRANSFER_MAP_THREADED_UNSYNC

From: Marek Olšák --- src/gallium/drivers/radeon/r600_buffer_common.c | 12 +++- src/gallium/drivers/radeon/r600_pipe_common.c | 2 ++ src/gallium/drivers/radeon/r600_pipe_common.h | 1 + 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/r600

[Mesa-dev] [PATCH 08/13] gallium/radeon: subclass threaded_resource

From: Marek Olšák --- src/gallium/drivers/radeon/r600_buffer_common.c | 16 ++-- src/gallium/drivers/radeon/r600_pipe_common.h | 4 ++-- src/gallium/drivers/radeon/r600_texture.c | 20 ++-- 3 files changed, 22 insertions(+), 18 deletions(-) diff --git a/src/

[Mesa-dev] [PATCH 04/13] gallium/radeon: require both WRITE and FLUSH_EXPLICIT in buffer_flush_region

From: Marek Olšák spotted randomly. --- src/gallium/drivers/radeon/r600_buffer_common.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c index b2289e2..6a4846a 100644 --- a

[Mesa-dev] [PATCH 01/13] gallium: add flag PIPE_CONTEXT_PREFER_THREADED

From: Marek Olšák State trackers can set this to tell the driver when u_threaded_context is desirable. --- src/gallium/include/pipe/p_defines.h | 8 src/mesa/state_tracker/st_manager.c | 2 +- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/src/gallium/include/pipe/p_defi

Re: [Mesa-dev] [PATCH 14/22] anv/blorp: Add a surface-state-based CCS resolve function

On Tue, May 02, 2017 at 05:04:05PM -0700, Jason Ekstrand wrote: > On Thu, Apr 27, 2017 at 11:32 AM, Nanley Chery > wrote: > > > This will be used in conjunction with the buffer of clear values. > > > > Signed-off-by: Nanley Chery > > --- > > src/intel/vulkan/anv_blorp.c | 41 +

Re: [Mesa-dev] [PATCH 16/22] anv/cmd_buffer: Add transition_color_buffer()

On Wed, May 10, 2017 at 02:00:19PM -0700, Jason Ekstrand wrote: > On Wed, May 10, 2017 at 1:35 PM, Nanley Chery wrote: > > > On Wed, May 10, 2017 at 12:38:50PM -0700, Jason Ekstrand wrote: > > > On Wed, May 10, 2017 at 11:30 AM, Nanley Chery > > > wrote: > > > > > > > On Wed, May 03, 2017 at 02:

[Mesa-dev] [PATCH 3/4] intel/isl: Refactor gen6_choose_image_alignment_el

--- src/intel/isl/isl_gen6.c | 30 -- 1 file changed, 12 insertions(+), 18 deletions(-) diff --git a/src/intel/isl/isl_gen6.c b/src/intel/isl/isl_gen6.c index b746903..0de9620 100644 --- a/src/intel/isl/isl_gen6.c +++ b/src/intel/isl/isl_gen6.c @@ -88,6 +88,8 @@ isl_ge

[Mesa-dev] [PATCH 2/4] intel/isl: Refactor gen7_choose_image_alignment_el

The Ivy Bridge PRM provides a nice table that handles most of the alignment cases in one place. For standard color buffers we have a little freedom of choice but for most depth, stencil and compressed it's hard-coded. Chad's original functions split halign and valign apart and implemented them al

[Mesa-dev] [PATCH 4/4] intel/isl: Refactor gen8_choose_image_alignment_el

--- src/intel/isl/isl_gen8.c | 193 +-- 1 file changed, 53 insertions(+), 140 deletions(-) diff --git a/src/intel/isl/isl_gen8.c b/src/intel/isl/isl_gen8.c index 01500b8..cd7c703 100644 --- a/src/intel/isl/isl_gen8.c +++ b/src/intel/isl/isl_gen8.c @@ -8

[Mesa-dev] [PATCH 1/4] intel/isl/gen7: Use stencil vertical alignment of 8 instead of 4

From: "Pohjolainen, Topi" The reasoning Chad gave in the comment for choosing a valign of 4 is entirely bunk. The fact that you have to multiply pitch by 2 is completely unrelated to the halign/valign parameters used for texture layout. (Not completely unrelated. W-tiling is just Y-tiling with

Re: [Mesa-dev] [RFC] intel/isl: Rewrite gen7_choose_image_alignment_el

On Wed, May 10, 2017 at 09:14:06PM +0300, Pohjolainen, Topi wrote: > On Tue, May 09, 2017 at 10:00:34AM -0700, Jason Ekstrand wrote: > > The Ivy Bridge PRM provides a nice table that handles most of the > > alignment cases in one place. For standard color buffers we have a > > little freedom of ch

Re: [Mesa-dev] [PATCH 16/22] anv/cmd_buffer: Add transition_color_buffer()

On Wed, May 10, 2017 at 1:35 PM, Nanley Chery wrote: > On Wed, May 10, 2017 at 12:38:50PM -0700, Jason Ekstrand wrote: > > On Wed, May 10, 2017 at 11:30 AM, Nanley Chery > > wrote: > > > > > On Wed, May 03, 2017 at 02:24:19PM -0700, Jason Ekstrand wrote: > > > > On Thu, Apr 27, 2017 at 11:32 AM,

[Mesa-dev] [PATCH 04/17] radeon/vcn: add common decode part

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeon/Makefile.sources | 1 + src/gallium/drivers/radeon/radeon_vcn_dec.c | 672 src/gallium/drivers/radeon/radeon_vcn_dec.h | 3 + 3 files changed, 676 insertions(+) create mode 100644

Re: [Mesa-dev] [PATCH 16/22] anv/cmd_buffer: Add transition_color_buffer()

On Wed, May 10, 2017 at 12:38:50PM -0700, Jason Ekstrand wrote: > On Wed, May 10, 2017 at 11:30 AM, Nanley Chery > wrote: > > > On Wed, May 03, 2017 at 02:24:19PM -0700, Jason Ekstrand wrote: > > > On Thu, Apr 27, 2017 at 11:32 AM, Nanley Chery > > > wrote: > > > > > > > Signed-off-by: Nanley Ch

[Mesa-dev] [PATCH 16/17] winsys/amdgpu: add vcn dec cs support

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c index 8a277d0..a0ef826 100644 -

[Mesa-dev] [PATCH 11/17] radeon/vcn: add decode message for mpeg2 codec

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeon/radeon_vcn_dec.c | 66 + 1 file changed, 66 insertions(+) diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c index 60a6287..0323114

[Mesa-dev] [PATCH 17/17] radeonsi: enable vcn decode

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeonsi/si_uvd.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_uvd.c b/src/gallium/drivers/radeonsi/si_uvd.c index 53a7ce9..d17a665 100644 --- a/src/gallium/dri

[Mesa-dev] [PATCH 06/17] radeon/vcn: add decode message destroy

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeon/radeon_vcn_dec.c | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c index 7b66653..26d0b65 10

[Mesa-dev] [PATCH 03/17] radeon/winsys: add vcn dec ring type

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeon/radeon_winsys.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index 4b7abd2..ab4dcce 100644 --- a/src/gallium/drivers/

[Mesa-dev] [PATCH 07/17] radeon/vcn: add decode message feedback

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeon/radeon_vcn_dec.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c index 26d0b65..2c826c2 100644

[Mesa-dev] [PATCH 10/17] radeon/vcn: add decode message for vc1 codec

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeon/radeon_vcn_dec.c | 72 + 1 file changed, 72 insertions(+) diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c index 447a200..60a6287

[Mesa-dev] [PATCH 13/17] radeon: rename has_uvd info to has_hw_decode

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/r600/r600_pipe.c | 2 +- src/gallium/drivers/radeon/r600_pipe_common.c | 4 ++-- src/gallium/drivers/radeon/radeon_winsys.h| 2 +- src/gallium/drivers/radeonsi/si_pipe.c| 2 +- src/ga

[Mesa-dev] [PATCH 01/17] radeon/vcn: add vcn decode interface

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeon/Makefile.sources | 1 + src/gallium/drivers/radeon/radeon_vcn_dec.h | 501 2 files changed, 502 insertions(+) create mode 100644 src/gallium/drivers/radeon/radeon_vcn_dec.h diff --

[Mesa-dev] [PATCH 14/17] amdgpu/winsys: add vcn dec ip info query

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c index 761a4ca..3e92fff 1

[Mesa-dev] [PATCH 09/17] radeon/vcn: add decode message for hevc codec

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeon/radeon_vcn_dec.c | 225 1 file changed, 225 insertions(+) diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c index c99e770..447a20

[Mesa-dev] [PATCH 05/17] radeon/vcn: add decode message create

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeon/radeon_vcn_dec.c | 22 +- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c index bf70b27.

[Mesa-dev] [PATCH 02/17] radeon/winsys: add uvd enc ring type

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeon/radeon_winsys.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index 2e287c6..4b7abd2 100644 --- a/src/gallium/drivers/

[Mesa-dev] [PATCH 15/17] amdgpu/winsys: set vcn dec as hw decode as well

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c index 3e92fff..97804e1 100644

[Mesa-dev] [PATCH 12/17] radeon/vcn: add decode message for mpeg4 codec

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeon/radeon_vcn_dec.c | 51 + 1 file changed, 51 insertions(+) diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c index 0323114..82dfa71

[Mesa-dev] [PATCH 08/17] radeon/vcn: add decode message decode for avc codec

Signed-off-by: Leo Liu Reviewed-by: Christian König --- src/gallium/drivers/radeon/radeon_vcn_dec.c | 197 +++- 1 file changed, 193 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c index

Re: [Mesa-dev] [PATCH 1/3] genxml: Fix KSPs on Ironlake to be offsets, not pointers.

You can always use a NULL BO but this is fine too. Reviewed-by: Jason Ekstrand On Wed, May 10, 2017 at 12:41 PM, Kenneth Graunke wrote: > We use Instruction State Base Address on Ironlake, so we want KSP to be > an offset not an actual pointer. Gen4/G45 use pointers. > --- > src/intel/genxml

Re: [Mesa-dev] [PATCH 1/2] amd/addrlib: import Raven support

On Wed, May 10, 2017 at 9:36 PM, Nils Wallménius wrote: > Hi Marek, > > A comment below > > Den 10 maj 2017 20:29 skrev "Marek Olšák" : > > From: Marek Olšák > > Cc: 17.1 > Reviewed-by: Alex Deucher > Reviewed-by: Nicolai Hähnle > --- > src/amd/addrlib/gfx9/gfx9addrlib.cpp | 57 >

Re: [Mesa-dev] [PATCH 4/5] etnaviv: clean up sampler view reference counting

Hi Lucas, 2017-05-10 18:01 GMT+02:00 Lucas Stach : > Use the proper pipe_resource_reference function instead of > rolling our own. Would it make sense to convert all gallium drivers using this pattern? greets -- Christian Gmeiner, MSc https://www.youtube.com/user/AloryOFFICIAL https://soundclou

[Mesa-dev] [PATCH 3/3] i965: Port Gen4-5 VS_STATE to genxml.

It's actually not that much code. --- src/intel/genxml/gen4.xml | 2 +- src/intel/genxml/gen45.xml| 2 +- src/intel/genxml/gen5.xml | 2 +- src/mesa/drivers/dri/i965/Makefile.sources| 1 - src/mesa/drivers/dri/i965/brw_vs_stat

[Mesa-dev] [PATCH 2/3] i965: Change GEN_GEN < 7 to GEN_GEN == 6 in 3DSTATE_VS code.

This whole code is surrounded in #if GEN_GEN >= 6, and this code only applies on Sandybridge. So, use GEN_GEN == 6 to reduce the delta in the next patch, when we add Gen4-5 support. --- src/mesa/drivers/dri/i965/genX_state_upload.c | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) d

[Mesa-dev] [PATCH 1/3] genxml: Fix KSPs on Ironlake to be offsets, not pointers.

We use Instruction State Base Address on Ironlake, so we want KSP to be an offset not an actual pointer. Gen4/G45 use pointers. --- src/intel/genxml/gen5.xml | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/src/intel/genxml/gen5.xml b/src/intel/genxml/gen5.xml

Re: [Mesa-dev] [PATCH 16/22] anv/cmd_buffer: Add transition_color_buffer()

On Wed, May 10, 2017 at 11:30 AM, Nanley Chery wrote: > On Wed, May 03, 2017 at 02:24:19PM -0700, Jason Ekstrand wrote: > > On Thu, Apr 27, 2017 at 11:32 AM, Nanley Chery > > wrote: > > > > > Signed-off-by: Nanley Chery > > > --- > > > src/intel/vulkan/genX_cmd_buffer.c | 93 >

Re: [Mesa-dev] [PATCH 1/2] amd/addrlib: import Raven support

Hi Marek, A comment below Den 10 maj 2017 20:29 skrev "Marek Olšák" : From: Marek Olšák Cc: 17.1 Reviewed-by: Alex Deucher Reviewed-by: Nicolai Hähnle --- src/amd/addrlib/gfx9/gfx9addrlib.cpp | 57 ++ ++ src/amd/addrlib/gfx9/gfx9addrlib.h | 8 +++-- src/a

[Mesa-dev] [Bug 100201] Windows scons build with MSVC toolchain and LLVM 4.0 fails

https://bugs.freedesktop.org/show_bug.cgi?id=100201 Anonymous Helper changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

Re: [Mesa-dev] [PATCH] i965: Drop brw_context::viewport_transform_enable.

Reviewed-by: Kristian H. Kristensen On Wed, May 10, 2017 at 12:01 PM, Kenneth Graunke wrote: > This was used by the meta fast clear code. Now that we've switched > back to BLORP, it's always true. > > We might want it back when we add a RECTLIST extension to GL, but > that's someday in the futu

[Mesa-dev] [PATCH] i965: Drop brw_context::viewport_transform_enable.

This was used by the meta fast clear code. Now that we've switched back to BLORP, it's always true. We might want it back when we add a RECTLIST extension to GL, but that's someday in the future... --- src/mesa/drivers/dri/i965/brw_context.c | 1 - src/mesa/drivers/dri/i965/brw_context.h

[Mesa-dev] [AppVeyor] mesa master #4329 failed

Build mesa 4329 failed Commit 0f34b674ed by Kenneth Graunke on 5/8/2017 5:50 AM: i965: Switch BRW_NEW_CURBE_OFFSETS to BRW_NEW_PUSH_CONSTANT_ALLOCATION.\n\nThe BRW_NEW_CURBE_OFFSETS dirty bit is signalled when changing the\npartitioning of the Constant Buffer U

[Mesa-dev] [PATCH 1/6] i965: Make Gen4-5 SF_STATE use the point size calculations from Gen6+.

Apparently, Nanhai made the Gen4-5 point size calculations round to the nearest integer in commit 8d5231a3582e4f2769ac0685cf0174e09750700e, "according to spec". When Eric first ported the driver to Sandybridge, he did not implement this rounding. In the GL 2.1 and 3.0 specs "Basic Point Rasteriza

[Mesa-dev] [PATCH 3/6] i965: Stop using BRW_RASTRULE_LOWER_RIGHT on Gen4-5.

This effectively reverts Robert Ellison's 2009 commit cc8afbd3862fedfe42e51c3774960d1c7078ec53. I'm not seeing any GL spec text indicating that UPPER won't work. On Gen6+, this bit moved to 3DSTATE_WM as a single bit, controlling UPPER_LEFT vs. UPPER_RIGHT. There is no way to request LOWER_RIGHT,

[Mesa-dev] [PATCH 6/6] i965: Use a line end cap width of 0.5 unless smooth lines enabled.

This updates the Gen4-5 code to use a line end cap width of 0.5 for non-smooth lines, and 1.0 for smooth lines - which is what we do on Gen6+. --- src/mesa/drivers/dri/i965/brw_sf_state.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_sf_stat

[Mesa-dev] [PATCH 4/6] genxml: Fix Gen4-5 SF_STATE "Line Width" fixed point type.

It's a U3.1. It became a U3.7 on Sandybridge. --- src/intel/genxml/gen4.xml | 2 +- src/intel/genxml/gen45.xml | 2 +- src/intel/genxml/gen5.xml | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/intel/genxml/gen4.xml b/src/intel/genxml/gen4.xml index d3a2f9264e1..f4d588

[Mesa-dev] [PATCH 5/6] i965: Use brw_get_line_width() in Gen4-5 SF_STATE code.

This unifies the Gen4-5 and Gen6+ line width calculations. I believe it also fixes a bug - we weren't rounding the line width to the nearest integer. The GL 4.5 (and GL 2.1) specs "Wide Lines" section says: "The actual width of non-antialiased lines is determined by rounding the supplied width

[Mesa-dev] [PATCH 2/6] i965: When gl_PointSize is unwritten, default to 1.0 on Gen4-5.

Modern GL specifications say that the point size should be 1.0 when gl_PointSize is unwritten and the last enabled stage is a geometry or tessellation shader. If it's a vertex shader, though, both the GL specs and ES 3.0 spec say that it's undefined - so since Gen4-5 only support vertex shaders, t

Re: [Mesa-dev] [PATCH 16/22] anv/cmd_buffer: Add transition_color_buffer()

On Wed, May 03, 2017 at 02:24:19PM -0700, Jason Ekstrand wrote: > On Thu, Apr 27, 2017 at 11:32 AM, Nanley Chery > wrote: > > > Signed-off-by: Nanley Chery > > --- > > src/intel/vulkan/genX_cmd_buffer.c | 93 ++ > > > > 1 file changed, 93 insertions(+) > > >

[Mesa-dev] [PATCH 1/2] amd/addrlib: import Raven support

From: Marek Olšák Cc: 17.1 Reviewed-by: Alex Deucher Reviewed-by: Nicolai Hähnle --- src/amd/addrlib/gfx9/gfx9addrlib.cpp | 57 src/amd/addrlib/gfx9/gfx9addrlib.h | 8 +++-- src/amd/common/amdgpu_id.h | 10 +++ 3 files changed, 72 insertio

[Mesa-dev] [PATCH 2/2] radeonsi/gfx9: add support for Raven

From: Marek Olšák Cc: 17.1 Reviewed-by: Alex Deucher Reviewed-by: Nicolai Hähnle --- include/pci_ids/radeonsi_pci_ids.h| 2 ++ src/amd/common/amd_family.h | 1 + src/gallium/drivers/radeon/r600_pipe_common.c | 2 ++ src/gallium/drivers/radeonsi/si_pipe.c|

Re: [Mesa-dev] [PATCH 5/5] etnaviv: increment the resource seqno in resource_changed

Seems more straightforward, but I don't know the rationale why it was done the way it was. Reviewed-By: Wladimir J. van der Laan On Wed, May 10, 2017 at 06:01:08PM +0200, Lucas Stach wrote: > From: Philipp Zabel > > Just increment the resource seqno instead of setting the texture > seqno to

Re: [Mesa-dev] [PATCH 15/22] anv/cmd_buffer: Adjust the image view reloc function

On Tue, May 02, 2017 at 05:15:46PM -0700, Jason Ekstrand wrote: > On Thu, Apr 27, 2017 at 11:32 AM, Nanley Chery > wrote: > > > Make the function take in an image instead of an image view. This > > enables us to record relocations for surfaces states created outside of > > the anv_CreateImageView

Re: [Mesa-dev] [RFC] intel/isl: Rewrite gen7_choose_image_alignment_el

On Tue, May 09, 2017 at 10:00:34AM -0700, Jason Ekstrand wrote: > The Ivy Bridge PRM provides a nice table that handles most of the > alignment cases in one place. For standard color buffers we have a > little freedom of choice but for most depth, stencil and compressed it's > hard-coded. Chad's

Re: [Mesa-dev] [PATCH 3/5] etnaviv: apply feature overrides in one central location

Yes, good idea to do this in one place. Reviewed-By: Wladimir J. van der Laan On Wed, May 10, 2017 at 06:01:06PM +0200, Lucas Stach wrote: > This way we can just test the feature bits and don't need to spread > the debug overrides to all locations touching a feature. > > Signed-off-by: Lucas St

Re: [Mesa-dev] [PATCH 13/22] blorp/clear: Add a binding-table-based CCS resolve function

On Tue, May 02, 2017 at 05:01:23PM -0700, Jason Ekstrand wrote: > On Thu, Apr 27, 2017 at 11:32 AM, Nanley Chery > wrote: > > > Signed-off-by: Nanley Chery > > --- > > src/intel/blorp/blorp.h | 9 ++ > > src/intel/blorp/blorp_clear.c | 64 ++ > > ++

Re: [Mesa-dev] [PATCH] gallivm: Fix build against LLVM SVN >= r302589

Reviewed-by: Marek Olšák Marek On Wed, May 10, 2017 at 10:27 AM, Michel Dänzer wrote: > From: Michel Dänzer > > deregisterEHFrames doesn't take any parameters anymore. > > Signed-off-by: Michel Dänzer > --- > src/gallium/auxiliary/gallivm/lp_bld_misc.cpp | 12 +--- > 1 file changed,

Re: [Mesa-dev] [PATCH 1/5] etnaviv: stop oversizing buffer resources

Good catch! Reviewed-By: Wladimir J. van der Laan On Wed, May 10, 2017 at 06:01:04PM +0200, Lucas Stach wrote: > PIPE_BUFFER is a target enum, not a binding. This caused the driver to > up-align the height of buffer resources, leading to largely oversizing > those resources. This is especially b

[Mesa-dev] [PATCH] gallium/tests: fix build after index buffer changes

From: Marek Olšák for some reason, only scons can build these. --- src/gallium/tests/graw/fs-fragcoord.c| 2 +- src/gallium/tests/graw/fs-frontface.c| 2 +- src/gallium/tests/graw/fs-test.c | 2 +- src/gallium/tests/graw/fs-write-z.c | 2 +- src/gallium/tests/graw/gs-tes

[Mesa-dev] [PATCH v3 15/15] egl: advertise EGL_EXT_image_dma_buf_import_modifiers

From: Varad Gautam Signed-off-by: Varad Gautam --- src/egl/drivers/dri2/egl_dri2.c | 6 ++ src/egl/main/eglapi.c | 1 + 2 files changed, 7 insertions(+) diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c index 7f0edf6..853b6e5 100644 --- a/src/egl/driv

[Mesa-dev] [PATCH v3 14/15] egl: implement eglQueryDmaBufModifiersEXT

From: Varad Gautam query and return supported dmabuf format modifiers for EGL_EXT_image_dma_buf_import_modifiers. v2: rebase to master. v3: move format check to the driver instead of making format queries from here and then checking. Signed-off-by: Varad Gautam --- src/egl/drivers/dri2/eg

[Mesa-dev] [PATCH v3 12/15] gallium: introduce format modifier querying

From: Varad Gautam format modifiers tokens are driver specific, and hence, need to come in from the driver. this allows drivers to be queried for supported format modifiers for EGL_EXT_image_dma_buf_import_modifiers. v2: rebase to master. v3: drivers must return false on query failure. v4: use p

[Mesa-dev] [PATCH v3 13/15] st/dri: support format modifier queries

From: Varad Gautam ask the driver for supported modifiers for a given format. bump __DRIimageExtension to 16. v2: move to __DRIimageExtension v16. v3: fail if the supplied format is not supported by driver. v4: purge PIPE_CAP_QUERY_DMABUF_ATTRIBS. Signed-off-by: Varad Gautam --- src/gallium/s

[Mesa-dev] [PATCH v3 09/15] dri: add queryDmaBufFormats and queryDmaBufModifiers to DRIimage

From: Varad Gautam these allow querying the driver for supported dmabuf formats and modifiers. v2: move to __DRIimageExtension version 16. v3: return GLBoolean for error reporting, document params better. Signed-off-by: Varad Gautam --- include/GL/internal/dri_interface.h | 42 +++

[Mesa-dev] [PATCH v3 10/15] st/dri: support format queries

From: Varad Gautam ask the driver for supported dmabuf formats v2: rebase to master. v3: return false on failure. v4: use pscreen->is_format_supported instead of adding a new query. (Lucas Stach) Signed-off-by: Varad Gautam --- src/gallium/state_trackers/dri/dri2.c | 91 +++

[Mesa-dev] [PATCH v3 11/15] egl: implement eglQueryDmaBufFormatsEXT

From: Varad Gautam allow egl clients to query the dmabuf formats supported on this platform. v2: rebase to master. v3: return EGL_FALSE upon failure. Signed-off-by: Louis-Francis Ratté-Boulianne Signed-off-by: Varad Gautam --- src/egl/drivers/dri2/egl_dri2.c | 18 ++ src/egl/

[Mesa-dev] [PATCH v3 08/15] egl_dri2: add support for using modifier attributes in eglCreateImageKHR

From: Varad Gautam allow creating EGLImages with dmabuf format modifiers when target is EGL_LINUX_DMA_BUF_EXT for EGL_EXT_image_dma_buf_import_modifiers. v2: - clear modifier assembling and error label name (Eric Engestrom) v3: - remove goto jumps within switch-case (Emil Velikov) - treat zer

[Mesa-dev] [PATCH v3 05/15] st/dri: enable DRIimage modifier queries

From: Varad Gautam introduce modifier field in DRIimage and set it to DRM_FORMAT_MOD_INVALID for now. support DRIimage modifier queries. Suggested-by: Daniel Stone Signed-off-by: Varad Gautam --- src/gallium/state_trackers/dri/dri2.c | 15 +++ src/gallium/state_trackers/dri/

[Mesa-dev] [PATCH v3 07/15] st/dri: implement DRIimage creation from dmabufs with modifiers

From: Varad Gautam support importing dmabufs into DRIimage while taking format modifiers in account, as per DRIimage extension version 15. bump __DRIimageExtension to 15. v2: initialize winsys modifier to DRM_FORMAT_MOD_INVALID (Daniel Stone) Signed-off-by: Varad Gautam --- src/gallium/inclu

[Mesa-dev] [PATCH v3 00/15] EGL_EXT_image_dma_buf_import_modifiers v3

One more time, from the top! Hi all, The v3 diverges somewhat form v2 while building upon the suggestions received on earlier patchsets, and hence warrants a resend. Here's a breakdown of patches in this series, and the changes since v2. 01 slightly reworks the multi-plane YUV import path in st/

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