On 17/03/17 09:16 AM, Jan Beich wrote:
> Vinson Lee writes:
>
>> echo " `$1`" | sed -E \
>> -e 's/[[[:space:]]]+-m[[^[:space:]]]*//g' \
>> --e 's/[[[:space:]]]+-DNDEBUG\>//g' \
>> +-e 's/[[[:space:]]]+-DNDEBUG[[[:>:]]]//g' \
>
> Try matching some whitespace after th
On 17/03/17 07:42 AM, Vinson Lee wrote:
> Fixes: fe56c745b8cb ("Convert sed(1) syntax to be compatible with FreeBSD and
> OpenBSD")
Not sure how, since \> was already used (way) before that.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast
Using $< in non-suffix make rules is a GNU extension. Explicitly use
the name of the python script to fix the build on OpenBSD.
Signed-off-by: Jonathan Gray
---
src/mapi/glapi/gen/Makefile.am | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mapi/glapi/gen/Makefile.am
On Thu, Mar 16, 2017 at 09:12:38PM -0700, Dylan Baker wrote:
> quoting jason ekstrand (2017-03-16 19:03:15)
> > on march 16, 2017 5:41:24 pm emil velikov wrote:
> > > and meson is not a thing on neither bsd(s), solaris (and derivatives) nor
> > > android :-\
> >
> > i have trouble bringing mysel
On Fri, 2017-03-17 at 16:26 +1100, Edward O'Callaghan wrote:
> We memset number of elements without multiplication by the
> element size.
>
> Signed-off-by: Edward O'Callaghan
> ---
> src/mesa/main/formatquery.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/mesa/m
We memset number of elements without multiplication by the
element size.
Signed-off-by: Edward O'Callaghan
---
src/mesa/main/formatquery.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/formatquery.c b/src/mesa/main/formatquery.c
index 598d34d..50d7c31 100644
-
4, 5 & 6 are:
Reviewed-by: Timothy Arceri
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Reviewed-by: Timothy Arceri
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https://lists.freedesktop.org/mailman/listinfo/mesa-dev
From: Dave Airlie
This just uses an 8-bit clear and packs the values.
Signed-off-by: Dave Airlie
---
src/amd/vulkan/radv_meta_clear.c | 8
1 file changed, 8 insertions(+)
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index c07775f..6583d64 100644
--
On Thu, 2017-03-16 at 18:07 -0700, Francisco Jerez wrote:
> Jan Vesely writes:
>
> > On Thu, 2017-03-16 at 17:22 -0700, Francisco Jerez wrote:
> > > Jan Vesely writes:
> > >
> > > > On Thu, 2017-03-16 at 15:24 -0700, Francisco Jerez wrote:
> > > > > Jan Vesely writes:
> > > > >
> > > > > > v2
Since we already do fabs on the one source, we're guaranteed to get
positive infinity if we get any infinity at all. Since +inf only has
one IEEE 754 representation, we can use an integer comparison and avoid
all of the ordered/unordered issues.
Cc: Dave Airlie
---
src/compiler/spirv/vtn_alu.c
Quoting Marek Olšák (2017-03-16 18:53:59)
> On Fri, Mar 17, 2017 at 12:11 AM, Dylan Baker wrote:
> > Quoting Marek Olšák (2017-03-16 15:36:26)
> >> Is there a way not to use ninja with meson, because ninja redirects
> >> all stderr output from gcc to stdout, which breaks many development
> >> envi
quoting jason ekstrand (2017-03-16 19:03:15)
> on march 16, 2017 5:41:24 pm emil velikov wrote:
> > and meson is not a thing on neither bsd(s), solaris (and derivatives) nor
> > android :-\
>
> i have trouble bringing myself to care. the bsds need to stop using 10
> year old compilers. it can
From: Dave Airlie
SPIR-V defines the f32->f16 operation as flushing denormals to 0,
this compares the class using amd class opcode.
Thanks to Matt Arsenault for figuring it out.
This fix is VI+ only, add a TODO for SI/CIK.
This fixes:
dEQP-VK.spirv_assembly.instruction.compute.opquantize.flush
From: Dave Airlie
This fixes:
dEQP-VK.glsl.builtin.precision.min.*
dEQP-VK.glsl.builtin.precision.max.*
dEQP-VK.glsl.builtin.precision.clamp.*
As weren't flushing the denorms as SPIR-V required.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 8
1 file changed, 8 ins
Am 17.03.2017 um 04:33 schrieb Roland Scheidegger:
> Am 17.03.2017 um 02:29 schrieb Dave Airlie:
>> On 17 March 2017 at 11:09, Jason Ekstrand wrote:
>>> On March 16, 2017 5:04:37 PM Dave Airlie wrote:
>>>
From: Dave Airlie
In order to get isinf(NaN) correct, at least radv can't
>>
Doh missent two patches, will rebase and resend.
Dave.
>
> This fixes:
> dEQP-VK.glsl.builtin.precision.min.*
> dEQP-VK.glsl.builtin.precision.max.*
> dEQP-VK.glsl.builtin.precision.clamp.*
>
> As weren't flushing the denorms as SPIR-V required.
>
> Signed-off-by: Dave Airlie
> ---
> src/amd/com
On Thu, Mar 16, 2017 at 8:33 PM, Roland Scheidegger
wrote:
> Am 17.03.2017 um 02:29 schrieb Dave Airlie:
> > On 17 March 2017 at 11:09, Jason Ekstrand wrote:
> >> On March 16, 2017 5:04:37 PM Dave Airlie wrote:
> >>
> >>> From: Dave Airlie
> >>>
> >>> In order to get isinf(NaN) correct, at lea
From: Dave Airlie
This fixes:
dEQP-VK.glsl.builtin.precision.min.*
dEQP-VK.glsl.builtin.precision.max.*
dEQP-VK.glsl.builtin.precision.clamp.*
As weren't flushing the denorms as SPIR-V required.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 14 --
1 file changed
Am 17.03.2017 um 02:29 schrieb Dave Airlie:
> On 17 March 2017 at 11:09, Jason Ekstrand wrote:
>> On March 16, 2017 5:04:37 PM Dave Airlie wrote:
>>
>>> From: Dave Airlie
>>>
>>> In order to get isinf(NaN) correct, at least radv can't
>>> use an unordered equals which feq has to be for us, this
> On Mar 16, 2017, at 20:02, Dave Airlie wrote:
>
> From: Dave Airlie
>
> SPIR-V defines the f32->f16 operation as flushing denormals to 0,
> this compares the class using amd class opcode.
>
> Thanks to Matt Arsenault for figuring it out.
>
> This fixes:
> dEQP-VK.spirv_assembly.instruction
From: Dave Airlie
SPIR-V defines the f32->f16 operation as flushing denormals to 0,
this compares the class using amd class opcode.
Thanks to Matt Arsenault for figuring it out.
This fixes:
dEQP-VK.spirv_assembly.instruction.compute.opquantize.flush_to_zero
Signed-off-by: Dave Airlie
---
src
On Thu, Mar 16, 2017 at 8:03 PM, Jason Ekstrand
wrote:
> On March 16, 2017 5:41:24 PM Emil Velikov
> wrote:
>
>> On 17 March 2017 at 00:21, Dylan Baker wrote:
>>
>>> Hi Emil,
>>>
>>> Quoting Emil Velikov (2017-03-16 16:35:33)
>>>
While I can see you're impressed by Meson, I would kindly ur
From: Dave Airlie
In order to get isinf(NaN) correct, at least radv can't
use an unordered equals which feq has to be for us, this
passes isinf to the backend and let's it sort it out as it
pleases. This turns lowering on for i965 only as it's the
only other spir-v consumer than radv.
v2: use lo
From: Dave Airlie
This fixes:
dEQP-VK.glsl.builtin.function.common.isinf.*
v2: update to lower_isinf.
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_l
On March 16, 2017 5:41:24 PM Emil Velikov wrote:
On 17 March 2017 at 00:21, Dylan Baker wrote:
Hi Emil,
Quoting Emil Velikov (2017-03-16 16:35:33)
While I can see you're impressed by Meson, I would kindly urge you to
not use it here. As you look closely you can see that one could
trivially i
https://bugs.freedesktop.org/show_bug.cgi?id=100223
Timothy Arceri changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
On Fri, Mar 17, 2017 at 12:11 AM, Dylan Baker wrote:
> Quoting Marek Olšák (2017-03-16 15:36:26)
>> Is there a way not to use ninja with meson, because ninja redirects
>> all stderr output from gcc to stdout, which breaks many development
>> environments that expect errors in stderr?
>>
>> I'm bas
> Another option would be to make this lower_isinf and add a quick lowering
> line to nir_opt_algebraic. That's more idiomatic for nir.
If I do that though won't that mean I have to set lower_isinf for all
current NIR
users?
Dave.
___
mesa-dev mailing
On 17 March 2017 at 11:09, Jason Ekstrand wrote:
> On March 16, 2017 5:04:37 PM Dave Airlie wrote:
>
>> From: Dave Airlie
>>
>> In order to get isinf(NaN) correct, at least radv can't
>> use an unordered equals which feq has to be for us, this
>> passes isinf to the backend and let's it sort it
https://bugs.freedesktop.org/show_bug.cgi?id=100236
--- Comment #3 from Michel Dänzer ---
What does LLVM_CXXFLAGS contain in config.log before and after that commit?
--
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact for the bug.
Jan Vesely writes:
> On Thu, 2017-03-16 at 17:22 -0700, Francisco Jerez wrote:
>> Jan Vesely writes:
>>
>> > On Thu, 2017-03-16 at 15:24 -0700, Francisco Jerez wrote:
>> > > Jan Vesely writes:
>> > >
>> > > > v2: buffers are created with one reference.
>> > > > v3: add pipe_resource reference
On March 16, 2017 5:04:37 PM Dave Airlie wrote:
From: Dave Airlie
In order to get isinf(NaN) correct, at least radv can't
use an unordered equals which feq has to be for us, this
passes isinf to the backend and let's it sort it out as it
pleases.
I think comparisons are something that were
This adds some missing return value checks for all uses of snprintf in
brw_performance_query.c. This also switches a use of strncpy + strncat
for snprintf for consistency and to avoiding the chance of the strncpy
leaving an unterminated string in the dest buffer if the src is too
long.
This issue
I managed to fix the patch and apply it to mesa master, but I'm getting
the same result as with my stub. The crash is still the same, in
glu32.dll, I wonder if the GLU that you guys have in your repo will work
any better. I tried to crosscompile it but without luck, any instructions?
Still, I
Vinson Lee writes:
> -# Use \> (marks the end of the word)
> +# Use [[:>:]] (marks the end of the word)
[[:>:]] is "an extension, compatible with but not specified by POSIX 1003.2".
GNU libc doesn't support it.
$ echo 'foot foo bar' | sed -E 's/foo[[:>:]]//g'
sed: -e expression #1, char
On Thu, 2017-03-16 at 17:22 -0700, Francisco Jerez wrote:
> Jan Vesely writes:
>
> > On Thu, 2017-03-16 at 15:24 -0700, Francisco Jerez wrote:
> > > Jan Vesely writes:
> > >
> > > > v2: buffers are created with one reference.
> > > > v3: add pipe_resource reference to mapping object
> > > >
>
On Fri, Mar 17, 2017 at 1:04 AM, Dave Airlie wrote:
> From: Dave Airlie
>
> In order to get isinf(NaN) correct, at least radv can't
> use an unordered equals which feq has to be for us, this
Why do we have to use an unordered equal normally? SPIR-V has both
ordered and unordered compares. I can
On 17 March 2017 at 00:21, Dylan Baker wrote:
> Hi Emil,
>
> Quoting Emil Velikov (2017-03-16 16:35:33)
>> While I can see you're impressed by Meson, I would kindly urge you to
>> not use it here. As you look closely you can see that one could
>> trivially improve the times, yet the biggest thing
On Thu, Mar 9, 2017 at 9:07 PM, Emil Velikov wrote:
> From: Jason Ekstrand
>
> v2 [Emil Velikov]
> - Various fixes and initial stab at the Android build.
> - Keep the generation rules/EXTRA_DIST outside the conditional
This has broken anv build for me, because I don't have vulkan.h
anywhere in
On Wednesday, March 8, 2017 10:27:20 AM PDT Nanley Chery wrote:
> On Wed, Mar 08, 2017 at 10:07:12AM -0800, Nanley Chery wrote:
> > On Wed, Mar 08, 2017 at 02:17:59AM -0800, Kenneth Graunke wrote:
> > > On Thursday, March 2, 2017 4:36:08 PM PST Nanley Chery wrote:
> > > > On Mon, Feb 06, 2017 at 03
Jan Vesely writes:
> On Thu, 2017-03-16 at 15:24 -0700, Francisco Jerez wrote:
>> Jan Vesely writes:
>>
>> > v2: buffers are created with one reference.
>> > v3: add pipe_resource reference to mapping object
>> >
>>
>> Mapping objects are supposed to be short-lived, they're logically part
>>
Hi Emil,
Quoting Emil Velikov (2017-03-16 16:35:33)
> While I can see you're impressed by Meson, I would kindly urge you to
> not use it here. As you look closely you can see that one could
> trivially improve the times, yet the biggest thing is that most of the
> code in libdrm must go ;-)
Perha
We create the BO when creating a transform feedback object, and only
destroy it when deleting that object. So it won't be NULL.
CID: 1401410
---
src/mesa/drivers/dri/i965/gen6_sol.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c
b/s
On 03/17/2017 01:17 AM, Kenneth Graunke wrote:
On Thursday, March 16, 2017 5:06:55 PM PDT Samuel Pitoiset wrote:
Looks easier to do that at lowering time and mostly because
builtin_builder is a singleton class without access to any
states/constants.
Signed-off-by: Samuel Pitoiset
---
src/co
On Thu, Mar 16, 2017 at 7:36 PM, Alan Swanson wrote:
> Since switching to LRU eviction the only user of these predicate
> functions now resolves directory entry stats itself so pass them
> directly saving calling fstat and strlen twice (and the
> expensive strlen is skipped entirely if access time
On Thursday, March 16, 2017 5:06:55 PM PDT Samuel Pitoiset wrote:
> Looks easier to do that at lowering time and mostly because
> builtin_builder is a singleton class without access to any
> states/constants.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/compiler/Makefile.sources | 1 +
>
Looks easier to do that at lowering time and mostly because
builtin_builder is a singleton class without access to any
states/constants.
Signed-off-by: Samuel Pitoiset
---
src/compiler/Makefile.sources | 1 +
src/compiler/glsl/ir_optimization.h | 2 +
src/compiler/glsl/lower_sqrt.cpp
Game ported from D3D9 which expects sqrt() to compute the absolute
value as explained in the spec.
This gets rid of the NaN values as well as the black squares
with RadeonSI.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97338
Signed-off-by: Samuel Pitoiset
---
src/mesa/drivers/dri/com
It relies on the force_glsl_abs_sqrt driconf option.
Signed-off-by: Samuel Pitoiset
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 0757d141fc..e2
This will allow to force computing the absolute value for sqrt()
and inversesqrt() in order to follow D3D9 behaviour for buggy
apps that rely on it.
Signed-off-by: Samuel Pitoiset
---
src/gallium/include/state_tracker/st_api.h | 1 +
src/gallium/state_trackers/dri/dri_screen.c | 3 +++
On 16 March 2017 at 23:53, Robert Bragg wrote:
> On Thu, Mar 16, 2017 at 1:50 PM, Emil Velikov
> wrote:
>> On 16 March 2017 at 02:49, Jonathan Gray wrote:
>>> % pattern rules are a GNU extension. As there is only one file here
>>> avoid patterns and globbing entirely to fix the build on non-GN
From: Dave Airlie
In order to get isinf(NaN) correct, at least radv can't
use an unordered equals which feq has to be for us, this
passes isinf to the backend and let's it sort it out as it
pleases.
Signed-off-by: Dave Airlie
---
src/compiler/nir/nir.h | 1 +
src/compiler/nir/nir_opco
From: Dave Airlie
This fixes:
dEQP-VK.glsl.builtin.function.common.isinf.*
Signed-off-by: Dave Airlie
---
src/amd/common/ac_nir_to_llvm.c | 14 ++
src/amd/vulkan/radv_pipeline.c | 1 +
2 files changed, 15 insertions(+)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/commo
Fixes a bunch of piglit crashes that hit an assert() when trying
to delete the framebuffer. The assert() was triggered because
WinSysDrawBuffer was set to NULL before glDeleteFramebuffers()
was called.
---
src/gallium/state_trackers/dri/dri_context.c | 3 +++
1 file changed, 3 insertions(+)
diff
On Thu, Mar 16, 2017 at 1:50 PM, Emil Velikov wrote:
> On 16 March 2017 at 02:49, Jonathan Gray wrote:
>> % pattern rules are a GNU extension. As there is only one file here
>> avoid patterns and globbing entirely to fix the build on non-GNU make.
>>
>> Signed-off-by: Jonathan Gray
>> ---
>> s
On Wed 15 Mar 2017, Jason Ekstrand wrote:
> They should probably assert that isl_surf_init succeeds instead.
Good point. I'll fix that.
>
> On Mon, Mar 13, 2017 at 3:28 PM, Chad Versace
> wrote:
>
> > All callers of isl_surf_init() that set 'min_row_pitch' wanted to
> > request an *exact* row
Hi Dylan,
On 16 March 2017 at 21:25, Dylan Baker wrote:
> Why bother, and why would we want this?
>│~
>
> First it's written in python, which means the potential developer base
> is massive. And it provides a recursive view for humans
On Wed 15 Mar 2017, Jason Ekstrand wrote:
> Fun story: This will implicitly handle the (invalid) case of trying to
> create a MCS for a 16xMSAA surface that's more than 8k wide. :-) We may
> want to keep the check in init_mcs for clarity and because it's in the docs
> but the extra validation is n
On Wed 15 Mar 2017, Jason Ekstrand wrote:
> On Wed, Mar 15, 2017 at 3:34 PM, Nanley Chery wrote:
>
> > On Mon, Mar 13, 2017 at 03:28:01PM -0700, Chad Versace wrote:
> > > Validate that it fits in RENDER_SURFACE_STATE::SurfacePitch or, if it's
> > > an aux surface, AuxiliarySurfacePitch.
> > > ---
On Thu, Mar 16, 2017 at 4:17 PM, Chad Versace
wrote:
> On Wed 15 Mar 2017, Jason Ekstrand wrote:
> > On Mon, Mar 13, 2017 at 3:28 PM, Chad Versace
> > wrote:
> >
> > > ---
> > > src/intel/isl/isl.h | 9 +
> > > 1 file changed, 9 insertions(+)
> > >
> > > diff --git a/src/intel/isl/isl.h
On Wed 15 Mar 2017, Jason Ekstrand wrote:
> On Mon, Mar 13, 2017 at 3:28 PM, Chad Versace
> wrote:
>
> > ---
> > src/intel/isl/isl.h | 9 +
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
> > index 9d92906ca71..b79793b0c93 100644
> > ---
On Thu, Mar 16, 2017 at 2:17 PM, Matt Turner wrote:
> I started to add support to NIR for something like INTEL_DEBUG=optimizer,
> but
> then realized that a bunch of NIR passes didn't even return progress.
>
> After fixing that, I realized that a bunch of NIR passes didn't preserve
> metadata.
>
Quoting Marek Olšák (2017-03-16 15:36:26)
> Is there a way not to use ninja with meson, because ninja redirects
> all stderr output from gcc to stdout, which breaks many development
> environments that expect errors in stderr?
>
> I'm basically saying that if ninja can't keep gcc errors in stderr,
On Thu, Mar 16, 2017 at 2:18 PM, Matt Turner wrote:
> ---
> src/compiler/nir/nir.h | 2 +-
> src/compiler/nir/nir_from_ssa.c | 21 +++--
> 2 files changed, 16 insertions(+), 7 deletions(-)
>
> diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
> index db47699.
On Thu, 2017-03-16 at 15:24 -0700, Francisco Jerez wrote:
> Jan Vesely writes:
>
> > v2: buffers are created with one reference.
> > v3: add pipe_resource reference to mapping object
> >
>
> Mapping objects are supposed to be short-lived, they're logically part
> of the parent resource object s
Fixes: fe56c745b8cb ("Convert sed(1) syntax to be compatible with FreeBSD and
OpenBSD")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100236
Signed-off-by: Vinson Lee
---
configure.ac | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/configure.ac b/configure
Is there a way not to use ninja with meson, because ninja redirects
all stderr output from gcc to stdout, which breaks many development
environments that expect errors in stderr?
I'm basically saying that if ninja can't keep gcc errors in stderr, I
wouldn't like any project that I might be involve
Jan Vesely writes:
> v2: buffers are created with one reference.
> v3: add pipe_resource reference to mapping object
>
Mapping objects are supposed to be short-lived, they're logically part
of the parent resource object so they shouldn't ever out-live it. What
is this useful for?
> CC: "17.0 1
On Thu, Mar 16, 2017 at 2:18 PM, Matt Turner wrote:
> ---
> src/compiler/nir/nir.h | 2 +-
> src/compiler/nir/nir_lower_vars_to_ssa.c | 8 ++--
> 2 files changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
> index 2dedb4
On Thu, Mar 16, 2017 at 6:12 PM, Kenneth Graunke wrote:
> In commit d2590eb65ff28a9cbd592353d15d7e6cbd2c6fc6 I enabled GL 4.5
> on Haswell...but failed to check if we could do indirect compute
> shader dispatch...and query buffer objects.
>
> Indirect compute shader dispatch requires command parse
On Wed, Mar 08, 2017 at 10:27:20AM -0800, Nanley Chery wrote:
> On Wed, Mar 08, 2017 at 10:07:12AM -0800, Nanley Chery wrote:
> > On Wed, Mar 08, 2017 at 02:17:59AM -0800, Kenneth Graunke wrote:
> > > On Thursday, March 2, 2017 4:36:08 PM PST Nanley Chery wrote:
> > > > On Mon, Feb 06, 2017 at 03:5
In commit d2590eb65ff28a9cbd592353d15d7e6cbd2c6fc6 I enabled GL 4.5
on Haswell...but failed to check if we could do indirect compute
shader dispatch...and query buffer objects.
Indirect compute shader dispatch requires command parser version 5
(kernel commit 7b9748cb513a6bef4af87b79f0da3ff7e8b56cd
Detecting register write support by trial and error introduces a
stall at screen creation time, which it would be nice to avoid.
Certain command parser versions guarantee this will work (see the
giant comment in intelInitScreen2 below, or a few commits ago):
- Ivybridge: version >= 1 (kernel v3.16
If we can't write registers, then the effective command parser version
is 0 - it may exist, but it's not usefully enabling anything.
See kernel commit 1ca3712ca3429a617ed6c5f87718e4f6fe4ae0c6 (in v4.8)
where the kernel starts doing this for us. This makes us do more or
less the same thing on olde
This should help us figure out the complexities of which kernel
versions we need to get various features on various platforms.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/intel_screen.c | 97
1 file changed, 97 insertions(+)
diff --git a/src/mes
On Wed, Mar 15, 2017 at 1:25 AM, Dave Airlie wrote:
> From: Dave Airlie
>
> This adds support for exporting 2D images, to an
> opaque fd.
>
> This implements the:
> VK_KHX_external_memory_capabilities
> VK_KHX_external_memory
> VK_KHX_external_memory_fd
>
> extensions.
>
> These are used by Steam
v2: buffers are created with one reference.
v3: add pipe_resource reference to mapping object
CC: "17.0 13.0"
Signed-off-by: Jan Vesely
---
src/gallium/state_trackers/clover/core/resource.cpp | 11 ---
src/gallium/state_trackers/clover/core/resource.hpp | 7 ---
2 files changed, 1
Quoting Ilia Mirkin (2017-03-16 14:32:09)
> On Thu, Mar 16, 2017 at 5:25 PM, Dylan Baker wrote:
> > Why bother, and why would we want this?
> > │~
> >
> > First it's written in python, which means the potential developer base
> > is mas
It all just works since it's just a hardware register so we might as
well turn it on.
---
src/intel/vulkan/anv_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 8d4d243..f158d77 100644
--- a/src/intel/vu
---
src/intel/vulkan/genX_pipeline.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index a6ec3b6..bb3e203 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -995,6 +995,7 @@ emit_3dstate_
From: Ilia Mirkin
In the end, pipeline statistics queries look a lot like occlusion
queries only with between 1 and 11 begin/end pairs being generated
instead of just the one.
Reviewed-By: Lionel Landwerlin
---
src/intel/vulkan/TODO | 1 -
src/intel/vulkan/anv_device.c | 2 +-
sr
In order to get accurate statistics, we need to disable statistics for
blits, clears, and the surface state memcpy at the top of each secondary
command buffer. There are two possible approaches to this:
1) Disable before the blit/memcpy and re-enable afterwards
2) Move emitting 3DSTATE_VF_STAT
It's in 3DSTATE_CLIP, so it doesn't really need the extra detail. This
matches what we do for VS, FS, etc.
---
src/intel/genxml/gen6.xml | 2 +-
src/intel/genxml/gen7.xml | 2 +-
src/intel/genxml/gen75.xml | 2 +-
src/intel/genxml/gen8.xml | 2 +-
src/intel/genxml/gen9.xml | 2 +-
5 files cha
Reviewed-By: Lionel Landwerlin
---
src/intel/vulkan/genX_query.c | 30 ++
1 file changed, 18 insertions(+), 12 deletions(-)
diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c
index b8d4c55..6c26e6a 100644
--- a/src/intel/vulkan/genX_query.c
+++
Reviewed-By: Lionel Landwerlin
---
src/intel/genxml/gen7.xml | 44
src/intel/genxml/gen75.xml | 44
src/intel/genxml/gen8.xml | 44
src/intel/genxml/gen9.xml |
The new version is a nice GPU parallel to cpu_write_query_result and it
nicely handles things like dealing with 32 vs. 64-bit offsets in the
destination buffer.
Reviewed-By: Lionel Landwerlin
---
src/intel/vulkan/genX_query.c | 39 ---
1 file changed, 24 inser
Reviewed-By: Lionel Landwerlin
---
src/intel/vulkan/genX_query.c | 33 +
1 file changed, 17 insertions(+), 16 deletions(-)
diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c
index 2d8f352..b8d4c55 100644
--- a/src/intel/vulkan/genX_query.c
From the Vulkan 1.0.39 Specification:
"If VK_QUERY_RESULT_64_BIT is not set and the result overflows a
32-bit value, the value may either wrap or saturate."
So we can either clamp or wrap. Wrapping is both easier and what the
user gets if they use vkCmdCopyQueryPoolResults and we should be
Not all queries are the same. Even the two queries we support today
require a different amount of data per slot. Once we introduce pipeline
statistics queries, the size will vary wildly.
Reviewed-By: Lionel Landwerlin
---
src/intel/vulkan/anv_private.h | 9 +++-
src/intel/vulkan/genX_quer
We're about to make slots variable-length and always having the
available bits at the front makes certain operations substantially
easier once we do that.
Reviewed-By: Lionel Landwerlin
---
src/intel/vulkan/anv_private.h | 2 +-
src/intel/vulkan/genX_query.c | 43 +-
The Vulkan spec is fairly clear about when we should and should not
write query pool results. We're also supposed to return VK_NOT_READY if
VK_QUERY_RESULT_PARTIAL_BIT is not set and we come across any queries
which are not yet finished. This fixes rendering corruptions on The
Talos Principle whe
This is way more convenient than having two separate dword fields.
Reviewed-By: Lionel Landwerlin
---
src/intel/genxml/gen6.xml | 3 +--
src/intel/genxml/gen7.xml | 3 +--
src/intel/genxml/gen75.xml| 3 +--
src/intel/genxml/gen8.xml | 3 +--
src/intel/genxml/gen9.xml | 3 +--
This v2 of my earlier queries series fixes the bugs found by reviewers and
the CTS. It now passes 100% of the CTS tests. New "features" include:
- Clip statistics are now enabled
- VF statistics are disabled for blits and gpu memcpy operations (other
pipeline statistics were already disable
Reviewed-By: Lionel Landwerlin
Cc: "17.0 13.0"
---
src/intel/vulkan/genX_query.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c
index 4e6638a..72ac2cb 100644
--- a/src/intel/vulkan/genX_query.c
+++ b/src/i
Reviewed-By: Lionel Landwerlin
Cc: "17.0 13.0"
---
src/intel/vulkan/genX_query.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c
index 830f867..4e6638a 100644
--- a/src/intel/vulkan/genX_query.c
+++ b/src/intel/vul
Reviewed-by: Dylan Baker
Quoting Matt Turner (2017-03-16 14:17:59)
> ---
> src/compiler/nir/nir.h | 2 +-
> src/compiler/nir/nir_from_ssa.c | 6 +++---
> src/compiler/nir/nir_lower_returns.c | 2 +-
> src/compiler/nir/nir_move_vec_src_uses_t
Reviewed-by: Dylan Baker
Quoting Matt Turner (2017-03-16 14:18:00)
> et is not an abbreviation.
> ---
> src/compiler/nir/nir_from_ssa.c | 10 +-
> src/compiler/nir/nir_lower_vars_to_ssa.c | 2 +-
> 2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/src/compiler/
On Thu, Mar 16, 2017 at 5:25 PM, Dylan Baker wrote:
> Why bother, and why would we want this?
>│~
>
> First it's written in python, which means the potential developer base
> is massive. And it provides a recursive view for humans, but
As if you need one ;)
Reviewed-by: Dylan Baker
Quoting Matt Turner (2017-03-16 14:17:58)
> ---
> src/compiler/nir/README | 2 +-
> src/compiler/nir/nir.c | 2 +-
> src/compiler/nir/nir.h | 14 +++---
> src/com
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